Commit Graph

477 Commits

Author SHA1 Message Date
Nathan Conrad 838cfe02c1 Merge remote-tracking branch 'origin/master' into ST_FSDEV_EP0 2019-10-02 00:09:07 -04:00
William D. Jones 19ee519926 dcd_msp430x5xx: Correct byte count masks in transmit/receive routines. 2019-10-02 00:01:58 -04:00
William D. Jones 54478aaa2a dcd_msp430x5xx: Add STALL support for nonzero endpoints. 2019-10-01 23:28:41 -04:00
William D. Jones fad44c03c8 dcd_msp430x5xx: Fix TOGGLE bit behavior, clear stall when endpoint
opened due to reset potentially not resetting everything.
2019-10-01 23:03:39 -04:00
hathach d27291f288 Merge branch 'master' into develop 2019-09-30 14:45:34 +07:00
William D. Jones b623e3023e dcd_msp430x5xx: Implement receive_packet for all endpoints, correct
some mistakes in transmit_packet.
2019-09-29 03:58:30 -04:00
William D. Jones 549ad1d9b6 dcd_msp430x5xx: Fix missing mask when posting IN xfer events. 2019-09-29 03:02:59 -04:00
William D. Jones 838b431fac dcd_msp430x5xx: Implement transmit_packet for nonzero endpoints. Untested. 2019-09-29 02:43:05 -04:00
William D. Jones 2247f132ca Implement dcd_edpt_xfer for nonzero endpoints. 2019-09-29 02:22:09 -04:00
William D. Jones ea0e799df6 dcd_msp430x5xx: Fix clear stall logic. 2019-09-29 02:17:59 -04:00
William D. Jones 529efcc0d2 dcd_msp430x5xx: Implement dcd_edpt_open. 2019-09-29 00:21:40 -04:00
William D. Jones 5d9f833915 dcd_msp430x5xx: Implement STALL logic for EP 0. 2019-09-28 02:09:03 -04:00
William D. Jones 63c94ff684 dcd_msp430x5xx: Improve EP0 IN handling (reuse short_packet field). 2019-09-28 01:51:05 -04:00
William D. Jones 030560792d dcd_msp430x5xx: Implement dcd_set_address. 2019-09-27 21:59:45 -04:00
William D. Jones 3ac43076da dcd_msp430x5xx: Implement EP0 IN xfers, clean up. 2019-09-27 21:22:19 -04:00
Nathan Conrad c4483d244b Fix typo of CFG_TUD_ENDOINT0_SIZE. 2019-09-27 21:22:19 -04:00
Nathan Conrad 4ccdc5522d Fix typo of CFG_TUD_ENDOINT0_SIZE. 2019-09-27 12:41:46 -04:00
hathach 6183dbd0ce add -Wextra for more warnings to example
non-stack warning (probably mcu driver) should be suppressed in the
board.mk
2019-09-27 00:15:43 +07:00
Nathan Conrad f19082f02d Reset TX and RX endpoints to NAK when receiving setup packet. 2019-09-25 20:55:15 -04:00
Nathan Conrad 048e0448c0 ST FSDEV:Remove setting the EP kind, as I think it was causing issues during enumeration (sometimes). Also move a membar. 2019-09-25 20:54:59 -04:00
William D. Jones 01b4115b0b dcd_msp430x5xx: Fix Setup packet delay by actually enabling
corresponding interrupt.
2019-09-24 04:06:34 -04:00
William D. Jones 550e8215f3 dcd_msp430x5xx: Setup packets are now received successfully (with delay). 2019-09-24 03:43:51 -04:00
William D. Jones d2e4af5a7b msp430f5529: Change EP0 size to 8, implement interrupt logic up to bus
reset detection.
2019-09-24 02:41:11 -04:00
William D. Jones 950614a841 msp430f5529: Implement dcd_int_enable/disable. 2019-09-23 22:58:49 -04:00
William D. Jones a6a79df9fb msp430f5529: Enable clocks/PLL for msp_exp430f5529lp and enable USB
module in dcd_msp430x5xx; device does not enumerate.
2019-09-23 18:53:31 -04:00
William D. Jones 907bc3df9b msp430f5529: Ensure cdc_msc demo compiles. 2019-09-23 17:48:18 -04:00
hathach 7ba8e81852
Merge pull request #177 from cr1901/fifo-fix
dcd_synopsys: Fix off-by-one error in FIFO allocation.
2019-09-22 11:38:54 +07:00
William D. Jones 108f756e22 dcd_synopsys: Fix off-by-one error in FIFO allocation. 2019-09-21 23:01:06 -04:00
Nathan Conrad ce9f133d25 FSDEV: go to NAK when unstalling; on reset, set EP0 to NAK, prioritize reset interrupt, fix small typos. 2019-09-21 12:00:04 -04:00
hathach 94c9cf0eff doc update 2019-09-20 16:14:35 +07:00
hathach 7b2f8cc73a added stm32 L0 support
close #125
2019-09-20 13:49:33 +07:00
Nathan Conrad 525b4cdb72 Use ESOF for wakeup timing. 2019-09-19 09:51:40 -04:00
Nathan Conrad 642afeea8b s/static const/define/ 2019-09-19 09:30:16 -04:00
Nathan Conrad 85623584f9 Remove debug assertions. 2019-09-19 09:24:52 -04:00
Nathan Conrad 5fcc1468eb Merge branch 'master' into fsdev_smallPacket 2019-09-19 09:16:48 -04:00
Nathan Conrad 89ffe78f84 ST FSDEV: No need to always reset the interrupt priority, also add some synchronization primitives after disabling interrupts. 2019-09-16 22:56:17 -04:00
Nathan Conrad a33a854793 Include board header file... :X 2019-09-16 20:56:57 -04:00
Nathan Conrad d341337c6a Implement remote wakeup + perhaps better sleep? 2019-09-16 20:25:50 -04:00
Nathan Conrad 6b9783cead s/unsigned int/uint32_t/ 2019-09-16 09:20:15 -04:00
hathach 0c70948d0d
Merge pull request #163 from hathach/develop
fix #143
2019-09-16 16:37:27 +07:00
hathach a37d2d64be fix #143 2019-09-16 13:32:47 +07:00
Nathan Conrad 05c13342a3 Implement EP with size <64. 2019-09-15 23:51:42 -04:00
Nathan Conrad 18303e742e Covert macros to inline functions. 2019-09-15 23:46:03 -04:00
Nathan Conrad ae873a709e Wrote TX instead of RX. 2019-09-15 23:33:36 -04:00
William D. Jones 6280e4e7cb msp430f5529: Add empty msp_exp430f5529lp BSP and DCD. 2019-09-14 18:02:17 -04:00
Nathan Conrad 4ea212a432 This demonstrates that I don't pre-build things before committing them... oops. 2019-09-13 23:52:43 -04:00
Nathan Conrad c831311a12 Off-by-one error in Synopsys assertions. (and move some braces to their own lines. 2019-09-13 23:38:58 -04:00
hathach 986beda9eb adding stm32l4 support, board test run with stm32l476disco, usb doens't work yet 2019-09-13 11:22:44 +07:00
hathach ff7261600c ported stm32f2, added board stm32f207zg nucleo
close #127
2019-09-12 10:41:03 +07:00
Nathan Conrad d3507b0787 Merge remote-tracking branch 'origin/master' into stfsdev_cleanups 2019-09-11 20:36:48 -04:00
Nathan Conrad 3326b9d008 Use types with explicit bit widths. 2019-09-11 20:33:47 -04:00
hathach 7f166d860d stm32f7 work with dcd synopsis
close #124
2019-09-11 22:48:07 +07:00
Nathan Conrad 7b93177890 Use TU_VERIFY_STATIC, use more uint instead of uint8_t/uint16_t. Create reg16_clear_bits function to reduce typec conversion warnings. 2019-09-11 09:45:48 -04:00
Nathan Conrad 784dc52b62 Update header comments. 2019-09-11 09:44:25 -04:00
Nathan Conrad 4cf2b30759 Fix bug where the EPREGs were not being initialized as expected. 2019-09-11 09:43:57 -04:00
hathach 678ba586df
Merge pull request #122 from cr1901/synopsys
Synopsys Refactor
2019-09-11 10:37:49 +07:00
Nathan Conrad 4f6bedeac9 Rename the STM32 MCU options. 2019-09-10 12:57:43 -04:00
Nathan Conrad 23d39f2b15 Remove OPT_MCU_STM for L and G series. 2019-09-10 12:13:36 -04:00
Nathan Conrad 65e72de7ce Move interrupt handler into device driver, and rename the OPT_MCU_STM32 constants. 2019-09-10 09:35:52 -04:00
Nathan Conrad 49c58be4ce Fix silly typo in the F3xx support. 2019-09-10 01:31:14 -04:00
Nathan Conrad bc2a65b20b A few bug fixes, remove the unstested device notices, note supported boards in READMEs, and implement PMA
access stride (used on MCU's with 512 byte USB buffers).
2019-09-10 01:03:24 -04:00
Nathan Conrad f7b0aeec52 Start clock on F0 and F0, and handle USB interrupts. 2019-09-09 19:20:26 -04:00
Nathan Conrad d1976a30b3 Update F3 BSP and create F070RB BSP. Both are untested (but compile). 2019-09-09 16:14:38 -04:00
Nathan Conrad 5ec59c2a30 Add STM32 FSDEV driver. 2019-09-09 14:55:39 -04:00
Nathan Conrad b4c8a09f20 Remove STM32 F3 port. 2019-09-09 13:29:26 -04:00
William D. Jones 1385d7c494 stm32: Refactor so F4 and H7 use a single Synopsys IP source file. 2019-09-09 10:48:14 -04:00
William D. Jones 82cd4b5350 dcd_stm32f4: Merge relevant changes from dcd_stm32h7. 2019-09-09 10:27:46 -04:00
William D. Jones 3efc81b285 dcd_stm32h7: Merge relevant changes from dcd_stm32f4. USB2 -> USB works as alias. 2019-09-09 10:14:20 -04:00
hathach e123cad7bb enhance dcd stm32f4 to support max 4 or 6 endpoints on 407 or 412 2019-09-08 23:10:51 +07:00
hathach 4663f9084d ported board stm32f412g discovery
- added soft connect for enable pull up register dcd stm32f4
2019-09-08 21:57:02 +07:00
hathach 56f1ccd68a fix #97 2019-09-05 21:59:19 +07:00
hathach 143a138028
Merge pull request #116 from hathach/develop
Board update
2019-09-05 16:18:34 +07:00
hathach a90e2aa2ce 55s69 device work with usb0 2019-09-05 16:12:13 +07:00
hathach 7350e9c25c
Merge pull request #114 from cr1901/stm32h7
STM32H7 Support
2019-09-05 15:29:13 +07:00
William D. Jones 8f8ca77a91 stm32h7: Mark USB FIFOs as volatile, otherwise optimizations will remove
reads/writes to the FIFOs.
2019-09-04 01:06:07 -04:00
William D. Jones 910fd867c7 stm32h7: Fix indentation error where OUT XFER interrupt wasn't handled
in the correct scope.
2019-09-03 01:37:44 -04:00
William D. Jones 1a3dc9cba1 stm32h7: USB_OTG_FS -> USB2_OTG_FS. 2019-09-03 01:28:41 -04:00
William D. Jones f703a74daa stm32h7: Implement STALL logic for endpoints. 2019-09-03 01:28:41 -04:00
William D. Jones 28b131ea94 stm32h7: Implement dcd_edpt_open. cdc_msc_hid demo functional. 2019-09-03 00:37:50 -04:00
William D. Jones d4302dacc5 stm32h7: Fix accidental overwrite of STUPCNT field in DOEPTSIZ register. 2019-09-03 00:25:21 -04:00
William D. Jones 9210167603 stm32h7: Implement dcd_set_address. 2019-09-02 21:00:30 -04:00
William D. Jones 0d0b802ee0 stm32h7: Implement IN and OUT receive for EP0; device descriptor returned. 2019-09-02 19:32:11 -04:00
William D. Jones f602534536 stm32h7: Implement setup packet events. 2019-09-02 13:34:33 -04:00
hathach 074681da8b dma of lpc54114 can also execute up to 64 bytes each transfer
There is still issue with cdc_msc_hid example
2019-09-01 17:05:34 +07:00
hathach aeea6754af rename lpc_usbd to lpc_ip3511 2019-09-01 16:44:40 +07:00
hathach 3067809957 adding lpc54xxx to dcd, able to go through enumeration 2019-09-01 16:15:23 +07:00
hathach 957201fc58 fix undef __ARM_ARCH_6M__ 2019-09-01 11:59:50 +07:00
hathach 2d041aaa1d clean up 2019-09-01 08:11:22 +07:00
hathach 30f707cad2 rename lpc11_13_15 to simply lpc_usbd since it is almost used by in recent year for nxp mcu 2019-09-01 00:51:58 +07:00
hathach bac75a81fd support LPC51u68 #100 2019-08-31 22:44:08 +07:00
William D. Jones 8b165e1024 stm32h7: Ensure FS (and the only) PHY is selected for OTG_HS2. 2019-08-30 22:07:35 -04:00
William D. Jones 7153561984 stm32h7: Enable USB peripheral (device does not enumerate yet). 2019-08-30 21:57:06 -04:00
William D. Jones 0fb9ab9a09 stm32h7: Add empty template cdc_msc_hid example for STM32H743 Nucleo board that compiles. 2019-08-24 12:40:18 -04:00
hathach 47cd08d526 clean up 2019-08-05 22:31:41 +07:00
hathach d1df041519 nrf5x remove the depenedent on nrfx_power.h 2019-08-05 22:09:37 +07:00
hathach d211035a0a merge dcd/hal_nrf5x.c into dcd/dcd_nrf5x.c 2019-08-05 21:54:20 +07:00
hathach ed6fa460e9 stm32 minor change 2019-07-19 10:59:35 +07:00
hathach f16ebd512b indent clean up 2019-07-04 18:45:10 +07:00
hathach 73d7ab201e
remove dcd_edpt_busy() 2019-06-10 22:29:18 +07:00
hathach 13e01c7dca
add TU_ prefix to compiler ATTR to prevent name conflict with application 2019-06-06 10:39:37 +07:00
hathach 3e6d911ce9
more clean up use inline bit funciton instead of macros 2019-05-14 12:54:29 +07:00
hathach 61ec407752
update license year to 2019 2019-05-14 11:48:05 +07:00
hathach 667133304b fix samd dcd_clear_stall also reset data toggle 2019-05-10 00:10:18 +07:00
hathach 77bc421359 fix clear stall usage, fix reset data toggle with dcd_clear_stall for nrf52 2019-05-09 23:31:18 +07:00
hathach 2050778763 clean up 2019-05-01 20:41:26 +07:00
hathach 64bed848d0 fix #53 use nrfx_usbd_errata.h 2019-04-08 17:36:12 +07:00
hathach dd9c441a61
samd support suspend and resume. Though cannot distinguish between Suspend and Disconnect
should work with #47
2019-04-02 02:14:22 +07:00
hathach 06e1fac7c5
nrf5x enable suspend after set address, instead of set config 2019-04-02 01:20:34 +07:00
hathach 2cc4ab2aef
nrf5x added LOWPOWER when suspend/resume 2019-03-31 23:57:38 +07:00
hathach eabfc53f38
added tud_suspended() and tud_ready() 2019-03-30 23:01:23 +07:00
hathach b28cc6ddb1 added dcd_remote_wakeup() stub for all ports 2019-03-30 14:47:11 +07:00
hathach 93a853cd5b usbd add connected, suspended, remote_wakeup
- remove use of osal_queue_reset
2019-03-30 02:26:15 +07:00
hathach 1c2beba85c working on suspend and resume
change dcd_init signature
2019-03-29 16:23:00 +07:00
hathach 0bdd4bd550
added Suspend and Resume event for nrf5x port
also rename DCD_EVENT_SUSPENDED to DCD_EVENT_SUSPEND
2019-03-29 01:34:53 +07:00
hathach 1e9848d917
replace dcd_edpt_(clear)stall by usbd_edpt_(clear)stall
- remove dcd_edpt_stalled() from dcd porting
2019-03-27 16:09:49 +07:00
hathach 4722376654 remove dcd_get_frame_number() 2019-03-27 01:01:48 +07:00
hathach 18f248b142
remove tusb_hal_millis() usage, less work for porting 2019-03-24 01:19:32 +07:00
hathach 43eb1a8b16
added stub for dcd_stm32f3 2019-03-22 23:57:56 +07:00
hathach ba1bea5d53
simplify board API, adding stm32f3 discovery
- remove board header since it is not used
2019-03-22 22:06:48 +07:00
hathach da55610f43 clean up 2019-03-20 20:19:21 +07:00
hathach c211ee19dd migrate license from BSD 3 clause to MIT 2019-03-20 16:11:42 +07:00
hathach f932cf3854 stm32 update fifo in comment 2019-03-17 15:16:52 +07:00
hathach 5e92d67015 stm32 update TX Fifo for edpt IN, both CDC + MSC work great
- call dcd_event_xfer_complete() when enough bytes received
- add dcd_get_frame_number()
2019-03-15 18:43:09 +07:00
hathach eda56769b9 dcd_set_address include status response, usbd control stall both control in and out 2019-03-13 23:14:48 +07:00
hathach 195a44172a update stm32 dcd stall control endpoint 2019-03-13 16:54:10 +07:00
hathach 8418cb816b
Merge branch 'master' into stm32f4 2019-03-05 05:45:42 -08:00
William D. Jones c95ad426c6 stm32f4: Refactor IN and OUT endpoint interrupt handling into their own functions. 2019-02-27 11:01:08 -05:00
William D. Jones f43161353c stm32f4: Refactor RX FIFO read into its own function; remove RXFLVL
resetting (read only) and masking (no nested ints).
2019-02-27 10:39:37 -05:00
William D. Jones c51b11f103 Move all paths using "stm" to "st" subdirectories, update config.mk. 2019-02-27 09:15:07 -05:00
William D. Jones 5a1c5cf0b7 stm32f4: Clarify comments and disable OTGINT; fixes stack reset on
cable disconnect, and we don't use OTG right now.
2019-02-14 23:41:16 -05:00
William D. Jones 5a34a9de69 stm32f4: Implement STALL logic for endpoints. 2019-02-08 16:46:12 -05:00
William D. Jones 5526d840a8 stm32f4: Do some comment/dead code (per 6048a3b) cleanups. 2019-02-08 12:05:44 -05:00
William D. Jones c7a52829f4 Clarify receive_packet comment, add SOF handling. 2019-02-08 11:51:29 -05:00
William D. Jones 5645d44127 stm32f4: Add for-loop guard for transmit_packet xfers < 4 chars. 2019-02-07 21:25:27 -05:00
William D. Jones 28ccc8bd0b stm32f4: Fix bad implementation of receive_packet function. 2019-02-07 21:23:00 -05:00
William D. Jones b819b33a68 stm32f4: Make sure interrupts enabled for non-zero endpoints. 2019-02-07 20:29:48 -05:00
William D. Jones 4dc6746a68 stm32f4: Implement dcd_edpt_busy. Don't set EPENA for activated endpoints. 2019-02-05 13:22:39 -05:00
William D. Jones 747815f03b stm32f4: Ensure endpoints enabled properly, using correct FIFOs. 2019-02-04 20:30:47 -05:00
William D. Jones f5d9e7e560 stm32f4: Implement dcd_edpt_open. 2019-01-30 09:27:27 -05:00
William D. Jones 7aadaa3ef2 stm32f4: Handle only one setup packet at a time as a workaround. Device
enumerates.
2019-01-30 05:28:48 -05:00
William D. Jones a9e188a3d2 stm32f4: Implement dcd_set_address. 2019-01-30 02:48:49 -05:00
William D. Jones fcabc717d1 Small cleanups (remove inaccurate comment, set EP0 max size based on speed). 2019-01-30 02:03:19 -05:00
William D. Jones 8629f0c108 Properly schedule OUT xfers on a packet basis. 2019-01-30 02:01:09 -05:00
William D. Jones 6918db3639 stm32f4: Add receive packet function. 2019-01-30 01:42:17 -05:00
William D. Jones 9ce29f5ee6 stm32f4: Refactor packet transmit into subroutine. 2019-01-30 00:49:00 -05:00
hathach 1a84f5da54
nrf5x Let application decide USBD_IRQn priority 2019-01-29 19:42:31 +07:00
hathach 777f41a066
clean up 2019-01-29 18:47:29 +07:00
William D. Jones 9e76635465 stm32f4: Clarify required FIFO sizes and observed behavior. 2019-01-24 04:18:53 -05:00
William D. Jones fe7f304ad4 stm32f4: Start adding OUT interrupt handling, fix buffer sizes; RXFIFO
too low for some reason, TXFIFO EP0 used wrong bitmask.
2019-01-24 03:06:57 -05:00
hathach bd53256126
fix #32 2019-01-23 19:06:37 +07:00
William D. Jones 01117fb965 stm32f4: Finish dcd_edpt_xfer implementation (OUT xfers not functional yet). 2019-01-23 03:31:44 -05:00
William D. Jones b41f610514 stm32f4: Remember to turn off TXFE when IN xfer is done; it not
automatically cleared like EPENA.
2019-01-23 02:24:29 -05:00
William D. Jones 836d13fc4b stm32f4: Fix FIFO write logic (requires 32 bit writes). 2019-01-23 02:06:07 -05:00
William D. Jones aa9a7e882c stm32f4: Properly set control endpoint max packet size. 2019-01-23 00:55:45 -05:00
William D. Jones 17e418bce4 stm32f4: Fix incorrect xfer length for short packet IN xfers. 2019-01-23 00:44:55 -05:00
William D. Jones d1150432fe stm32f4: Remove assumption that EP 0 is only control endpoint. 2019-01-23 00:12:33 -05:00
William D. Jones 51c0ce3f6b stm32f4: Implement interrupt handling for IN packets (first signs of life). 2019-01-22 23:51:58 -05:00
William D. Jones 43c890615a stm32f4: Start implementing dcd_edpt_xfer. 2019-01-22 00:42:43 -05:00
William D. Jones 69f5f18fd6 stm32f4: Remove some template commented code. 2019-01-21 23:45:40 -05:00
William D. Jones 71e1b9d045 stm32f4: Setup packet events in tinyusb now functional. 2019-01-19 21:12:20 -05:00
William D. Jones 5720aef7bb stm32f4: Implement setup packing receive, fix typo in FIFO receive size. 2019-01-19 20:03:18 -05:00
William D. Jones 06c15bf913 stm32f4: Complete initialization for EP0 (packet handling not implemented). 2019-01-19 17:56:53 -05:00
William D. Jones 657d3e2983 stm32f4: Enable USB peripheral, fix typos in register writes. 2019-01-13 18:36:18 -05:00
William D. Jones 03cbd406cb dcd_stm32f4: Add USB init skeleton based on manual (does not enumerate). 2019-01-11 19:53:24 -05:00
William D. Jones 0f9fa5956f bsp.board_stm32f407g_disc1: Switch to external oscillator (more precise). 2019-01-11 13:47:44 -05:00
William D. Jones 75fda7d638 cdc_msc_hid: Ensure example compiles again- add missing prototypes,
fix incorrect prototypes, clean up.
2019-01-10 10:24:45 -05:00
William D. Jones b367baeaf1 Merge branch 'master' of https://github.com/hathach/tinyusb into stm32f4 2019-01-10 09:58:06 -05:00
hathach 6f17b4e019 change to dcd_get_frame_number 2018-12-21 12:46:20 +07:00
hathach 426064201a fix samd build 2018-12-19 13:16:42 +07:00
hathach 902697ca07 add dcd_get_microframe() 2018-12-17 12:14:11 +07:00
hathach 2a60427bdc rename bit_* helper to tu_bit_*, BIT_* to TU_BIT_* for consistency 2018-12-14 15:30:54 +07:00
hathach 6d86db3977
rename edpt_dir/number/addr to tu_edpt_* 2018-12-12 11:51:31 +07:00
hathach e3514b8054
rename hcd_device_remove to hcd_device_close 2018-12-12 11:34:09 +07:00
hathach 607658d047
rename MODE_HOST_SUPPORTED to TUSB_OPT_HOST_ENABLED 2018-12-07 23:38:52 +07:00
hathach e019916263
clean up ehci, support only 1 controller 2018-12-07 23:35:42 +07:00
hathach 2aa21a14e6
lpc17 ohci failed to execute control transfer !! 2018-12-07 18:49:26 +07:00
hathach d524da0c94
enable all warnings 2018-12-07 14:49:55 +07:00
hathach 2fa32bd949
able to build host lpc18xx 2018-12-05 20:39:52 +07:00
hathach 9f3e91a934
update nrf errata 2018-12-05 14:30:47 +07:00
hathach a73017fdc2
hal clean up
- replace tusb_hal_int_enable/disable to dcd_int_enable/disable,
hcd_int_enable/disable
- remove tusb_hal_init(), this will be part of dcd_init/hcd_init,
anything beyond dcd/hcd should be inited by bsp
2018-12-05 13:20:25 +07:00
hathach 6048a3bff4
remove dcd_connect/disconnect since there is no usage now 2018-12-05 12:22:33 +07:00
hathach c1336dff03
lpc move Chip_USB_Init() out of stack to bsp 2018-12-05 11:53:56 +07:00
hathach 9176b7b1da
renane file 2018-12-05 08:51:11 +07:00
hathach dd9c7b4249
lpc40xx device work, moving Chip_USB_Init out of tinyusb 2018-12-05 08:47:23 +07:00
hathach fe8346e642
move pinmux out of dcd into bsp 2018-12-04 18:38:01 +07:00
hathach 6c2404ca49
adding ea4088 quickstart, able to blink 2018-12-04 16:32:20 +07:00
hathach 261e0f9801
adding lpc40xx support 2018-12-04 16:06:50 +07:00
hathach 7120e12971
add mcb1800, blink led ok 2018-12-04 13:17:12 +07:00
hathach bf5ac608ff
rename dcd 18 43 2018-12-04 12:47:58 +07:00
hathach 1d6bbd9990
clean up dcd 43 2018-12-03 23:18:51 +07:00
hathach 29f721ba2c
dcd lpc43 clean up 2018-12-03 23:06:28 +07:00
hathach 9fec39d893
use lpcopen for lpc43x, work well 2018-12-03 22:58:21 +07:00
hathach bb7123eed1
use lpcopen for ea4357, blinky ok 2018-12-03 21:22:11 +07:00
hathach 7f55bbaf05
clean up 2018-12-03 18:32:06 +07:00
hathach 9e33f19378
clean up 2018-12-03 17:47:37 +07:00
hathach 63faea3929
migrate lpc17 to lpcopen, usb device work ok 2018-12-03 17:43:16 +07:00
hathach 66bd9f0a16 wrap up lpc11u port 2018-12-03 13:15:28 +07:00
hathach f28a15a886 clean up dcd lpc11u 2018-12-03 12:31:03 +07:00
hathach 57f7c18d77 dcd lpc11u6x work with cdc + msc 2018-12-03 00:04:55 +07:00
hathach 5848dd2895
lpc11u use USBSRAM, able to response with 1st request 2018-12-02 02:13:48 +07:00
hathach fb842bb804
lp11u able to receive setup packet 2018-12-01 22:21:54 +07:00
hathach d246cc2e6c
lpc13xx build ok (not work) with lpcopen 2018-11-30 23:39:18 +07:00
hathach 1f076bd945
rename cont 2018-11-30 12:59:23 +07:00
hathach 0ab62e6fa2
more rename 2018-11-30 12:57:44 +07:00
hathach 658c2ff570
rename 2018-11-30 12:56:09 +07:00
hathach 723e02780d
clean up 2018-11-30 12:51:54 +07:00
hathach d96347a0f5
rename OPT_MCU_LPC13UXX to OPT_MCU_LPC13XX 2018-11-30 12:48:06 +07:00
hathach 522b0c11ef move nvic prio in hal/dcd to bsp for portability 2018-11-29 22:59:00 +07:00
hathach 57b85262b2 added & tested lpc17xx freertos device example
- add USB priority check for freeRTOS config
2018-11-29 21:41:09 +07:00
hathach 15e4b97e36 lpc17xx add dcd_edpt_stalled 2018-11-29 20:09:02 +07:00
hathach a76c5bf154 dcd lpc17xx, route control endpoint to EP_FAST 2018-11-29 19:58:17 +07:00
hathach ed65a43977 clean up 2018-11-29 13:09:58 +07:00
hathach 402a5fee90 dcd lpc17xx enable EpIntEn for non-control IN after DMA complete
all transfer work well
2018-11-29 12:56:02 +07:00
hathach c3140af274
correct TUD_OPT_HIGH_SPEED 2018-11-28 17:54:11 +07:00
hathach 772b2b692f
more dcd lpc17xx clean up 2018-11-28 17:31:15 +07:00
hathach 4a521d5085
clean up 2018-11-28 17:02:46 +07:00
hathach 04ad5da820 improve non-control xfer for lpc17xx 2018-11-28 16:53:36 +07:00
Scott Shawcroft b4103eef06
needs to be filled out. blinks though 2018-11-27 18:11:03 -08:00
hathach a3cc52829b clean up 2018-11-27 23:55:10 +07:00
hathach 16b3f11d9f
clean up 2018-11-27 21:53:36 +07:00
hathach 15f704b623
improve dcd control lpc17xx 2018-11-27 21:51:02 +07:00
hathach 038851c362
enhance dcd lpc17xx. Able to pass enumeration 2018-11-27 20:48:46 +07:00
hathach 80ecf1fd54
add OPT_MODE_HIGH_SPEED 2018-11-26 14:56:07 +07:00
hathach 064eec5dd8
clean up warnings 2018-11-26 12:29:55 +07:00
Scott Shawcroft bf70f89240
Introduce a Makefile for the OS_NONE device example
It currently supports the SAMD21 and SAMD51 only. More will be
added later.
2018-11-25 11:46:06 -08:00
Scott Shawcroft bf8c4612dc
Make sure OUT endpoint 0 on the SAMDs always has a valid buffer to store
a SETUP token into.
2018-11-23 11:20:23 -08:00
Scott Shawcroft 6aa0146c72
Reset USB peripheral and wait for startup 2018-11-23 11:15:39 -08:00
hathach f196b24dce
rename DCD_XFER_SUCCESS to XFER_RESULT_SUCCESS 2018-11-23 15:22:46 +07:00
hathach e61e9d8b1b
nrf5x add DCD_EVENT_UNPLUGGED event 2018-11-23 15:05:40 +07:00
hathach 4e8400e6fb
more clean up 2018-11-22 21:58:06 +07:00
hathach a1faf5c9cb
clean up dcd lpc43xx 2018-11-22 21:37:23 +07:00
hathach 569e85a0c0
cdc work ok with lpc43xx 2018-11-22 17:40:20 +07:00
hathach 60d8cde695
rename CFG_TUSB_MEM_SECTION to CFG_TUSB_MEM_SECTION 2018-11-22 17:21:07 +07:00
hathach 1d6fc49fa9
clean up 2018-11-21 17:03:39 +07:00
hathach 3cad1d1134
samd21 work well with cdc 2018-11-21 15:00:36 +07:00
hathach a30dfa3324
clean up 2018-11-21 13:11:19 +07:00
hathach a0ce92bcfd
update dcd samd21 2018-11-21 13:01:39 +07:00
hathach 155edc7b00
fix ses irq vector 2018-11-21 12:36:28 +07:00
hathach d036f62b0e samd51 fix stable issue with dcd 2018-11-20 17:25:41 +07:00
hathach c503d48ec4 clean up 2018-11-20 01:20:39 +07:00
hathach 00694b56c5 nrf5x: clean up dcd, add comment 2018-11-16 22:17:11 +07:00
hathach b62ca2e5cd nrf5x: correct control transfer direction
added dcd description.
2018-11-16 21:52:23 +07:00
hathach 5732be224c update example for PR. correct share_control definition
- rename dcd,hal to dcd_samd51, hal_samd51 since some IDE has issue with
duplicated names (e.g keil, ses).
2018-11-14 16:03:58 +07:00
Scott Shawcroft 537a29273c
Exempt from strict warnings for struct packing and add MCU options 2018-11-09 00:10:44 -08:00
Scott Shawcroft 30e3c64134
Polish up control split and treat it more like a normal endpoint. 2018-11-08 13:45:30 -08:00
Scott Shawcroft 7a40ec2647
Split out the control endpoint logic 2018-11-07 23:04:34 -08:00
Scott Shawcroft c582c0fda9
Add SAMD21 and SAMD51 support for CircuitPython.
The ProtoThreads style subtasks were removed because it led to
extremely unclear control flow. RTOSes can be used if threading is
needed.

Also added some additional functionality to MSC to support dynamic
LUNs and read-only LUNs.
2018-11-07 12:02:28 -08:00
hathach b2f18744fe add dcd event helper setup_recieved and bus_signal 2018-10-25 15:02:43 +07:00
hathach 55427606ef replace dcd_xfer_complete by dcd_xfer_complete() 2018-10-24 00:44:26 +07:00
hathach 177adf4bfa replace dcd_bus_event() and dcd_setup_received() by dcd_event_handler() 2018-10-23 16:31:45 +07:00