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lpc17 ohci failed to execute control transfer !!

This commit is contained in:
hathach 2018-12-07 18:49:26 +07:00
parent e6e3679136
commit 2aa21a14e6
No known key found for this signature in database
GPG Key ID: 2FA891220FBFD581
14 changed files with 12249 additions and 24 deletions
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109
examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Startup.s Normal file
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/*****************************************************************************
* SEGGER Microcontroller GmbH & Co. KG *
* Solutions for real time microcontroller applications *
*****************************************************************************
* *
* (c) 2015 SEGGER Microcontroller GmbH & Co. KG *
* *
* Internet: www.segger.com Support: support@segger.com *
* *
*****************************************************************************/
/*****************************************************************************
* Preprocessor Definitions *
* ------------------------ *
* NO_STACK_INIT *
* *
* If defined, the stack pointer will not be initialised. *
* *
* NO_SYSTEM_INIT *
* *
* If defined, the SystemInit() function will not be called. By default *
* SystemInit() is called after reset to enable the clocks and memories to *
* be initialised prior to any C startup initialisation. *
* *
* NO_VTOR_CONFIG *
* *
* If defined, the vector table offset register will not be configured. *
* *
* MEMORY_INIT *
* *
* If defined, the MemoryInit() function will be called. By default *
* MemoryInit() is called after SystemInit() to enable an external memory *
* controller. *
* *
* STACK_INIT_VAL *
* *
* If defined, specifies the initial stack pointer value. If undefined, *
* the stack pointer will be initialised to point to the end of the *
* RAM segment. *
* *
* VECTORS_IN_RAM *
* *
* If defined, the exception vectors will be copied from Flash to RAM. *
* *
*****************************************************************************/
.syntax unified
.global Reset_Handler
.extern _vectors
.section .init, "ax"
.thumb_func
.equ VTOR_REG, 0xE000ED08
#ifndef STACK_INIT_VAL
#define STACK_INIT_VAL __RAM_segment_end__
#endif
Reset_Handler:
#ifndef NO_STACK_INIT
/* Initialise main stack */
ldr r0, =STACK_INIT_VAL
bic r0, #0x7
mov sp, r0
#endif
#ifndef NO_SYSTEM_INIT
/* Initialise system */
ldr r0, =SystemInit
blx r0
#endif
#ifdef MEMORY_INIT
ldr r0, =MemoryInit
blx r0
#endif
#ifdef VECTORS_IN_RAM
/* Copy exception vectors into RAM */
ldr r0, =__vectors_start__
ldr r1, =__vectors_end__
ldr r2, =__vectors_ram_start__
1:
cmp r0, r1
beq 2f
ldr r3, [r0]
str r3, [r2]
adds r0, r0, #4
adds r2, r2, #4
b 1b
2:
#endif
#ifndef NO_VTOR_CONFIG
/* Configure vector table offset register */
ldr r0, =VTOR_REG
#ifdef VECTORS_IN_RAM
ldr r1, =_vectors_ram
#else
ldr r1, =_vectors
#endif
str r1, [r0]
#endif
/* Jump to program start */
b _start

19
examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1700_Target.js Normal file
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/*****************************************************************************
* SEGGER Microcontroller GmbH & Co. KG *
* Solutions for real time microcontroller applications *
*****************************************************************************
* *
* (c) 2015 SEGGER Microcontroller GmbH & Co. KG *
* *
* Internet: www.segger.com Support: support@segger.com *
* *
*****************************************************************************/
function Reset() {
TargetInterface.resetAndStop();
}
function EnableTrace(traceInterfaceType) {
// TODO: Enable trace
}

6
examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC1769_MemoryMap.xml Normal file
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<!DOCTYPE Board_Memory_Definition_File>
<root name="LPC1769">
<MemorySegment name="FLASH" start="0x00000000" size="0x00080000" access="ReadOnly" />
<MemorySegment name="RAM" start="0x10000000" size="0x00008000" access="Read/Write" />
<MemorySegment name="RAM2" start="0x2007C000" size="0x00008000" access="Read/Write" />
</root>

11058
examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Registers.xml Normal file
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418
examples/host/cdc_msc_hid/ses/lpc175x_6x/LPC176x5x_Vectors.s Normal file
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/*****************************************************************************
* SEGGER Microcontroller GmbH & Co. KG *
* Solutions for real time microcontroller applications *
*****************************************************************************
* *
* (c) 2015 SEGGER Microcontroller GmbH & Co. KG *
* *
* Internet: www.segger.com Support: support@segger.com *
* *
*****************************************************************************/
/*****************************************************************************
* Preprocessor Definitions *
* ------------------------ *
* VECTORS_IN_RAM *
* *
* If defined, an area of RAM will large enough to store the vector table *
* will be reserved. *
* *
*****************************************************************************/
.syntax unified
.code 16
.section .init, "ax"
.align 0
/*****************************************************************************
* Default Exception Handlers *
*****************************************************************************/
.thumb_func
.weak NMI_Handler
NMI_Handler:
b .
.thumb_func
.weak HardFault_Handler
HardFault_Handler:
b .
.thumb_func
.weak SVC_Handler
SVC_Handler:
b .
.thumb_func
.weak PendSV_Handler
PendSV_Handler:
b .
.thumb_func
.weak SysTick_Handler
SysTick_Handler:
b .
.thumb_func
Dummy_Handler:
b .
#if defined(__OPTIMIZATION_SMALL)
.weak WDT_IRQHandler
.thumb_set WDT_IRQHandler,Dummy_Handler
.weak TIMER0_IRQHandler
.thumb_set TIMER0_IRQHandler,Dummy_Handler
.weak TIMER1_IRQHandler
.thumb_set TIMER1_IRQHandler,Dummy_Handler
.weak TIMER2_IRQHandler
.thumb_set TIMER2_IRQHandler,Dummy_Handler
.weak TIMER3_IRQHandler
.thumb_set TIMER3_IRQHandler,Dummy_Handler
.weak UART0_IRQHandler
.thumb_set UART0_IRQHandler,Dummy_Handler
.weak UART1_IRQHandler
.thumb_set UART1_IRQHandler,Dummy_Handler
.weak UART2_IRQHandler
.thumb_set UART2_IRQHandler,Dummy_Handler
.weak UART3_IRQHandler
.thumb_set UART3_IRQHandler,Dummy_Handler
.weak PWM1_IRQHandler
.thumb_set PWM1_IRQHandler,Dummy_Handler
.weak I2C0_IRQHandler
.thumb_set I2C0_IRQHandler,Dummy_Handler
.weak I2C1_IRQHandler
.thumb_set I2C1_IRQHandler,Dummy_Handler
.weak I2C2_IRQHandler
.thumb_set I2C2_IRQHandler,Dummy_Handler
.weak SPI_IRQHandler
.thumb_set SPI_IRQHandler,Dummy_Handler
.weak SSP0_IRQHandler
.thumb_set SSP0_IRQHandler,Dummy_Handler
.weak SSP1_IRQHandler
.thumb_set SSP1_IRQHandler,Dummy_Handler
.weak PLL0_IRQHandler
.thumb_set PLL0_IRQHandler,Dummy_Handler
.weak RTC_IRQHandler
.thumb_set RTC_IRQHandler,Dummy_Handler
.weak EINT0_IRQHandler
.thumb_set EINT0_IRQHandler,Dummy_Handler
.weak EINT1_IRQHandler
.thumb_set EINT1_IRQHandler,Dummy_Handler
.weak EINT2_IRQHandler
.thumb_set EINT2_IRQHandler,Dummy_Handler
.weak EINT3_IRQHandler
.thumb_set EINT3_IRQHandler,Dummy_Handler
.weak ADC_IRQHandler
.thumb_set ADC_IRQHandler,Dummy_Handler
.weak BOD_IRQHandler
.thumb_set BOD_IRQHandler,Dummy_Handler
.weak USB_IRQHandler
.thumb_set USB_IRQHandler,Dummy_Handler
.weak CAN_IRQHandler
.thumb_set CAN_IRQHandler,Dummy_Handler
.weak DMA_IRQHandler
.thumb_set DMA_IRQHandler,Dummy_Handler
.weak I2S_IRQHandler
.thumb_set I2S_IRQHandler,Dummy_Handler
.weak ENET_IRQHandler
.thumb_set ENET_IRQHandler,Dummy_Handler
.weak RIT_IRQHandler
.thumb_set RIT_IRQHandler,Dummy_Handler
.weak MCPWM_IRQHandler
.thumb_set MCPWM_IRQHandler,Dummy_Handler
.weak QEI_IRQHandler
.thumb_set QEI_IRQHandler,Dummy_Handler
.weak PLL1_IRQHandler
.thumb_set PLL1_IRQHandler,Dummy_Handler
.weak USBActivity_IRQHandler
.thumb_set USBActivity_IRQHandler,Dummy_Handler
.weak CANActivity_IRQHandler
.thumb_set CANActivity_IRQHandler,Dummy_Handler
#else
.thumb_func
.weak WDT_IRQHandler
WDT_IRQHandler:
b .
.thumb_func
.weak TIMER0_IRQHandler
TIMER0_IRQHandler:
b .
.thumb_func
.weak TIMER1_IRQHandler
TIMER1_IRQHandler:
b .
.thumb_func
.weak TIMER2_IRQHandler
TIMER2_IRQHandler:
b .
.thumb_func
.weak TIMER3_IRQHandler
TIMER3_IRQHandler:
b .
.thumb_func
.weak UART0_IRQHandler
UART0_IRQHandler:
b .
.thumb_func
.weak UART1_IRQHandler
UART1_IRQHandler:
b .
.thumb_func
.weak UART2_IRQHandler
UART2_IRQHandler:
b .
.thumb_func
.weak UART3_IRQHandler
UART3_IRQHandler:
b .
.thumb_func
.weak PWM1_IRQHandler
PWM1_IRQHandler:
b .
.thumb_func
.weak I2C0_IRQHandler
I2C0_IRQHandler:
b .
.thumb_func
.weak I2C1_IRQHandler
I2C1_IRQHandler:
b .
.thumb_func
.weak I2C2_IRQHandler
I2C2_IRQHandler:
b .
.thumb_func
.weak SPI_IRQHandler
SPI_IRQHandler:
b .
.thumb_func
.weak SSP0_IRQHandler
SSP0_IRQHandler:
b .
.thumb_func
.weak SSP1_IRQHandler
SSP1_IRQHandler:
b .
.thumb_func
.weak PLL0_IRQHandler
PLL0_IRQHandler:
b .
.thumb_func
.weak RTC_IRQHandler
RTC_IRQHandler:
b .
.thumb_func
.weak EINT0_IRQHandler
EINT0_IRQHandler:
b .
.thumb_func
.weak EINT1_IRQHandler
EINT1_IRQHandler:
b .
.thumb_func
.weak EINT2_IRQHandler
EINT2_IRQHandler:
b .
.thumb_func
.weak EINT3_IRQHandler
EINT3_IRQHandler:
b .
.thumb_func
.weak ADC_IRQHandler
ADC_IRQHandler:
b .
.thumb_func
.weak BOD_IRQHandler
BOD_IRQHandler:
b .
.thumb_func
.weak USB_IRQHandler
USB_IRQHandler:
b .
.thumb_func
.weak CAN_IRQHandler
CAN_IRQHandler:
b .
.thumb_func
.weak DMA_IRQHandler
DMA_IRQHandler:
b .
.thumb_func
.weak I2S_IRQHandler
I2S_IRQHandler:
b .
.thumb_func
.weak ENET_IRQHandler
ENET_IRQHandler:
b .
.thumb_func
.weak RIT_IRQHandler
RIT_IRQHandler:
b .
.thumb_func
.weak MCPWM_IRQHandler
MCPWM_IRQHandler:
b .
.thumb_func
.weak QEI_IRQHandler
QEI_IRQHandler:
b .
.thumb_func
.weak PLL1_IRQHandler
PLL1_IRQHandler:
b .
.thumb_func
.weak USBActivity_IRQHandler
USBActivity_IRQHandler:
b .
.thumb_func
.weak CANActivity_IRQHandler
CANActivity_IRQHandler:
b .
#endif
/*****************************************************************************
* Vector Table *
*****************************************************************************/
.section .vectors, "ax"
.align 0
.global _vectors
.extern __stack_end__
.extern Reset_Handler
_vectors:
.word __stack_end__
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word 0 /* Reserved */
.word SVC_Handler
.word 0 /* Reserved */
.word 0 /* Reserved */
.word PendSV_Handler
.word SysTick_Handler
.word WDT_IRQHandler
.word TIMER0_IRQHandler
.word TIMER1_IRQHandler
.word TIMER2_IRQHandler
.word TIMER3_IRQHandler
.word UART0_IRQHandler
.word UART1_IRQHandler
.word UART2_IRQHandler
.word UART3_IRQHandler
.word PWM1_IRQHandler
.word I2C0_IRQHandler
.word I2C1_IRQHandler
.word I2C2_IRQHandler
.word SPI_IRQHandler
.word SSP0_IRQHandler
.word SSP1_IRQHandler
.word PLL0_IRQHandler
.word RTC_IRQHandler
.word EINT0_IRQHandler
.word EINT1_IRQHandler
.word EINT2_IRQHandler
.word EINT3_IRQHandler
.word ADC_IRQHandler
.word BOD_IRQHandler
.word USB_IRQHandler
.word CAN_IRQHandler
.word DMA_IRQHandler
.word I2S_IRQHandler
.word ENET_IRQHandler
.word RIT_IRQHandler
.word MCPWM_IRQHandler
.word QEI_IRQHandler
.word PLL1_IRQHandler
.word USBActivity_IRQHandler
.word CANActivity_IRQHandler
_vectors_end:
#ifdef VECTORS_IN_RAM
.section .vectors_ram, "ax"
.align 0
.global _vectors_ram
_vectors_ram:
.space _vectors_end - _vectors, 0
#endif

37
examples/host/cdc_msc_hid/ses/lpc175x_6x/flash_placement.xml Normal file
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<!DOCTYPE Linker_Placement_File>
<Root name="Flash Section Placement">
<MemorySegment name="$(FLASH_NAME:FLASH)">
<ProgramSection alignment="0x100" load="Yes" name=".vectors" start="$(FLASH_START:)" />
<ProgramSection alignment="4" load="Yes" name=".init" />
<ProgramSection alignment="4" load="Yes" name=".init_rodata" />
<ProgramSection alignment="4" load="Yes" name=".text" />
<ProgramSection alignment="4" load="Yes" name=".dtors" />
<ProgramSection alignment="4" load="Yes" name=".ctors" />
<ProgramSection alignment="4" load="Yes" name=".rodata" />
<ProgramSection alignment="4" load="Yes" name=".ARM.exidx" address_symbol="__exidx_start" end_symbol="__exidx_end" />
<ProgramSection alignment="4" load="Yes" runin=".fast_run" name=".fast" />
<ProgramSection alignment="4" load="Yes" runin=".data_run" name=".data" />
<ProgramSection alignment="4" load="Yes" runin=".tdata_run" name=".tdata" />
</MemorySegment>
<MemorySegment name="$(RAM_NAME:RAM);SRAM">
<ProgramSection alignment="0x100" load="No" name=".vectors_ram" start="$(RAM_START:$(SRAM_START:))" />
<ProgramSection alignment="4" load="No" name=".fast_run" />
<ProgramSection alignment="4" load="No" name=".data_run" />
<ProgramSection alignment="4" load="No" name=".bss" />
<ProgramSection alignment="4" load="No" name=".tbss" />
<ProgramSection alignment="4" load="No" name=".tdata_run" />
<ProgramSection alignment="4" load="No" name=".non_init" />
<ProgramSection alignment="4" size="__HEAPSIZE__" load="No" name=".heap" />
<ProgramSection alignment="8" size="__STACKSIZE__" load="No" place_from_segment_end="Yes" name=".stack" />
<ProgramSection alignment="8" size="__STACKSIZE_PROCESS__" load="No" name=".stack_process" />
</MemorySegment>
<MemorySegment name="$(FLASH2_NAME:FLASH2)">
<ProgramSection alignment="4" load="Yes" name=".text2" />
<ProgramSection alignment="4" load="Yes" name=".rodata2" />
<ProgramSection alignment="4" load="Yes" runin=".data2_run" name=".data2" />
</MemorySegment>
<MemorySegment name="$(RAM2_NAME:RAM2)">
<ProgramSection alignment="4" load="No" name=".data2_run" />
<ProgramSection alignment="4" load="No" name=".bss2" />
</MemorySegment>
</Root>

112
examples/host/cdc_msc_hid/ses/lpc175x_6x/lpc175x_6x.emProject Normal file
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<!DOCTYPE CrossStudio_Project_File>
<solution Name="lpc175x_6x" target="8" version="2">
<project Name="lpc175x_6x">
<configuration
Name="Common"
Placement="Flash"
Target="LPC4357 Cortex-M4"
arm_architecture="v7M"
arm_core_type="Cortex-M3"
arm_endian="Little"
arm_fp_abi="Soft"
arm_fpu_type="None"
arm_interwork="No"
arm_linker_heap_size="1024"
arm_linker_process_stack_size="0"
arm_linker_stack_size="1024"
arm_simulator_memory_simulation_parameter="RX 00000000,00080000,FFFFFFFF;RWX 10000000,00008000,CDCDCDCD"
arm_target_debug_interface_type="ADIv5"
arm_target_device_name="LPC1769"
arm_target_interface_type="SWD"
build_treat_warnings_as_errors="Yes"
c_preprocessor_definitions="LPC175x_6x;__LPC1700_FAMILY;__LPC176x_SUBFAMILY;ARM_MATH_CM3;FLASH_PLACEMENT=1;CORE_M3;BOARD_LPCXPRESSO1769;CFG_TUSB_MCU=OPT_MCU_LPC175X_6X"
c_user_include_directories="../../src;$(rootDir)/hw;$(rootDir)/src;$(lpcDir)/inc"
debug_register_definition_file="LPC176x5x_Registers.xml"
debug_target_connection="J-Link"
gcc_enable_all_warnings="Yes"
gcc_entry_point="Reset_Handler"
link_use_linker_script_file="No"
linker_memory_map_file="LPC1769_MemoryMap.xml"
linker_section_placement_file="flash_placement.xml"
linker_section_placements_segments="FLASH RX 0x00000000 0x00080000;RAM RWX 0x10000000 0x00008000"
macros="DeviceFamily=LPC1700;DeviceSubFamily=LPC176x;Target=LPC1769;Placement=Flash;rootDir=../../../../..;lpcDir=../../../../../hw/mcu/nxp/lpc_chip_175x_6x"
project_directory=""
project_type="Executable"
target_reset_script="Reset();"
target_script_file="$(ProjectDir)/LPC1700_Target.js"
target_trace_initialize_script="EnableTrace(&quot;$(TraceInterfaceType)&quot;)" />
<folder
Name="tinyusb"
exclude=""
filter="*.c;*.h"
path="../../../../../src"
recurse="Yes" />
<folder Name="hw">
<folder Name="bsp">
<file file_name="../../../../../hw/bsp/ansi_escape.h" />
<file file_name="../../../../../hw/bsp/board.h" />
<folder Name="lpcxpresso1769">
<file file_name="../../../../../hw/bsp/lpcxpresso1769/board_lpcxpresso1769.c" />
<file file_name="../../../../../hw/bsp/lpcxpresso1769/board_lpcxpresso1769.h" />
</folder>
</folder>
<folder Name="mcu">
<folder Name="nxp">
<folder Name="lpc_chip_175x_6x">
<folder Name="inc">
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/chip.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/chip_lpc175x_6x.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/chip_lpc177x_8x.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/chip_lpc407x_8x.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/clock_17xx_40xx.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/cmsis.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/cmsis_175x_6x.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/core_cm3.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/core_cmFunc.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/core_cmInstr.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/gpio_17xx_40xx.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/gpioint_17xx_40xx.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/iocon_17xx_40xx.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/lpc_types.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/sys_config.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/sysctl_17xx_40xx.h" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/inc/uart_17xx_40xx.h" />
</folder>
<folder Name="src">
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/src/chip_17xx_40xx.c" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/src/clock_17xx_40xx.c" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/src/gpio_17xx_40xx.c" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/src/iocon_17xx_40xx.c" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/src/sysctl_17xx_40xx.c" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/src/sysinit_17xx_40xx.c" />
<file file_name="../../../../../hw/mcu/nxp/lpc_chip_175x_6x/src/uart_17xx_40xx.c" />
</folder>
</folder>
</folder>
</folder>
</folder>
<configuration Name="Debug" build_treat_warnings_as_errors="Yes" />
<folder
Name="src"
exclude=""
filter="*.c;*.h"
path="../../src"
recurse="Yes" />
<folder Name="System Files">
<file file_name="flash_placement.xml" />
<file file_name="LPC1700_Startup.s" />
<file file_name="LPC1700_Target.js" />
<file file_name="LPC1769_MemoryMap.xml" />
<file file_name="LPC176x5x_Registers.xml" />
<file file_name="LPC176x5x_Vectors.s" />
<file file_name="thumb_crt0.s" />
</folder>
<folder
Name="segger_rtt"
exclude=""
filter="*.c;*.h"
path="../../../../../lib/segger_rtt"
recurse="No" />
</project>
<configuration Name="LPCXpresso 1769" />
</solution>

415
examples/host/cdc_msc_hid/ses/lpc175x_6x/thumb_crt0.s Normal file
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@ -0,0 +1,415 @@
// **********************************************************************
// * SEGGER Microcontroller GmbH *
// * The Embedded Experts *
// **********************************************************************
// * *
// * (c) 2014 - 2018 SEGGER Microcontroller GmbH *
// * (c) 2001 - 2018 Rowley Associates Limited *
// * *
// * www.segger.com Support: support@segger.com *
// * *
// **********************************************************************
// * *
// * All rights reserved. *
// * *
// * Redistribution and use in source and binary forms, with or *
// * without modification, are permitted provided that the following *
// * conditions are met: *
// * *
// * - Redistributions of source code must retain the above copyright *
// * notice, this list of conditions and the following disclaimer. *
// * *
// * - Neither the name of SEGGER Microcontroller GmbH *
// * nor the names of its contributors may be used to endorse or *
// * promote products derived from this software without specific *
// * prior written permission. *
// * *
// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
// * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
// * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
// * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
// * DISCLAIMED. *
// * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
// * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
// * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
// * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
// * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
// * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
// * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
// * DAMAGE. *
// * *
// **********************************************************************
//
//
// Preprocessor Definitions
// ------------------------
// APP_ENTRY_POINT
//
// Defines the application entry point function, if undefined this setting
// defaults to "main".
//
// INITIALIZE_STACK
//
// If defined, the contents of the stack will be initialized to a the
// value 0xCC.
//
// INITIALIZE_SECONDARY_SECTIONS
//
// If defined, the .data2, .text2, .rodata2 and .bss2 sections will be initialized.
//
// INITIALIZE_TCM_SECTIONS
//
// If defined, the .data_tcm, .text_tcm, .rodata_tcm and .bss_tcm sections
// will be initialized.
//
// INITIALIZE_USER_SECTIONS
//
// If defined, the function InitializeUserMemorySections will be called prior
// to entering main in order to allow the user to initialize any user defined
// memory sections.
//
// FULL_LIBRARY
//
// If defined then
// - argc, argv are setup by the debug_getargs.
// - the exit symbol is defined and executes on return from main.
// - the exit symbol calls destructors, atexit functions and then debug_exit.
//
// If not defined then
// - argc and argv are zero.
// - the exit symbol is defined, executes on return from main and loops
//
#ifndef APP_ENTRY_POINT
#define APP_ENTRY_POINT main
#endif
#ifndef ARGSSPACE
#define ARGSSPACE 128
#endif
.syntax unified
.global _start
.extern APP_ENTRY_POINT
.global exit
.weak exit
#ifdef INITIALIZE_USER_SECTIONS
.extern InitializeUserMemorySections
#endif
.section .init, "ax"
.code 16
.balign 2
.thumb_func
_start:
/* Set up main stack if size > 0 */
ldr r1, =__stack_end__
ldr r0, =__stack_start__
subs r2, r1, r0
beq 1f
#ifdef __ARM_EABI__
movs r2, #0x7
bics r1, r2
#endif
mov sp, r1
#ifdef INITIALIZE_STACK
movs r2, #0xCC
ldr r0, =__stack_start__
bl memory_set
#endif
1:
/* Set up process stack if size > 0 */
ldr r1, =__stack_process_end__
ldr r0, =__stack_process_start__
subs r2, r1, r0
beq 1f
#ifdef __ARM_EABI__
movs r2, #0x7
bics r1, r2
#endif
msr psp, r1
movs r2, #2
msr control, r2
#ifdef INITIALIZE_STACK
movs r2, #0xCC
bl memory_set
#endif
1:
/* Copy initialized memory sections into RAM (if necessary). */
ldr r0, =__data_load_start__
ldr r1, =__data_start__
ldr r2, =__data_end__
bl memory_copy
ldr r0, =__text_load_start__
ldr r1, =__text_start__
ldr r2, =__text_end__
bl memory_copy
ldr r0, =__fast_load_start__
ldr r1, =__fast_start__
ldr r2, =__fast_end__
bl memory_copy
ldr r0, =__ctors_load_start__
ldr r1, =__ctors_start__
ldr r2, =__ctors_end__
bl memory_copy
ldr r0, =__dtors_load_start__
ldr r1, =__dtors_start__
ldr r2, =__dtors_end__
bl memory_copy
ldr r0, =__rodata_load_start__
ldr r1, =__rodata_start__
ldr r2, =__rodata_end__
bl memory_copy
ldr r0, =__tdata_load_start__
ldr r1, =__tdata_start__
ldr r2, =__tdata_end__
bl memory_copy
#ifdef INITIALIZE_SECONDARY_SECTIONS
ldr r0, =__data2_load_start__
ldr r1, =__data2_start__
ldr r2, =__data2_end__
bl memory_copy
ldr r0, =__text2_load_start__
ldr r1, =__text2_start__
ldr r2, =__text2_end__
bl memory_copy
ldr r0, =__rodata2_load_start__
ldr r1, =__rodata2_start__
ldr r2, =__rodata2_end__
bl memory_copy
#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
#ifdef INITIALIZE_TCM_SECTIONS
ldr r0, =__data_tcm_load_start__
ldr r1, =__data_tcm_start__
ldr r2, =__data_tcm_end__
bl memory_copy
ldr r0, =__text_tcm_load_start__
ldr r1, =__text_tcm_start__
ldr r2, =__text_tcm_end__
bl memory_copy
ldr r0, =__rodata_tcm_load_start__
ldr r1, =__rodata_tcm_start__
ldr r2, =__rodata_tcm_end__
bl memory_copy
#endif /* #ifdef INITIALIZE_TCM_SECTIONS */
/* Zero the bss. */
ldr r0, =__bss_start__
ldr r1, =__bss_end__
movs r2, #0
bl memory_set
ldr r0, =__tbss_start__
ldr r1, =__tbss_end__
movs r2, #0
bl memory_set
#ifdef INITIALIZE_SECONDARY_SECTIONS
ldr r0, =__bss2_start__
ldr r1, =__bss2_end__
mov r2, #0
bl memory_set
#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
#ifdef INITIALIZE_TCM_SECTIONS
ldr r0, =__bss_tcm_start__
ldr r1, =__bss_tcm_end__
mov r2, #0
bl memory_set
#endif /* #ifdef INITIALIZE_TCM_SECTIONS */
/* Initialize the heap */
ldr r0, = __heap_start__
ldr r1, = __heap_end__
subs r1, r1, r0
cmp r1, #8
blt 1f
movs r2, #0
str r2, [r0]
adds r0, r0, #4
str r1, [r0]
1:
#ifdef INITIALIZE_USER_SECTIONS
ldr r2, =InitializeUserMemorySections
blx r2
#endif
/* Call constructors */
ldr r0, =__ctors_start__
ldr r1, =__ctors_end__
ctor_loop:
cmp r0, r1
beq ctor_end
ldr r2, [r0]
adds r0, #4
push {r0-r1}
blx r2
pop {r0-r1}
b ctor_loop
ctor_end:
/* Setup initial call frame */
movs r0, #0
mov lr, r0
mov r12, sp
.type start, function
start:
/* Jump to application entry point */
#ifdef FULL_LIBRARY
movs r0, #ARGSSPACE
ldr r1, =args
ldr r2, =debug_getargs
blx r2
ldr r1, =args
#else
movs r0, #0
movs r1, #0
#endif
ldr r2, =APP_ENTRY_POINT
blx r2
.thumb_func
exit:
#ifdef FULL_LIBRARY
mov r5, r0 // save the exit parameter/return result
/* Call destructors */
ldr r0, =__dtors_start__
ldr r1, =__dtors_end__
dtor_loop:
cmp r0, r1
beq dtor_end
ldr r2, [r0]
add r0, #4
push {r0-r1}
blx r2
pop {r0-r1}
b dtor_loop
dtor_end:
/* Call atexit functions */
ldr r2, =_execute_at_exit_fns
blx r2
/* Call debug_exit with return result/exit parameter */
mov r0, r5
ldr r2, =debug_exit
blx r2
#endif
/* Returned from application entry point, loop forever. */
exit_loop:
b exit_loop
.thumb_func
memory_copy:
cmp r0, r1
beq 2f
subs r2, r2, r1
beq 2f
1:
ldrb r3, [r0]
adds r0, r0, #1
strb r3, [r1]
adds r1, r1, #1
subs r2, r2, #1
bne 1b
2:
bx lr
.thumb_func
memory_set:
cmp r0, r1
beq 1f
strb r2, [r0]
adds r0, r0, #1
b memory_set
1:
bx lr
// default C/C++ library helpers
.macro HELPER helper_name
.section .text.\helper_name, "ax", %progbits
.balign 2
.global \helper_name
.weak \helper_name
\helper_name:
.thumb_func
.endm
.macro JUMPTO name
#if defined(__thumb__) && !defined(__thumb2__)
mov r12, r0
ldr r0, =\name
push {r0}
mov r0, r12
pop {pc}
#else
b \name
#endif
.endm
HELPER __aeabi_read_tp
ldr r0, =__tbss_start__-8
bx lr
HELPER abort
b .
HELPER __assert
b .
HELPER __aeabi_assert
b .
HELPER __sync_synchronize
bx lr
HELPER __getchar
JUMPTO debug_getchar
HELPER __putchar
JUMPTO debug_putchar
HELPER __open
JUMPTO debug_fopen
HELPER __close
JUMPTO debug_fclose
HELPER __write
mov r3, r0
mov r0, r1
movs r1, #1
JUMPTO debug_fwrite
HELPER __read
mov r3, r0
mov r0, r1
movs r1, #1
JUMPTO debug_fread
HELPER __seek
push {r4, lr}
mov r4, r0
bl debug_fseek
cmp r0, #0
bne 1f
mov r0, r4
bl debug_ftell
pop {r4, pc}
1:
ldr r0, =-1
pop {r4, pc}
// char __user_locale_name_buffer[];
.section .bss.__user_locale_name_buffer, "aw", %nobits
.global __user_locale_name_buffer
.weak __user_locale_name_buffer
__user_locale_name_buffer:
.word 0x0
#ifdef FULL_LIBRARY
.bss
args:
.space ARGSSPACE
#endif
/* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
.section .stack, "wa", %nobits
.section .stack_process, "wa", %nobits
.section .heap, "wa", %nobits

4
examples/host/cdc_msc_hid/src/main.c
View File

@ -101,6 +101,10 @@ void tuh_cdc_unmounted_cb(uint8_t dev_addr)
// invoked ISR context
void tuh_cdc_xfer_isr(uint8_t dev_addr, xfer_result_t event, cdc_pipeid_t pipe_id, uint32_t xferred_bytes)
{
(void) event;
(void) pipe_id;
(void) xferred_bytes;
printf(serial_in_buffer);
tu_memclr(serial_in_buffer, sizeof(serial_in_buffer));

2
examples/host/cdc_msc_hid/src/tusb_config.h
View File

@ -55,7 +55,7 @@
#if CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX
#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST | OPT_MODE_HIGH_SPEED)
#else
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_DEVICE
#define CFG_TUSB_RHPORT0_MODE OPT_MODE_HOST
#endif
#define CFG_TUSB_DEBUG 2

6
src/host/hcd.h
View File

@ -51,8 +51,8 @@
typedef enum
{
HCD_EVENT_DEVICE_PLUG,
HCD_EVENT_DEVICE_UNPLUG,
HCD_EVENT_DEVICE_ATTACH,
HCD_EVENT_DEVICE_REMOVE,
HCD_EVENT_XFER_COMPLETE,
} hcd_eventid_t;
@ -67,7 +67,7 @@ typedef struct
{
uint8_t hub_addr;
uint8_t hub_port;
} plug, unplug;
} attach, remove;
struct
{

33
src/host/ohci/ohci.c
View File

@ -42,13 +42,15 @@
//--------------------------------------------------------------------+
// INCLUDE
//--------------------------------------------------------------------+
#include "hal/hal.h"
#include "osal/osal.h"
#include "../hcd.h"
#include "../usbh_hcd.h"
#include "ohci.h"
// TODO remove
#include "chip.h"
//--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+
@ -206,16 +208,19 @@ tusb_error_t hcd_init(void)
//--------------------------------------------------------------------+
void hcd_port_reset(uint8_t hostid)
{
(void) hostid;
OHCI_REG->rhport_status[0] = OHCI_RHPORT_PORT_RESET_STATUS_MASK;
}
bool hcd_port_connect_status(uint8_t hostid)
{
(void) hostid;
return OHCI_REG->rhport_status_bit[0].current_connect_status;
}
tusb_speed_t hcd_port_speed_get(uint8_t hostid)
{
(void) hostid;
return OHCI_REG->rhport_status_bit[0].low_speed_device_attached ? TUSB_SPEED_LOW : TUSB_SPEED_FULL;
}
@ -223,6 +228,7 @@ tusb_speed_t hcd_port_speed_get(uint8_t hostid)
void hcd_port_unplug(uint8_t hostid)
{
// TODO OHCI
(void) hostid;
}
//--------------------------------------------------------------------+
@ -242,6 +248,8 @@ static inline tusb_xfer_type_t ed_get_xfer_type(ohci_ed_t const * const p_ed)
static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type, uint8_t interval)
{
(void) interval;
// address 0 is used as async head, which always on the list --> cannot be cleared
if (dev_addr != 0)
{
@ -251,7 +259,7 @@ static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t max_packet_size,
p_ed->device_address = dev_addr;
p_ed->endpoint_number = endpoint_addr & 0x0F;
p_ed->direction = (xfer_type == TUSB_XFER_CONTROL) ? OHCI_PID_SETUP : ( (endpoint_addr & TUSB_DIR_IN_MASK) ? OHCI_PID_IN : OHCI_PID_OUT );
p_ed->speed = usbh_devices[dev_addr].speed;
p_ed->speed = _usbh_devices[dev_addr].speed;
p_ed->is_iso = (xfer_type == TUSB_XFER_ISOCHRONOUS) ? 1 : 0;
p_ed->max_package_size = max_packet_size;
@ -274,6 +282,22 @@ static void gtd_init(ohci_gtd_t* p_td, void* data_ptr, uint16_t total_bytes)
p_td->buffer_end = total_bytes ? (((uint8_t*) data_ptr) + total_bytes-1) : NULL;
}
bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc)
{
// FIXME control only for now
(void) rhport;
return hcd_pipe_control_open(dev_addr, ep_desc->wMaxPacketSize.size);
}
bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr)
{
// FIXME control only for now
(void) rhport;
(void) ep_addr;
return hcd_pipe_control_close(dev_addr);
}
tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
{
ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed;
@ -346,7 +370,7 @@ tusb_error_t hcd_pipe_control_close(uint8_t dev_addr)
ed_list_remove( p_ed_head[ ed_get_xfer_type(p_ed)], p_ed );
// TODO refractor to be USBH
usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_UNPLUG;
_usbh_devices[dev_addr].state = TUSB_DEVICE_STATE_UNPLUG;
}
return TUSB_ERROR_NONE;
@ -496,6 +520,7 @@ tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint
tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
{
(void) int_on_complete;
TU_ASSERT_ERR( pipe_queue_xfer(pipe_hdl, buffer, total_bytes, true) );
tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_pipe_handle(pipe_hdl) );
@ -607,6 +632,8 @@ static inline uint32_t gtd_xfer_byte_left(uint32_t buffer_end, uint32_t current_
static void done_queue_isr(uint8_t hostid)
{
(void) hostid;
uint8_t max_loop = (CFG_TUSB_HOST_DEVICE_MAX+1)*(HCD_MAX_XFER+OHCI_MAX_ITD);
// done head is written in reversed order of completion --> need to reverse the done queue first

35
src/host/usbh.c
View File

@ -193,13 +193,17 @@ bool usbh_init(void)
bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8_t* data)
{
usbh_device_t* dev = &_usbh_devices[dev_addr];
const uint8_t rhport = dev->core_id;
//const uint8_t rhport = dev->core_id;
TU_ASSERT(osal_mutex_lock(dev->control.mutex_hdl, OSAL_TIMEOUT_NORMAL));
dev->control.request = *request;
dev->control.pipe_status = 0;
#if 1
TU_ASSERT(hcd_pipe_control_xfer(dev_addr, &dev->control.request, data));
TU_ASSERT(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL));
#else
// Setup Stage
hcd_setup_send(rhport, dev_addr, (uint8_t*) &dev->control.request);
TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL));
@ -214,6 +218,7 @@ bool usbh_control_xfer (uint8_t dev_addr, tusb_control_request_t* request, uint8
// Status : data toggle is always 1
hcd_edpt_xfer(rhport, dev_addr, edpt_addr(0, 1-request->bmRequestType_bit.direction), NULL, 0);
TU_VERIFY(osal_semaphore_wait(dev->control.sem_hdl, OSAL_TIMEOUT_NORMAL));
#endif
osal_mutex_unlock(dev->control.mutex_hdl);
@ -231,7 +236,7 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
{
osal_semaphore_reset( _usbh_devices[dev_addr].control.sem_hdl );
//osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl );
tusb_desc_endpoint_t ep0_desc =
{
.bLength = sizeof(tusb_desc_endpoint_t),
@ -296,11 +301,11 @@ void usbh_hub_port_plugged_isr(uint8_t hub_addr, uint8_t hub_port)
hcd_event_t event =
{
.rhport = _usbh_devices[hub_addr].core_id,
.event_id = HCD_EVENT_DEVICE_PLUG
.event_id = HCD_EVENT_DEVICE_ATTACH
};
event.plug.hub_addr = hub_addr;
event.plug.hub_port = hub_port;
event.attach.hub_addr = hub_addr;
event.attach.hub_port = hub_port;
hcd_event_handler(&event, true);
}
@ -310,11 +315,11 @@ void usbh_hcd_rhport_plugged_isr(uint8_t hostid)
hcd_event_t event =
{
.rhport = hostid,
.event_id = HCD_EVENT_DEVICE_PLUG
.event_id = HCD_EVENT_DEVICE_ATTACH
};
event.plug.hub_addr = 0;
event.plug.hub_port = 0;
event.attach.hub_addr = 0;
event.attach.hub_port = 0;
hcd_event_handler(&event, true);
}
@ -374,11 +379,11 @@ void usbh_hcd_rhport_unplugged_isr(uint8_t hostid)
hcd_event_t event =
{
.rhport = hostid,
.event_id = HCD_EVENT_DEVICE_UNPLUG
.event_id = HCD_EVENT_DEVICE_REMOVE
};
event.plug.hub_addr = 0;
event.plug.hub_port = 0;
event.attach.hub_addr = 0;
event.attach.hub_port = 0;
hcd_event_handler(&event, true);
}
@ -402,8 +407,8 @@ bool enum_task(hcd_event_t* event)
tusb_control_request_t request;
dev0->core_id = event->rhport; // TODO refractor integrate to device_pool
dev0->hub_addr = event->plug.hub_addr;
dev0->hub_port = event->plug.hub_port;
dev0->hub_addr = event->attach.hub_addr;
dev0->hub_port = event->attach.hub_port;
dev0->state = TUSB_DEVICE_STATE_UNPLUG;
//------------- connected/disconnected directly with roothub -------------//
@ -644,8 +649,8 @@ bool usbh_task_body(void)
switch (event.event_id)
{
case HCD_EVENT_DEVICE_PLUG:
case HCD_EVENT_DEVICE_UNPLUG:
case HCD_EVENT_DEVICE_ATTACH:
case HCD_EVENT_DEVICE_REMOVE:
enum_task(&event);
break;

19
src/portable/nxp/lpc17_40/hal_lpc17_40.c
View File

@ -42,10 +42,11 @@
#include "chip.h"
extern void hal_hcd_isr(uint8_t hostid);
extern void hal_dcd_isr(uint8_t rhport);
void USB_IRQHandler(void)
{
extern void hal_dcd_isr(uint8_t rhport);
#if MODE_HOST_SUPPORTED
hal_hcd_isr(0);
#endif
@ -55,4 +56,18 @@ void USB_IRQHandler(void)
#endif
}
//FIXME move later
void hcd_int_enable(uint8_t rhport)
{
(void) rhport;
NVIC_EnableIRQ(USB_IRQn);
}
void hcd_int_disable(uint8_t rhport)
{
(void) rhport;
NVIC_DisableIRQ(USB_IRQn);
}
#endif