Implement EP with size <64.
This commit is contained in:
Nathan Conrad
parent
18303e742e
commit
05c13342a3
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@ -154,16 +154,13 @@ TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_LENGTH))<=(PMA_LEN
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TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) % 8) == 0, "BTABLE base must be aligned to 8 bytes");
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// Max size of a USB FS packet is 64...
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#define MAX_PACKET_SIZE 64
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// One of these for every EP IN & OUT, uses a bit of RAM....
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typedef struct
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{
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uint8_t * buffer;
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uint16_t total_len;
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uint16_t queued_len;
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uint16_t max_packet_size;
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} xfer_ctl_t;
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static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
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@ -357,7 +354,7 @@ static void dcd_handle_bus_reset(void)
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// FIXME: Defined to return uint16 so that ASSERT can be used, even though a return value is not needed.
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static uint16_t dcd_ep_ctr_handler(void)
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{
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uint16_t count=0U;
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unsigned int count=0U;
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uint8_t EPindex;
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__IO uint16_t wIstr;
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__IO uint16_t wEPVal = 0U;
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@ -390,7 +387,7 @@ static uint16_t dcd_ep_ctr_handler(void)
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{
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// Delayed setting of the DADDR after the 0-len DATA packet acking the request is sent.
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reg16_clear_bits(&USB->DADDR, USB_DADDR_ADD);
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USB->DADDR |= (uint16_t)newDADDR; // leave the enable bit set
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USB->DADDR = (uint16_t)(USB->DADDR | newDADDR); // leave the enable bit set
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newDADDR = 0;
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}
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if(xfer->total_len == 0) // Probably a status message?
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@ -481,7 +478,7 @@ static uint16_t dcd_ep_ctr_handler(void)
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/*multi-packet on the NON control OUT endpoint */
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xfer->queued_len = (uint16_t)(xfer->queued_len + count);
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if ((count < 64) || (xfer->queued_len == xfer->total_len))
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if ((count < xfer->max_packet_size) || (xfer->queued_len == xfer->total_len))
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{
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/* RX COMPLETE */
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dcd_event_xfer_complete(0, EPindex, xfer->queued_len, XFER_RESULT_SUCCESS, true);
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@ -490,9 +487,9 @@ static uint16_t dcd_ep_ctr_handler(void)
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}
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else
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{
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uint16_t remaining = (uint16_t)(xfer->total_len - xfer->queued_len);
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if(remaining >=64) {
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pcd_set_ep_rx_cnt(USB, EPindex,64);
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uint32_t remaining = (uint32_t)xfer->total_len - (uint32_t)xfer->queued_len;
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if(remaining >= xfer->max_packet_size) {
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pcd_set_ep_rx_cnt(USB, EPindex,xfer->max_packet_size);
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} else {
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pcd_set_ep_rx_cnt(USB, EPindex,remaining);
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}
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@ -575,14 +572,33 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
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(void)rhport;
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uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
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uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
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const uint16_t epMaxPktSize = p_endpoint_desc->wMaxPacketSize.size;
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// Isochronous not supported (yet), and some other driver assumptions.
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#ifndef NDEBUG
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TU_ASSERT(p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
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TU_ASSERT(p_endpoint_desc->wMaxPacketSize.size <= MAX_PACKET_SIZE);
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TU_ASSERT(epnum < MAX_EP_COUNT);
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TU_ASSERT((p_endpoint_desc->wMaxPacketSize.size %2) == 0);
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// __IO uint16_t * const epreg = &(EPREG(epnum));
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switch(p_endpoint_desc->bmAttributes.xfer) {
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case TUSB_XFER_CONTROL:
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// USB 2.0 spec on FS packets, 5.5.3 (control)
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TU_ASSERT((epMaxPktSize == 8) ||(epMaxPktSize == 16) || (epMaxPktSize == 32) || (epMaxPktSize == 64));
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break;
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case TUSB_XFER_ISOCHRONOUS: // FIXME: Not yet supported
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TU_ASSERT(epMaxPktSize <= 1023);
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break;
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case TUSB_XFER_BULK:
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// USB 2.0 spec on FS packets, 5.8.3 (bulk)
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TU_ASSERT((epMaxPktSize == 8) ||(epMaxPktSize == 16) ||(epMaxPktSize == 32) ||(epMaxPktSize == 64));
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break;
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case TUSB_XFER_INTERRUPT:
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// USB 2.0 spec on FS packets, 5.5.3 (interrupt); interestingly 0 is allowed.
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TU_ASSERT(epMaxPktSize <= 64);
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break;
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default:
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TU_ASSERT(false);
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return false;
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}
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#endif
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// Set type
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switch(p_endpoint_desc->bmAttributes.xfer) {
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@ -626,6 +642,7 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
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pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
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}
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xfer_ctl_ptr(epnum, dir)->max_packet_size = epMaxPktSize;
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ep_buf_ptr = (uint16_t)(ep_buf_ptr + p_endpoint_desc->wMaxPacketSize.size); // increment buffer pointer
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return true;
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@ -637,11 +654,12 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix)
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{
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uint16_t len = (uint16_t)(xfer->total_len - xfer->queued_len);
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if(len > 64u) // max packet size for FS transfer
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if(len > xfer->max_packet_size) // max packet size for FS transfer
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{
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len = 64u;
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len = xfer->max_packet_size;
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}
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dcd_write_packet_memory(*pcd_ep_tx_address_ptr(USB,ep_ix), &(xfer->buffer[xfer->queued_len]), len);
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uint16_t oldAddr = *pcd_ep_tx_address_ptr(USB,ep_ix);
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dcd_write_packet_memory(oldAddr, &(xfer->buffer[xfer->queued_len]), len);
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xfer->queued_len = (uint16_t)(xfer->queued_len + len);
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pcd_set_ep_tx_cnt(USB,ep_ix,len);
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@ -670,9 +688,9 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
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xfer->buffer = (uint8_t*)_setup_packet;
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pcd_set_ep_kind(USB,0); // Expect a zero-byte INPUT
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}
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if(total_bytes > 64)
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if(total_bytes > xfer->max_packet_size)
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{
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pcd_set_ep_rx_cnt(USB,epnum,64);
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pcd_set_ep_rx_cnt(USB,epnum,xfer->max_packet_size);
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} else {
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pcd_set_ep_rx_cnt(USB,epnum,total_bytes);
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}
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@ -740,16 +758,17 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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*/
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static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes)
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{
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uint32_t n = ((uint32_t)((uint32_t)wNBytes + 1U)) >> 1U;
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uint32_t n = ((uint32_t)wNBytes + 1U) >> 1U;
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uint32_t i;
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uint16_t temp1, temp2;
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const uint8_t * srcVal;
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#ifdef DEBUG
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#ifndef NDEBUG
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# if (DCD_STM32_BTABLE_BASE > 0u)
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TU_ASSERT(dst >= DCD_STM32_BTABLE_BASE);
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# endif
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TU_ASSERT(((dst%2) == 0) && (dst + wNBytes) <= (DCD_STM32_BTABLE_BASE + DCD_STM32_BTABLE_LENGTH));
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TU_ASSERT((dst%2) == 0);
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TU_ASSERT((dst + wNBytes) <= (DCD_STM32_BTABLE_BASE + DCD_STM32_BTABLE_LENGTH));
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#endif
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// The GCC optimizer will combine access to 32-bit sizes if we let it. Force
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@ -786,11 +805,12 @@ static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wN
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__IO const uint16_t *pdwVal;
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uint32_t temp;
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#ifdef DEBUG
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#ifndef NDEBUG
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# if (DCD_STM32_BTABLE_BASE > 0u)
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TU_ASSERT(src >= DCD_STM32_BTABLE_BASE);
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# endif
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TU_ASSERT(((src%2) == 0) && (src + wNBytes) <= (DCD_STM32_BTABLE_BASE + DCD_STM32_BTABLE_LENGTH));
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TU_ASSERT((src%2) == 0);
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TU_ASSERT((src + wNBytes) <= (DCD_STM32_BTABLE_BASE + DCD_STM32_BTABLE_LENGTH));
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#endif
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