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Covert macros to inline functions.

This commit is contained in:
Nathan Conrad 2019-09-15 23:37:57 -04:00
parent ae873a709e
commit 18303e742e
3 changed files with 292 additions and 167 deletions
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4
.gitignore vendored
View File

@ -15,3 +15,7 @@ latex
test_old/
tests_obsolete/
_build
# coverity intermediate files
cov-int
# cppcheck build directories
*-build-dir

141
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
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@ -147,7 +147,7 @@
* Checks, structs, defines, function definitions, etc.
*/
TU_VERIFY_STATIC((MAX_EP_COUNT) <= STFSDEV_EP_COUNT,"Only 8 endpoints supported on the hardware");
TU_VERIFY_STATIC((MAX_EP_COUNT) <= STFSDEV_EP_COUNT, "Only 8 endpoints supported on the hardware");
TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_LENGTH))<=(PMA_LENGTH),
"BTABLE does not fit in PMA RAM");
@ -166,8 +166,17 @@ typedef struct
uint16_t queued_len;
} xfer_ctl_t;
static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
#define XFER_CTL_BASE(_epnum, _dir) &xfer_status[_epnum][_dir]
static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
static xfer_ctl_t* xfer_ctl_ptr(unsigned int epnum, unsigned int dir)
{
#ifndef NDEBUG
TU_ASSERT(epnum < MAX_EP_COUNT);
TU_ASSERT(dir < 2u);
#endif
return &xfer_status[epnum][dir];
}
static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[6];
@ -224,7 +233,7 @@ void dcd_init (uint8_t rhport)
for(uint32_t i=0; i<STFSDEV_EP_COUNT; i++)
{
// This doesn't clear all bits since some bits are "toggle", but does set the type to DISABLED.
PCD_GET_ENDPOINT(USB,i) = 0u;
pcd_set_endpoint(USB,i,0u);
}
// Initialize the BTABLE for EP0 at this point (though setting up the EP0R is unneeded)
@ -334,7 +343,7 @@ static void dcd_handle_bus_reset(void)
// Clear all EPREG (or maybe this is automatic? I'm not sure)
for(uint32_t i=0; i<STFSDEV_EP_COUNT; i++)
{
PCD_GET_ENDPOINT(USB,i) = 0u;
pcd_set_endpoint(USB,i,0u);
}
ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8*MAX_EP_COUNT; // 8 bytes per endpoint (two TX and two RX words, each)
@ -342,7 +351,7 @@ static void dcd_handle_bus_reset(void)
dcd_edpt_open (0, &ep0IN_desc);
newDADDR = 0u;
USB->DADDR = USB_DADDR_EF; // Set enable flag, and leaving the device address as zero.
PCD_SET_EP_RX_STATUS(USB, 0, USB_EP_RX_VALID); // And start accepting SETUP on EP0
pcd_set_ep_rx_status(USB, 0, USB_EP_RX_VALID); // And start accepting SETUP on EP0
}
// FIXME: Defined to return uint16 so that ASSERT can be used, even though a return value is not needed.
@ -370,9 +379,9 @@ static uint16_t dcd_ep_ctr_handler(void)
{
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(USB, 0);
pcd_clear_tx_ep_ctr(USB, 0);
xfer_ctl_t * xfer = XFER_CTL_BASE(EPindex,TUSB_DIR_IN);
xfer_ctl_t * xfer = xfer_ctl_ptr(EPindex,TUSB_DIR_IN);
if((xfer->total_len == xfer->queued_len))
{
@ -386,7 +395,7 @@ static uint16_t dcd_ep_ctr_handler(void)
}
if(xfer->total_len == 0) // Probably a status message?
{
PCD_CLEAR_RX_DTOG(USB,EPindex);
pcd_clear_rx_dtog(USB,EPindex);
}
}
else
@ -399,10 +408,10 @@ static uint16_t dcd_ep_ctr_handler(void)
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
xfer_ctl_t *xfer = XFER_CTL_BASE(EPindex,TUSB_DIR_OUT);
xfer_ctl_t *xfer = xfer_ctl_ptr(EPindex,TUSB_DIR_OUT);
//ep = &hpcd->OUT_ep[0];
wEPVal = PCD_GET_ENDPOINT(USB, EPindex);
wEPVal = pcd_get_endpoint(USB, EPindex);
if ((wEPVal & USB_EP_SETUP) != 0U) // SETUP
{
@ -410,38 +419,38 @@ static uint16_t dcd_ep_ctr_handler(void)
// user memory, to allow for the 32-bit access that memcpy performs.
uint8_t userMemBuf[8];
/* Get SETUP Packet*/
count = PCD_GET_EP_RX_CNT(USB, EPindex);
count = pcd_get_ep_rx_cnt(USB, EPindex);
//TU_ASSERT_ERR(count == 8);
dcd_read_packet_memory(userMemBuf, *PCD_EP_RX_ADDRESS_PTR(USB,EPindex), 8);
dcd_read_packet_memory(userMemBuf, *pcd_ep_rx_address_ptr(USB,EPindex), 8);
/* SETUP bit kept frozen while CTR_RX = 1*/
dcd_event_setup_received(0, (uint8_t*)userMemBuf, true);
PCD_CLEAR_RX_EP_CTR(USB, EPindex);
pcd_clear_rx_ep_ctr(USB, EPindex);
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U) // OUT
{
PCD_CLEAR_RX_EP_CTR(USB, EPindex);
pcd_clear_rx_ep_ctr(USB, EPindex);
/* Get Control Data OUT Packet */
count = PCD_GET_EP_RX_CNT(USB,EPindex);
count = pcd_get_ep_rx_cnt(USB,EPindex);
if (count != 0U)
{
dcd_read_packet_memory(xfer->buffer, *PCD_EP_RX_ADDRESS_PTR(USB,EPindex), count);
dcd_read_packet_memory(xfer->buffer, *pcd_ep_rx_address_ptr(USB,EPindex), count);
xfer->queued_len = (uint16_t)(xfer->queued_len + count);
}
/* Process Control Data OUT status Packet*/
if(EPindex == 0u && xfer->total_len == 0u)
{
PCD_CLEAR_EP_KIND(USB,0); // Good, so allow non-zero length packets now.
pcd_clear_ep_kind(USB,0); // Good, so allow non-zero length packets now.
}
dcd_event_xfer_complete(0, EPindex, xfer->total_len, XFER_RESULT_SUCCESS, true);
PCD_SET_EP_RX_CNT(USB, EPindex, CFG_TUD_ENDPOINT0_SIZE);
pcd_set_ep_rx_cnt(USB, EPindex, CFG_TUD_ENDPOINT0_SIZE);
if(EPindex == 0u && xfer->total_len == 0u)
{
PCD_SET_EP_RX_STATUS(USB, EPindex, USB_EP_RX_VALID);// Await next SETUP
pcd_set_ep_rx_status(USB, EPindex, USB_EP_RX_VALID);// Await next SETUP
}
}
@ -452,21 +461,21 @@ static uint16_t dcd_ep_ctr_handler(void)
{
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(USB, EPindex);
wEPVal = pcd_get_endpoint(USB, EPindex);
if ((wEPVal & USB_EP_CTR_RX) != 0U) // OUT
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(USB, EPindex);
pcd_clear_rx_ep_ctr(USB, EPindex);
xfer_ctl_t * xfer = XFER_CTL_BASE(EPindex,TUSB_DIR_OUT);
xfer_ctl_t * xfer = xfer_ctl_ptr(EPindex,TUSB_DIR_OUT);
//ep = &hpcd->OUT_ep[EPindex];
count = PCD_GET_EP_RX_CNT(USB, EPindex);
count = pcd_get_ep_rx_cnt(USB, EPindex);
if (count != 0U)
{
dcd_read_packet_memory(&(xfer->buffer[xfer->queued_len]),
*PCD_EP_RX_ADDRESS_PTR(USB,EPindex), count);
*pcd_ep_rx_address_ptr(USB,EPindex), count);
}
/*multi-packet on the NON control OUT endpoint */
@ -483,12 +492,12 @@ static uint16_t dcd_ep_ctr_handler(void)
{
uint16_t remaining = (uint16_t)(xfer->total_len - xfer->queued_len);
if(remaining >=64) {
PCD_SET_EP_RX_CNT(USB, EPindex,64);
pcd_set_ep_rx_cnt(USB, EPindex,64);
} else {
PCD_SET_EP_RX_CNT(USB, EPindex,remaining);
pcd_set_ep_rx_cnt(USB, EPindex,remaining);
}
PCD_SET_EP_RX_STATUS(USB, EPindex, USB_EP_RX_VALID);
pcd_set_ep_rx_status(USB, EPindex, USB_EP_RX_VALID);
}
} /* if((wEPVal & EP_CTR_RX) */
@ -496,9 +505,9 @@ static uint16_t dcd_ep_ctr_handler(void)
if ((wEPVal & USB_EP_CTR_TX) != 0U) // IN
{
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(USB, EPindex);
pcd_clear_tx_ep_ctr(USB, EPindex);
xfer_ctl_t * xfer = XFER_CTL_BASE(EPindex,TUSB_DIR_IN);
xfer_ctl_t * xfer = xfer_ctl_ptr(EPindex,TUSB_DIR_IN);
if (xfer->queued_len != xfer->total_len) // data remaining in transfer?
{
@ -578,33 +587,43 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
// Set type
switch(p_endpoint_desc->bmAttributes.xfer) {
case TUSB_XFER_CONTROL:
PCD_SET_EPTYPE(USB, epnum, USB_EP_CONTROL); break;
case TUSB_XFER_ISOCHRONOUS:
PCD_SET_EPTYPE(USB, epnum, USB_EP_ISOCHRONOUS); break;
pcd_set_eptype(USB, epnum, USB_EP_CONTROL);
break;
#if (0)
case TUSB_XFER_ISOCHRONOUS: // FIXME: Not yet supported
pcd_set_eptype(USB, epnum, USB_EP_ISOCHRONOUS); break;
break;
#endif
case TUSB_XFER_BULK:
PCD_SET_EPTYPE(USB, epnum, USB_EP_BULK); break;
pcd_set_eptype(USB, epnum, USB_EP_BULK);
break;
case TUSB_XFER_INTERRUPT:
PCD_SET_EPTYPE(USB, epnum, USB_EP_INTERRUPT); break;
pcd_set_eptype(USB, epnum, USB_EP_INTERRUPT);
break;
default:
TU_ASSERT(false);
return false;
}
PCD_SET_EP_ADDRESS(USB, epnum, epnum);
PCD_CLEAR_EP_KIND(USB,0); // Be normal, for now, instead of only accepting zero-byte packets
pcd_set_ep_address(USB, epnum, epnum);
pcd_clear_ep_kind(USB,0); // Be normal, for now, instead of only accepting zero-byte packets
if(dir == TUSB_DIR_IN)
{
*PCD_EP_TX_ADDRESS_PTR(USB, epnum) = ep_buf_ptr;
PCD_SET_EP_TX_CNT(USB, epnum, p_endpoint_desc->wMaxPacketSize.size);
PCD_CLEAR_TX_DTOG(USB, epnum);
PCD_SET_EP_TX_STATUS(USB,epnum,USB_EP_TX_NAK);
*pcd_ep_tx_address_ptr(USB, epnum) = ep_buf_ptr;
pcd_set_ep_tx_cnt(USB, epnum, p_endpoint_desc->wMaxPacketSize.size);
pcd_clear_tx_dtog(USB, epnum);
pcd_set_ep_tx_status(USB,epnum,USB_EP_TX_NAK);
}
else
{
*PCD_EP_RX_ADDRESS_PTR(USB, epnum) = ep_buf_ptr;
PCD_SET_EP_RX_CNT(USB, epnum, p_endpoint_desc->wMaxPacketSize.size);
PCD_CLEAR_RX_DTOG(USB, epnum);
PCD_SET_EP_RX_STATUS(USB, epnum, USB_EP_RX_NAK);
*pcd_ep_rx_address_ptr(USB, epnum) = ep_buf_ptr;
pcd_set_ep_rx_cnt(USB, epnum, p_endpoint_desc->wMaxPacketSize.size);
pcd_clear_rx_dtog(USB, epnum);
pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
}
ep_buf_ptr = (uint16_t)(ep_buf_ptr + p_endpoint_desc->wMaxPacketSize.size); // increment buffer pointer
@ -622,11 +641,11 @@ static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix)
{
len = 64u;
}
dcd_write_packet_memory(*PCD_EP_TX_ADDRESS_PTR(USB,ep_ix), &(xfer->buffer[xfer->queued_len]), len);
dcd_write_packet_memory(*pcd_ep_tx_address_ptr(USB,ep_ix), &(xfer->buffer[xfer->queued_len]), len);
xfer->queued_len = (uint16_t)(xfer->queued_len + len);
PCD_SET_EP_TX_CNT(USB,ep_ix,len);
PCD_SET_EP_TX_STATUS(USB, ep_ix, USB_EP_TX_VALID);
pcd_set_ep_tx_cnt(USB,ep_ix,len);
pcd_set_ep_tx_status(USB, ep_ix, USB_EP_TX_VALID);
}
bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
@ -636,7 +655,7 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
uint8_t const epnum = tu_edpt_number(ep_addr);
uint8_t const dir = tu_edpt_dir(ep_addr);
xfer_ctl_t * xfer = XFER_CTL_BASE(epnum,dir);
xfer_ctl_t * xfer = xfer_ctl_ptr(epnum,dir);
xfer->buffer = buffer;
xfer->total_len = total_bytes;
@ -649,15 +668,15 @@ bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t
if (epnum == 0 && buffer == NULL)
{
xfer->buffer = (uint8_t*)_setup_packet;
PCD_SET_EP_KIND(USB,0); // Expect a zero-byte INPUT
pcd_set_ep_kind(USB,0); // Expect a zero-byte INPUT
}
if(total_bytes > 64)
{
PCD_SET_EP_RX_CNT(USB,epnum,64);
pcd_set_ep_rx_cnt(USB,epnum,64);
} else {
PCD_SET_EP_RX_CNT(USB,epnum,total_bytes);
pcd_set_ep_rx_cnt(USB,epnum,total_bytes);
}
PCD_SET_EP_RX_STATUS(USB, epnum, USB_EP_RX_VALID);
pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_VALID);
}
else // IN
{
@ -671,14 +690,14 @@ void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
(void)rhport;
if (ep_addr == 0) { // CTRL EP0 (OUT for setup)
PCD_SET_EP_TX_STATUS(USB,ep_addr, USB_EP_TX_STALL);
pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_STALL);
}
if (ep_addr & 0x80) { // IN
ep_addr &= 0x7F;
PCD_SET_EP_TX_STATUS(USB,ep_addr, USB_EP_TX_STALL);
pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_STALL);
} else { // OUT
PCD_SET_EP_RX_STATUS(USB,ep_addr, USB_EP_RX_STALL);
pcd_set_ep_rx_status(USB,ep_addr, USB_EP_RX_STALL);
}
}
@ -687,24 +706,24 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
(void)rhport;
if (ep_addr == 0)
{
PCD_SET_EP_TX_STATUS(USB,ep_addr, USB_EP_TX_NAK);
pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_NAK);
}
if (ep_addr & 0x80)
{ // IN
ep_addr &= 0x7F;
PCD_SET_EP_TX_STATUS(USB,ep_addr, USB_EP_TX_NAK);
pcd_set_ep_tx_status(USB,ep_addr, USB_EP_TX_NAK);
/* Reset to DATA0 if clearing stall condition. */
PCD_CLEAR_TX_DTOG(USB,ep_addr);
pcd_clear_tx_dtog(USB,ep_addr);
}
else
{ // OUT
/* Reset to DATA0 if clearing stall condition. */
PCD_CLEAR_RX_DTOG(USB,ep_addr);
pcd_clear_rx_dtog(USB,ep_addr);
PCD_SET_EP_RX_STATUS(USB,ep_addr, USB_EP_RX_VALID);
pcd_set_ep_rx_status(USB,ep_addr, USB_EP_RX_VALID);
}
}

314
src/portable/st/stm32_fsdev/dcd_stm32_fsdev_pvt_st.h
View File

@ -83,9 +83,9 @@
// For purposes of accessing the packet
#if ((PMA_LENGTH) == 512u)
# define PMA_STRIDE (2u)
const size_t PMA_STRIDE = 2u;
#elif ((PMA_LENGTH) == 1024u)
# define PMA_STRIDE (1u)
const size_t PMA_STRIDE = 1u;
#endif
// And for type-safety create a new macro for the volatile address of PMAADDR
@ -93,32 +93,75 @@
// Volatile is also needed to prevent the optimizer from changing access to 32-bit (as 32-bit access is forbidden)
static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
/* SetENDPOINT */
#define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue) (*((__IO uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
/* GetENDPOINT */
#define PCD_GET_ENDPOINT(USBx, bEpNum) (*((__IO uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
#define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
(((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType))) | USB_EP_CTR_RX | USB_EP_CTR_TX)))
#define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD)
// prototypes
static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, unsigned int bEpNum);
static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, unsigned int bEpNum);
static inline void pcd_set_endpoint(USB_TypeDef * USBx, unsigned int bEpNum, unsigned int wRegValue);
/* SetENDPOINT */
static inline void pcd_set_endpoint(USB_TypeDef * USBx, unsigned int bEpNum, unsigned int wRegValue)
{
__O uint16_t *reg = (__O uint16_t *)((&USBx->EP0R) + bEpNum*2u);
*reg = (uint16_t)wRegValue;
}
/* GetENDPOINT */
static inline uint16_t pcd_get_endpoint(USB_TypeDef * USBx, unsigned int bEpNum) {
__I uint16_t *reg = (__I uint16_t *)((&USBx->EP0R) + bEpNum*2u);
return *reg;
}
static inline void pcd_set_eptype(USB_TypeDef * USBx, unsigned int bEpNum, unsigned int wType)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
regVal &= (uint32_t)USB_EP_T_MASK;
regVal |= wType;
regVal |= USB_EP_CTR_RX | USB_EP_CTR_TX; // These clear on write0, so must set high
pcd_set_endpoint(USBx, bEpNum, regVal);
}
static inline unsigned int pcd_get_eptype(USB_TypeDef * USBx, unsigned int bEpNum)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
regVal &= USB_EP_T_FIELD;
return regVal;
}
/**
* @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
* @param USBx USB peripheral instance register address.
* @param bEpNum Endpoint Number.
* @retval None
*/
#define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
#define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
static inline void pcd_clear_rx_ep_ctr(USB_TypeDef * USBx, unsigned int bEpNum)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
regVal &= 0x7FFFu & USB_EPREG_MASK;
pcd_set_endpoint(USBx, bEpNum, regVal);
}
static inline void pcd_clear_tx_ep_ctr(USB_TypeDef * USBx, unsigned int bEpNum)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
regVal &= regVal & 0xFF7FU & USB_EPREG_MASK;
pcd_set_endpoint(USBx, bEpNum,regVal);
}
/**
* @brief gets counter of the tx buffer.
* @param USBx USB peripheral instance register address.
* @param bEpNum Endpoint Number.
* @retval Counter value
*/
#define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT_PTR((USBx), (bEpNum))) & 0x3ffU)
#define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT_PTR((USBx), (bEpNum))) & 0x3ffU)
static inline unsigned int pcd_get_ep_tx_cnt(USB_TypeDef * USBx, unsigned int bEpNum)
{
__I uint16_t *regPtr = pcd_ep_tx_cnt_ptr(USBx, bEpNum);
return *regPtr & 0x3ffU;
}
static inline unsigned int pcd_get_ep_rx_cnt(USB_TypeDef * USBx, unsigned int bEpNum)
{
__I uint16_t *regPtr = pcd_ep_rx_cnt_ptr(USBx, bEpNum);
return *regPtr & 0x3ffU;
}
/**
* @brief Sets counter of rx buffer with no. of blocks.
@ -127,38 +170,30 @@ static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
* @param wNBlocks no. of Blocks.
* @retval None
*/
#define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
(wNBlocks) = (uint32_t)((wCount) >> 5U);\
if(((wCount) & 0x1fU) == 0U)\
{ \
(wNBlocks)--;\
} \
*pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \
}/* PCD_CALC_BLK32 */
#define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
(wNBlocks) = (uint32_t)((wCount) >> 1U); \
if(((wCount) & 0x1U) != 0U)\
{ \
(wNBlocks)++;\
} \
*pdwReg = (uint16_t)((wNBlocks) << 10U);\
}/* PCD_CALC_BLK2 */
#define PCD_SET_EP_CNT_RX_REG(dwReg,wCount) {\
uint32_t wNBlocks;\
if((wCount) > 62U) \
{ \
PCD_CALC_BLK32((dwReg),(wCount),wNBlocks) \
} \
else \
{ \
PCD_CALC_BLK2((dwReg),(wCount),wNBlocks) \
} \
}/* PCD_SET_EP_CNT_RX_REG */
static inline void pcd_set_ep_cnt_rx_reg(__O uint16_t * pdwReg, size_t wCount) {
unsigned int wNBlocks;
if(wCount > 62u)
{
wNBlocks = wCount >> 5u;
if((wCount & 0x1fU) == 0u)
{
wNBlocks--;
}
wNBlocks = wNBlocks << 10u;
wNBlocks |= 0x8000u; // Mark block size as 32byte
*pdwReg = (uint16_t)wNBlocks;
}
else
{
wNBlocks = wCount >> 1u;
if((wCount & 0x1U) != 0u)
{
wNBlocks++;
}
*pdwReg = (uint16_t)((wNBlocks) << 10u);
}
}
/**
@ -168,23 +203,52 @@ static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
* @param bAddr Address.
* @retval None
*/
#define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr))
static inline void pcd_set_ep_address(USB_TypeDef * USBx, unsigned int bEpNum, unsigned int bAddr)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
regVal &= USB_EPREG_MASK;
regVal |= bAddr;
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
pcd_set_endpoint(USBx, bEpNum,regVal);
}
#define PCD_BTABLE_WORD_PTR(USBx,x) (&(pma[PMA_STRIDE*((((USBx)->BTABLE)>>1) + x)]))
static inline __IO uint16_t * pcd_btable_word_ptr(USB_TypeDef * USBx, size_t x)
{
size_t total_word_offset = (((USBx)->BTABLE)>>1) + x;
total_word_offset *= PMA_STRIDE;
return &(pma[total_word_offset]);
}
// Pointers to the PMA table entries (using the ARM address space)
#define PCD_EP_TX_ADDRESS_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 0u))
#define PCD_EP_TX_CNT_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 1u))
static inline __IO uint16_t* pcd_ep_tx_address_ptr(USB_TypeDef * USBx, unsigned int bEpNum)
{
return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 0u);
}
static inline __IO uint16_t* pcd_ep_tx_cnt_ptr(USB_TypeDef * USBx, unsigned int bEpNum)
{
return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 1u);
}
#define PCD_EP_RX_ADDRESS_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 2u))
#define PCD_EP_RX_CNT_PTR(USBx, bEpNum) (PCD_BTABLE_WORD_PTR(USBx,(bEpNum)*4u + 3u))
static inline __IO uint16_t* pcd_ep_rx_address_ptr(USB_TypeDef * USBx, unsigned int bEpNum)
{
return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 2u);
}
#define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT_PTR((USBx), (bEpNum)) = (wCount))
#define PCD_SET_EP_RX_CNT(USBx, bEpNum,wCount) do {\
__IO uint16_t *pdwReg =PCD_EP_RX_CNT_PTR((USBx),(bEpNum)); \
PCD_SET_EP_CNT_RX_REG((pdwReg), (wCount))\
} while(0)
static inline __IO uint16_t* pcd_ep_rx_cnt_ptr(USB_TypeDef * USBx, unsigned int bEpNum)
{
return pcd_btable_word_ptr(USBx,(bEpNum)*4u + 3u);
}
static inline void pcd_set_ep_tx_cnt(USB_TypeDef * USBx, unsigned int bEpNum, unsigned int wCount)
{
*pcd_ep_tx_cnt_ptr(USBx, bEpNum) = (uint16_t)wCount;
}
static inline void pcd_set_ep_rx_cnt(USB_TypeDef * USBx, unsigned int bEpNum, unsigned int wCount)
{
__IO uint16_t *pdwReg = pcd_ep_rx_cnt_ptr((USBx),(bEpNum));
pcd_set_ep_cnt_rx_reg(pdwReg, wCount);
}
/**
* @brief sets the status for tx transfer (bits STAT_TX[1:0]).
@ -193,21 +257,24 @@ static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
* @param wState new state
* @retval None
*/
#define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
\
_wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\
/* toggle first bit ? */ \
if((USB_EPTX_DTOG1 & (wState))!= 0U)\
{ \
_wRegVal ^=(uint16_t) USB_EPTX_DTOG1; \
} \
/* toggle second bit ? */ \
if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
{ \
_wRegVal ^=(uint16_t) USB_EPTX_DTOG2; \
} \
PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\
} /* PCD_SET_EP_TX_STATUS */
static inline void pcd_set_ep_tx_status(USB_TypeDef * USBx, unsigned int bEpNum, unsigned int wState)
{
uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
regVal &= USB_EPTX_DTOGMASK;
/* toggle first bit ? */
if((USB_EPTX_DTOG1 & (wState))!= 0U)
{
regVal ^= USB_EPTX_DTOG1;
}
/* toggle second bit ? */
if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U)
{
regVal ^= USB_EPTX_DTOG2;
}
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
pcd_set_endpoint(USBx, bEpNum, regVal);
} /* pcd_set_ep_tx_status */
/**
* @brief sets the status for rx transfer (bits STAT_TX[1:0])
@ -216,22 +283,25 @@ static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
* @param wState new state
* @retval None
*/
#define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
register uint16_t _wRegVal; \
\
_wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\
/* toggle first bit ? */ \
if((USB_EPRX_DTOG1 & (wState))!= 0U) \
{ \
_wRegVal ^= (uint16_t) USB_EPRX_DTOG1; \
} \
/* toggle second bit ? */ \
if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
{ \
_wRegVal ^= (uint16_t) USB_EPRX_DTOG2; \
} \
PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
} /* PCD_SET_EP_RX_STATUS */
static inline void pcd_set_ep_rx_status(USB_TypeDef * USBx, unsigned int bEpNum, unsigned int wState)
{
uint32_t regVal = pcd_get_endpoint(USBx, bEpNum);
regVal &= USB_EPRX_DTOGMASK;
/* toggle first bit ? */
if((USB_EPRX_DTOG1 & wState)!= 0U)
{
regVal ^= USB_EPRX_DTOG1;
}
/* toggle second bit ? */
if((USB_EPRX_DTOG2 & wState)!= 0U)
{
regVal ^= USB_EPRX_DTOG2;
}
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
pcd_set_endpoint(USBx, bEpNum, regVal);
} /* pcd_set_ep_rx_status */
/**
* @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
@ -239,10 +309,21 @@ static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
* @param bEpNum Endpoint Number.
* @retval None
*/
#define PCD_RX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
#define PCD_TX_DTOG(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
static inline void pcd_rx_dtog(USB_TypeDef * USBx, unsigned int bEpNum)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
regVal &= USB_EPREG_MASK;
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX;
pcd_set_endpoint(USBx, bEpNum, regVal);
}
static inline void pcd_tx_dtog(USB_TypeDef * USBx, unsigned int bEpNum)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
regVal &= USB_EPREG_MASK;
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX;
pcd_set_endpoint(USBx, bEpNum, regVal);
}
/**
* @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
@ -250,14 +331,24 @@ static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
* @param bEpNum Endpoint Number.
* @retval None
*/
#define PCD_CLEAR_RX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\
{ \
PCD_RX_DTOG((USBx),(bEpNum));\
}
#define PCD_CLEAR_TX_DTOG(USBx, bEpNum) if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\
{\
PCD_TX_DTOG((USBx),(bEpNum));\
}
static inline void pcd_clear_rx_dtog(USB_TypeDef * USBx, unsigned int bEpNum)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
if((regVal & USB_EP_DTOG_RX) != 0)
{
pcd_rx_dtog(USBx,bEpNum);
}
}
static inline void pcd_clear_tx_dtog(USB_TypeDef * USBx, unsigned int bEpNum)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
if((regVal & USB_EP_DTOG_TX) != 0)
{
pcd_tx_dtog(USBx,bEpNum);
}
}
/**
* @brief set & clear EP_KIND bit.
@ -265,11 +356,22 @@ static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
* @param bEpNum Endpoint Number.
* @retval None
*/
#define PCD_SET_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
(USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK))))
#define PCD_CLEAR_EP_KIND(USBx, bEpNum) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
(USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK)))))
static inline void pcd_set_ep_kind(USB_TypeDef * USBx, unsigned int bEpNum)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
regVal |= USB_EP_KIND;
regVal &= USB_EPREG_MASK;
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
pcd_set_endpoint(USBx, bEpNum, regVal);
}
static inline void pcd_clear_ep_kind(USB_TypeDef * USBx, unsigned int bEpNum)
{
unsigned int regVal = pcd_get_endpoint(USBx, bEpNum);
regVal &= USB_EPKIND_MASK;
regVal |= USB_EP_CTR_RX|USB_EP_CTR_TX;
pcd_set_endpoint(USBx, bEpNum, regVal);
}
// This checks if the device has "LPM"
#if defined(USB_ISTR_L1REQ)
@ -282,6 +384,6 @@ static __IO uint16_t * const pma = (__IO uint16_t*)USB_PMAADDR;
USB_ISTR_RESET | USB_ISTR_SOF | USB_ISTR_ESOF | USB_ISTR_L1REQ_FORCED )
// Number of endpoints in hardware
#define STFSDEV_EP_COUNT (8)
#define STFSDEV_EP_COUNT (8u)
#endif /* PORTABLE_ST_STM32F0_DCD_STM32F0_FSDEV_PVT_ST_H_ */