clean up warnings

This commit is contained in:
hathach 2018-11-26 12:25:28 +07:00
parent 4ec7dba453
commit 064eec5dd8
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GPG Key ID: 2FA891220FBFD581
13 changed files with 36 additions and 28 deletions

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@ -18,11 +18,12 @@
arm_target_debug_interface_type="ADIv5"
arm_target_device_name="nRF52840_xxAA"
arm_target_interface_type="SWD"
build_treat_warnings_as_errors="Yes"
build_treat_warnings_as_errors="No"
c_preprocessor_definitions="NRF52840_XXAA;__nRF_FAMILY;ARM_MATH_CM4;FLASH_PLACEMENT=1;BOARD_PCA10056;CFG_TUSB_MCU=OPT_MCU_NRF5X"
c_user_include_directories="../../src;$(rootDir)/hw/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(nrfxDir)/..;$(nrfxDir);$(nrfxDir)/mdk;$(nrfxDir)/hal;$(nrfxDir)/drivers/include"
debug_register_definition_file="nrf52840_Registers.xml"
debug_target_connection="J-Link"
gcc_enable_all_warnings="Yes"
gcc_entry_point="Reset_Handler"
link_use_linker_script_file="No"
linker_memory_map_file="nRF52840_xxAA_MemoryMap.xml"

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@ -57,9 +57,7 @@
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/gcc/system_samd21.c" />
</folder>
<folder Name="hpl">
<folder Name="core">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/hpl/core/hpl_init.c" />
</folder>
<folder Name="core" />
<folder Name="gclk">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd21/hpl/gclk/hpl_gclk.c" />
</folder>

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@ -23,6 +23,7 @@
c_user_include_directories="../../src;$(rootDir)/hw/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(asf4Dir);$(asf4Dir)/include;$(asf4Dir)/config;$(asf4Dir)/hri;$(asf4Dir)/hal/include;$(asf4Dir)/hal/utils/include;$(asf4Dir)/hpl/port;$(asf4Dir)/hpl/gclk"
debug_register_definition_file="ATSAMD51J19A_Registers.xml"
debug_target_connection="J-Link"
gcc_enable_all_warnings="Yes"
gcc_entry_point="Reset_Handler"
link_use_linker_script_file="No"
linker_memory_map_file="ATSAMD51J19A_MemoryMap.xml"
@ -58,9 +59,6 @@
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/gcc/system_samd51.c" />
</folder>
<folder Name="hpl">
<folder Name="core">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/core/hpl_init.c" />
</folder>
<folder Name="osc32kctrl">
<file file_name="../../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c" />
</folder>

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@ -187,6 +187,7 @@ void tud_umount_cb(void)
void tud_cdc_rx_cb(uint8_t itf)
{
(void) itf;
}
//--------------------------------------------------------------------+

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@ -248,7 +248,6 @@ uint8_t board_uart_getchar(void)
void board_uart_putchar(uint8_t c)
{
}
#endif

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@ -302,6 +302,8 @@ tusb_error_t cdcd_open(uint8_t rhport, tusb_desc_interface_t const * p_interface
// return false to stall control endpoint (e.g Host send non-sense DATA)
bool cdcd_control_request_complete(uint8_t rhport, tusb_control_request_t const * request)
{
(void) rhport;
//------------- Class Specific Request -------------//
TU_VERIFY (request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS);
@ -358,8 +360,10 @@ bool cdcd_control_request(uint8_t rhport, tusb_control_request_t const * request
return true;
}
tusb_error_t cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes)
tusb_error_t cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
{
(void) result;
// TODO Support multiple interfaces
uint8_t const itf = 0;
cdcd_interface_t* p_cdc = &_cdcd_itf[itf];
@ -367,16 +371,14 @@ tusb_error_t cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event,
// receive new data
if ( ep_addr == p_cdc->ep_out )
{
char const wanted = p_cdc->wanted_char;
for(uint32_t i=0; i<xferred_bytes; i++)
{
tu_fifo_write(&p_cdc->rx_ff, &p_cdc->epout_buf[i]);
// Check for wanted char and invoke callback if needed
if ( tud_cdc_rx_wanted_cb && ( wanted != -1 ) && ( wanted == p_cdc->epout_buf[i] ) )
if ( tud_cdc_rx_wanted_cb && ( ((signed char) p_cdc->wanted_char) != -1 ) && ( p_cdc->wanted_char == p_cdc->epout_buf[i] ) )
{
tud_cdc_rx_wanted_cb(itf, wanted);
tud_cdc_rx_wanted_cb(itf, p_cdc->wanted_char);
}
}

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@ -116,7 +116,7 @@ void cdcd_init (void);
tusb_error_t cdcd_open (uint8_t rhport, tusb_desc_interface_t const * p_interface_desc, uint16_t *p_length);
bool cdcd_control_request (uint8_t rhport, tusb_control_request_t const * p_request);
bool cdcd_control_request_complete (uint8_t rhport, tusb_control_request_t const * p_request);
tusb_error_t cdcd_xfer_cb (uint8_t rhport, uint8_t edpt_addr, xfer_result_t event, uint32_t xferred_bytes);
tusb_error_t cdcd_xfer_cb (uint8_t rhport, uint8_t edpt_addr, xfer_result_t result, uint32_t xferred_bytes);
void cdcd_reset (uint8_t rhport);
#endif

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@ -418,7 +418,6 @@ bool hidd_control_request(uint8_t rhport, tusb_control_request_t const * p_reque
if (p_request->bRequest == TUSB_REQ_GET_DESCRIPTOR && desc_type == HID_DESC_TYPE_REPORT)
{
// Cast away the const on p_hid->desc_report because we know it won't be modified.
usbd_control_xfer(rhport, p_request, (void *)p_hid->desc_report, p_hid->desc_len);
}else
{

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@ -146,6 +146,7 @@ void mscd_init(void)
void mscd_reset(uint8_t rhport)
{
(void) rhport;
tu_memclr(&_mscd_itf, sizeof(mscd_interface_t));
}
@ -201,6 +202,9 @@ bool mscd_control_request(uint8_t rhport, tusb_control_request_t const * p_reque
// return false to stall control endpoint (e.g Host send non-sense DATA)
bool mscd_control_request_complete(uint8_t rhport, tusb_control_request_t const * p_request)
{
(void) rhport;
(void) p_request;
// nothing to do
return true;
}
@ -208,6 +212,7 @@ bool mscd_control_request_complete(uint8_t rhport, tusb_control_request_t const
// return length of response (copied to buffer), -1 if it is not an built-in commands
int32_t proc_builtin_scsi(msc_cbw_t const * p_cbw, uint8_t* buffer, uint32_t bufsize)
{
(void) bufsize; // TODO refractor later
int32_t ret;
switch ( p_cbw->command[0] )

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@ -170,7 +170,7 @@ static osal_queue_t _usbd_q;
//--------------------------------------------------------------------+
static void mark_interface_endpoint(uint8_t const* p_desc, uint16_t desc_len, uint8_t driver_id);
static bool process_control_request(uint8_t rhport, tusb_control_request_t const * p_request);
static bool process_set_config(uint8_t rhport, uint8_t config_number);
static bool process_set_config(uint8_t rhport);
static void const* get_descriptor(tusb_control_request_t const * p_request, uint16_t* desc_len);
void usbd_control_reset (uint8_t rhport);
@ -356,7 +356,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
dcd_set_config(rhport, config);
_usbd_dev.config_num = config;
TU_ASSERT( TUSB_ERROR_NONE == process_set_config(rhport, config) );
TU_ASSERT( TUSB_ERROR_NONE == process_set_config(rhport) );
}
break;
@ -427,7 +427,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
// Process Set Configure Request
// This function parse configuration descriptor & open drivers accordingly
static bool process_set_config(uint8_t rhport, uint8_t config_number)
static bool process_set_config(uint8_t rhport)
{
uint8_t const * desc_cfg = (uint8_t const *) usbd_desc_set->config;
TU_ASSERT(desc_cfg != NULL);
@ -591,23 +591,23 @@ void dcd_event_handler(dcd_event_t const * event, bool in_isr)
// helper to send bus signal event
void dcd_event_bus_signal (uint8_t rhport, dcd_eventid_t eid, bool in_isr)
{
dcd_event_t event = { .rhport = 0, .event_id = eid, };
dcd_event_t event = { .rhport = rhport, .event_id = eid, };
dcd_event_handler(&event, in_isr);
}
// helper to send setup received
void dcd_event_setup_received(uint8_t rhport, uint8_t const * setup, bool in_isr)
{
dcd_event_t event = { .rhport = 0, .event_id = DCD_EVENT_SETUP_RECEIVED };
dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_SETUP_RECEIVED };
memcpy(&event.setup_received, setup, 8);
dcd_event_handler(&event, true);
dcd_event_handler(&event, in_isr);
}
// helper to send transfer complete event
void dcd_event_xfer_complete (uint8_t rhport, uint8_t ep_addr, uint32_t xferred_bytes, uint8_t result, bool in_isr)
{
dcd_event_t event = { .rhport = 0, .event_id = DCD_EVENT_XFER_COMPLETE };
dcd_event_t event = { .rhport = rhport, .event_id = DCD_EVENT_XFER_COMPLETE };
event.xfer_complete.ep_addr = ep_addr;
event.xfer_complete.len = xferred_bytes;

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@ -68,6 +68,7 @@ CFG_TUSB_MEM_SECTION CFG_TUSB_MEM_ALIGN uint8_t _usbd_ctrl_buf[CFG_TUD_ENDOINT0_
void usbd_control_reset (uint8_t rhport)
{
(void) rhport;
tu_varclr(&_control_state);
}
@ -126,8 +127,11 @@ bool usbd_control_xfer(uint8_t rhport, tusb_control_request_t const * request, v
}
// callback when a transaction complete on DATA stage of control endpoint
bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes)
bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
{
(void) result;
(void) ep_addr;
if ( _control_state.request.bmRequestType_bit.direction == TUSB_DIR_OUT )
{
memcpy(_control_state.buffer, _usbd_ctrl_buf, xferred_bytes);

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@ -84,11 +84,11 @@ bool dcd_init (uint8_t rhport)
void dcd_connect (uint8_t rhport)
{
(void) rhport;
}
void dcd_disconnect (uint8_t rhport)
{
(void) rhport;
}
void dcd_set_address (uint8_t rhport, uint8_t dev_addr)

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@ -197,16 +197,17 @@ bool dcd_init (uint8_t rhport)
void dcd_connect (uint8_t rhport)
{
(void) rhport;
}
void dcd_disconnect (uint8_t rhport)
{
(void) rhport;
}
void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
{
(void) rhport;
(void) dev_addr;
// Set Address is automatically update by hw controller
}
@ -362,7 +363,7 @@ void USBD_IRQHandler(void)
volatile uint32_t* regevt = &NRF_USBD->EVENTS_USBRESET;
for(int i=0; i<USBD_INTEN_EPDATA_Pos+1; i++)
for(uint8_t i=0; i<USBD_INTEN_EPDATA_Pos+1; i++)
{
if ( BIT_TEST_(inten, i) && regevt[i] )
{