Commit Graph

2572 Commits

Author SHA1 Message Date
hathach 281e8cd9ec rename OPT_MCU_RT10XX to OPT_MCU_IMXRT10XX 2019-11-22 15:42:46 +07:00
hathach 00a571fc38 doc update 2019-11-22 15:37:23 +07:00
Ha Thach ca741dfc2a
Merge pull request #220 from hathach/develop
Port NXP iMX RT10XX
2019-11-22 15:16:41 +07:00
hathach a02e723d09 rename dcd lpc18_43 to transdimension 2019-11-22 14:54:23 +07:00
hathach 6123b600fc rename dcd_lpc18_43 to dcd_transdimension 2019-11-22 14:47:07 +07:00
hathach a0b2561a2d move nxp dcd ehci controller reset and modde into dcd
rt1064 work with cdc msc example
2019-11-22 14:20:10 +07:00
hathach f623dbc425 config clean up 2019-11-22 12:41:47 +07:00
hathach 636c1475ba clean up 2019-11-22 12:38:24 +07:00
hathach fca4653b95 able to compile dcd 18/43 with rt1064 2019-11-22 12:34:41 +07:00
hathach 2ead26a12d more clean up 2019-11-22 12:26:40 +07:00
hathach ccb09db3b7 more clean up 2019-11-22 12:16:47 +07:00
hathach 7e16a9a1db more constant rename clean up 2019-11-22 12:14:55 +07:00
hathach 8aacd1eacd refactor dcd_lpc18_43, making it capatible with rt10xx 2019-11-22 12:11:13 +07:00
hathach 623b16af2e clean up dcd lpc18_43
drop supporting both device mode on both ports.
2019-11-22 00:58:18 +07:00
hathach 1f52273d99 move dcd_lpc18_43.h into .c file 2019-11-22 00:38:22 +07:00
hathach 627d9a2b33 adding irq to rt1064evk 2019-11-22 00:34:31 +07:00
hathach 03deeea465 fix segger host example 2019-11-22 00:33:10 +07:00
hathach f5d737aa7e moving irq to bsp for lpc17/40 2019-11-21 23:19:38 +07:00
hathach bbec47b647 adding tud_isr/tuh_isr with lpc18/43 2019-11-21 22:20:30 +07:00
hathach 9fe34c2e62 update build all script to build a specific 2019-11-21 16:37:34 +07:00
hathach 043697ab95 rename lpc 17/18 irq to dcd_isr/hcd_isr 2019-11-21 16:08:08 +07:00
hathach f0682f6279
Merge pull request #219 from xobs/fix-eptri-ep-clear
eptri: clear proper endpoint when opening IN port
2019-11-20 22:00:59 +07:00
hathach 54d597b723 rt1064evk led, button, uart all work 2019-11-20 17:10:30 +07:00
Sean Cross a9282eab51 eptri: clear proper endpoint when opening IN port
When opening a USB port, we ensure the buffer is NULL and has
a length of 0.

Due to a mistake in specifying the endpoint type, we never actually
cleared the value when opening an IN endpoint.  This patch fixes
the comparison when opening an IN endpoint.

This fixes issue #218.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-20 17:45:21 +08:00
hathach f638594536 move -flto to board.mk
current board that doesn work with flto is spresense and mimxrt10xx (due
to xip image_vector_table is optimized out).
2019-11-20 16:06:40 +07:00
hathach 1aa3f085cb adding support for NXP rt1064 evk board, boad test led + sw8 work.
LTO is temporary disabled
2019-11-20 15:30:39 +07:00
hathach c2fb813658
Merge pull request #217 from xobs/valentyusb-eptri
WIP: Add Valentyusb eptri
2019-11-18 12:37:34 +07:00
hathach 56abce44f3
Merge pull request #208 from hathach/fix-issue-207
Fix issue 207
2019-11-14 10:10:42 +07:00
Sean Cross 679821e917 fomu: bsp: don't call usb isr when usb is disabled
When compiled without usb support, we don't want to call the USB ISR.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 11:10:37 -08:00
Sean Cross 67267a9399 fomu: bsp: remove unused messible functions
These functions are unused in the current implementation.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 11:08:56 -08:00
Sean Cross dce070ebe0 examples: make: specify CROSS_COMPILE for fomu
When BOARD=fomu, use the riscv cross-compiler.  Otherwise, use the
default arm compiler.  This can be overridden by passing
CROSS_COMIPLE on the command line.

Note that there are now three common risc-v prefixes:

    - riscv32-unknown-elf- : Common for users who compile their own
    - riscv64-unknown-elf- : Upstream multiarch toolchain from SiFive
    - riscv-none-embed-    : xPack embedded version of SiFive toolchain

Here we assume users are using the `riscv-none-embed-` toolchain from
xPack, because it appears to be growing more common.  Additionally,
there is much confusion surrounding `riscv64-unknown-elf-`, which
actually includes both 32- and 64-bit runtimes and can generate software
for both.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:26:00 -08:00
Sean Cross 737d437ab8 travis: fetch xPack risc-v toolchain
This toolchain seems popular in the embedded space, and is generally
preferred over the upstream SiFive toolchain.  It can produce both
32- and 64-bit binaries, so its prefix is riscv-none-embed-.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:22:18 -08:00
Sean Cross cc73990530 tusb: rename `foosn` to `valentyusb`
Use the name `valentyusb` as the vendor for the `valentyusb`
project, rather than the manufacturer name of the Fomu device.

This is because the `valentyusb` core can be used across multiple
vendors, much like how other cores can be used across chip vendors.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:47 -08:00
Sean Cross 8c5f02960b valentyusb: rename from `foosn`
While Fomu is produced by Foosn, the actual name of the hardware
block is `valentyusb`.  Rename the module to match that.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:47 -08:00
Sean Cross e05e9801e4 fomu: gate debug/logging features
This gates the majority of the debug and logging features behind
testable macros.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:47 -08:00
Sean Cross 3292920933 fomu: first stable working commit
This appears to be stable, and works well.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:47 -08:00
Sean Cross 25d5628063 fomu: csr: sync csr
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:47 -08:00
Sean Cross f087cb1580 fomu: crt0: minor text refactor
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:47 -08:00
Sean Cross 1882a87212 fomu: remove reference to SETUP_CTRL.ACK
THis bit isn't used anymore, so remove it.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:47 -08:00
Sean Cross 729c8d073c fomu: dcd_fomu: add next_ev support
Now that we have the `USB_NEXT_EV` register, take advantage of
it to work around issue #207.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:09:38 -08:00
Sean Cross 77cf0b5bfd fomu: csr: add version with next_ev register
The Fomu bitstream now includes a `USB_NEXT_EV` register to
indicate which is the next logical event to process.  Add this
register to the CSR definition.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:47 -08:00
Sean Cross 913032ae1d dcd_fomu: nearly there
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:01 -08:00
Sean Cross 835a72c595 fomu: semi-working dcd file
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:01 -08:00
Sean Cross 83bca4a74f fomu: semi-working commit
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:01 -08:00
Sean Cross 843136d0e4 fomu: commit latest version
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:01 -08:00
Sean Cross 22fd7bf85e fomu: first fully-working release
This is able to transfer lots of data back and forth across MSC.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:01 -08:00
Sean Cross 4a8475b8a7 src: add eptri to tusb
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:01 -08:00
Sean Cross 0559fd13fb fomu: fix some issues with dcd_fomu
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:01 -08:00
Sean Cross 359189ea2d tusb_verify: add riscv assert support
This simply executes an "ebreak" instruction.

Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:08:01 -08:00
Sean Cross ef07427e06 bsp: fomu: update
Signed-off-by: Sean Cross <sean@xobs.io>
2019-11-13 09:03:13 -08:00