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esp32-s2_dfu
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65 Commits

Author SHA1 Message Date
Ha Thach 6f3378f71d
Merge pull request #476 from kasjer/kasjer/fix-synopsys-fix-iso-frame-bit 
Fix synopsys odd/even frame bit for IN ISO endpoints
 2020-08-05 22:36:05 +07:00
Jerzy Kasenberg e9aa36a6e8 Fix synopsys odd/even frame bit for IN ISO endpoints 
For ISO endpoint driver has to specify when data
is to be transmitted (odd or even frame).
Currently code was not updating this bit resulting in
data being sent every other frame.
If interval was 1ms full data packed was sent every 2ms, and
ZLP was sent in between.
 2020-08-04 09:32:41 +02:00
hathach acde49ccc9
enable pull-up in dcd_init() instead of usbd 2020-08-01 20:14:58 +07:00
Jerzy Kasenberg c3b0389f10 Fix synopsys size check for ISO endpoint 
Constraint was incorrect for ISO endpoint as stated in TODO.
 2020-07-31 15:52:21 +02:00
hathach 10a8ef7614
fix nested extern declaration of 'SystemCoreClock' [-Werror=nested-externs] 2020-07-29 17:04:47 +07:00
hathach 0fd074afd8
change REDUCE_SPEED=0/1 to explicitly SPEED=high/full 
update readme, boards.md to add link to new stm boards
 2020-07-08 16:29:48 +07:00
Ha Thach a192d99bf0
Merge pull request #457 from UweBonnes/add-stm-hs 
Add stm hs
 2020-07-05 14:07:08 +07:00
Uwe Bonnes fd38178189 STM32/OTG_HS: Allow OTG_HS port to run at FS speed. 
Add "REDUCE_SPEED=1" to the compile options.
 2020-07-03 10:52:57 +02:00
hathach ad5ae8c31d
update per review 2020-07-03 14:50:39 +07:00
hathach a09a86d299
fix NVIC disable typo 2020-07-03 01:19:02 +07:00
hathach 4cec866994
correct HSE_VALUE in hal_conf 
- although it is define in CFLAGS, it is worth to correct to be
consistent with other build
- extract set_speed()
 2020-07-02 14:57:00 +07:00
hathach 9a290febcd
change default port some stm bsp 
- f769disco default port is highspeed port1
- remove PORT0 on stlink since the board only populated HS connector
 2020-07-02 11:58:40 +07:00
hathach 4966fb2e13 clean up 2020-07-02 01:25:21 +07:00
hathach c2289777f7 Merge branch 'add-stm-hs' of github.com:hathach/tinyusb into add-stm-hs 2020-07-01 23:53:33 +07:00
Uwe Bonnes 196bdbc702 st/synopsys/dcd_synopsys.c: Remove USBC PHY PLL stabilization delay for now 
While the ST code has a 2 ms stabilization delay for the USBC PHY PLL,
running without this delay showed no problem for at leat 10 USB un/replug
cycles. Observe for problems!
 2020-07-01 14:45:07 +02:00
hathach d2450abaaf only set turnaround in reset complete 2020-07-01 18:51:04 +07:00
hathach e3974d6869 correctly set turn around according to cpu clock 
help to run with low speed mcu
 2020-07-01 18:44:52 +07:00
hathach a512a31c9d Merge branch 'master' into add-stm-hs 2020-07-01 17:58:02 +07:00
hathach ed1b670c55 clean up code 2020-07-01 17:57:37 +07:00
Jan Dümpelmann 378e6aab8c Clear ep0_pending if rx short packet 2020-06-30 17:56:25 +02:00
Jan Dümpelmann 9e35ef73f7 Fix receiving of short packet data (ep out) 2020-06-30 12:55:39 +02:00
Uwe Bonnes 30a18e2605 stm32f723disco: USB HS enumerates. 2020-06-30 11:07:53 +02:00
Uwe Bonnes 05bfd9ac4a dcd_synopsys: Handle HS and FS IP in one device 
FIXME: Allow run-time selection to allow to handle both HS and FS with
one file

F746 HS port enumerates with error
config 1 interface 2 altsetting 0 bulk endpoint 0x3 has invalid maxpacket 64
 2020-06-30 11:02:41 +02:00
hathach ab75998316 Merge branch 'master' into add-stm-hs 2020-06-30 01:55:57 +07:00
Jan Dümpelmann 99df7789a7 Add author name to dcd_synopsys.c 2020-06-29 10:55:03 +02:00
Jan Dümpelmann 4f69bcea7e Remove EP0 remaining bytes manipulation 
Renaming edpt_xact to edpt_schedule_packets
 2020-06-26 17:18:25 +02:00
Jan Dümpelmann 067287ef91 Add transaction (edpt_xact) as sub transfer 
A transfer can have one or multiple transactions.
Usually only EP0 splits one xfer into multiple xact.
 2020-06-18 17:18:28 +02:00
hathach 667eaa6dd6 fix stm32h743 priority with freeRTOS 2020-06-16 00:03:52 +07:00
hathach 2dd1be13e5 Enhance EP FIFO allocation for both Fullspeed and Highspeed 
- Update shared RX FIFO calculation with FS/HS
- IN FIFO EP
  - Interrupt -> use EPSize
  - Bulk/ISO  -> use  max(EPSize, remaining-fifo / non-opened-EPIN)
 2020-06-15 23:17:49 +07:00
Jan Dümpelmann 4399dd1b06 cherry pick PR399 commit : Interrupt time improvements 2020-06-14 19:13:31 +07:00
hathach f438aedccb overwrite setup packet 2020-06-14 18:29:38 +07:00
hathach 710c54f8cb allow hs ep open with 512 bytes 2020-06-01 01:36:09 +07:00
hathach f771afe6af fixed EP0 size to 64 since LS is not supported in device mode 
- set turn-around and report actual speed in Enum Done
- add dcd_event_bus_reset() helper to report speed
 2020-05-31 23:43:29 +07:00
hathach 5ffba8536d able to detect as hs 2020-05-31 19:41:22 +07:00
hathach d4bf777c94 try to get synopsys work with OTG HS + external PHY 2020-05-27 11:01:33 +07:00
hathach 947c3eb10d multiple port support for global otg base 2020-05-26 16:07:48 +07:00
hathach b7ab60aa44 suporting multiple port (OTG FS + HS) for stm32 2020-05-26 15:52:02 +07:00
Jan Dümpelmann 42edbc0006 Allow EP0 to use xfer sizes larger than one packet 2020-05-15 22:26:14 +02:00
Jan Dümpelmann 28696de390 Interrupt time improvements 2020-05-15 18:21:44 +02:00
Jan Dümpelmann 3401e0f6ff Synopsys OUT EP improvements: 
- Use register based XFRSIZ to determine transfer complete
  (xfer->queued_len and xfer->short_packet were deleted)
- Pop out as many RxFIFO data entries as available within a IRQ call
- less application interruption due to XFRC calls
 2020-05-08 18:10:48 +02:00
Jan Dümpelmann fd69cc3dcc clean up 
renaming function and variables
changing indent size
 2020-05-04 07:59:13 +02:00
Jan Dümpelmann 59ff208c65 Changed switch into if statements 2020-04-29 12:37:29 +02:00
Jan Dümpelmann 3e6feb7f6d Redesign of Synopsys device transmission 
Changes:
  - checking if tx buffer empty interrupt is masked
  - process more than one packet in isr
  - mask tx buffer empty just after all bytes were written
  - use of transmit_fifo_packet instead of transmit_packet
 2020-04-29 11:32:22 +02:00
hathach 958b5510cb added comment for hw clearing TXFE 2020-04-27 13:17:47 +07:00
hathach e785b09118 TXFE is read only bit 2020-04-27 12:06:14 +07:00
hathach 8d18d6077b turn off TX FIFO Empty for EPIN if all bytes are written 
fix dcd synopsys issue with usbnet #289
 2020-04-26 22:14:59 +07:00
Jerzy Kasenberg b949ae596f synopsys: Reduce interrupt time for IN ZLP 
For IN endpoints output FIFO is filled in interrupt, therefor before
endpoint is enabled, DIEPTSIZ is set with correct size of packet.
Then endpoint is enabled and FIFO empty interrupt is enabled.

This works fine except for the ZLP. Enabling FIFO empty interrupt
results in interrupt handler being called all the time because
there is nothing to put in the FIFO.
Eventually it ends when IN token is received and empty
packed is transmitted out.

This change does not enable FIFO empty interrupt for ZLP reducing
CPU load.
 2020-04-24 17:38:30 +02:00
Jan Dümpelmann 551724498a Added support for STM32F1 Connectivity Line MCU 
STM32F105 and STM32F107 are using the Synopsys IP
 2020-04-22 17:39:53 +02:00
hathach 1f442c0a9a also add wakeup event 2020-04-18 23:48:36 +07:00
hathach fa71402e17 implement disconnection detection for stm32 synopsys 
- disconnection is OTG INT session end bit
- add USE_SOF to disable 1ms interrupt on mcu which isn't used now by
the stack
- add suspend detection
 2020-04-18 23:40:27 +07:00