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st/synopsys/dcd_synopsys.c: Remove USBC PHY PLL stabilization delay for now 

While the ST code has a 2 ms stabilization delay for the USBC PHY PLL,
running without this delay showed no problem for at leat 10 USB un/replug
cycles. Observe for problems!
This commit is contained in:
Uwe Bonnes 2020-07-01 14:45:07 +02:00
parent 530b0099a5
commit 196bdbc702
1 changed files with 6 additions and 2 deletions
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8
src/portable/st/synopsys/dcd_synopsys.c
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@ -27,7 +27,6 @@
*/
#include "tusb_option.h"
#include "../../../../hw/bsp//board.h"
#if defined (STM32F105x8) || defined (STM32F105xB) || defined (STM32F105xC) || \
defined (STM32F107xB) || defined (STM32F107xC)
@ -349,7 +348,12 @@ static bool USB_HS_PHYCInit(void)
// Enable PLL internal PHY
usb_hs_phyc->USB_HS_PHYC_PLL = phyc_pll | USB_HS_PHYC_PLL_PLLEN;
board_delay(2);
/* Original ST code has 2 ms delay for PLL stabilization.
* Primitive test shows that more than 10 USB un/replug cycle
* showed no error with enumeration
* //#include "../../../../hw/bsp//board.h"
* //board_delay(2);
*/
return true;
}
# endif