hathach
|
f626916a57
|
update all dwc2 ports to support new dynamic controller support
|
2022-06-04 23:52:12 +07:00 |
|
hathach
|
31134f41a1
|
make dwc2 stm32 rhport support dynamic
|
2022-06-03 17:24:28 +07:00 |
|
QianHao
|
65bf5ddb1b
|
Modify the wrong macro definition code
|
2022-03-07 08:04:49 +00:00 |
|
hathach
|
12e96ce571
|
set DCFG_XCVRDLY when using external ULPI highspeed phy
|
2021-11-15 12:18:28 +07:00 |
|
hathach
|
aa682d7301
|
add fix for stm32l4 (version 3.10a) which generate transfer complete when setup recieved and control out data complete
|
2021-11-02 13:52:30 +07:00 |
|
hathach
|
9cd5a87c64
|
add support for EFM32GG
merge GG12 GG12 to simply OPT_MCU_EFM32GG
|
2021-10-30 20:42:55 +07:00 |
|
hathach
|
660e8b8c88
|
skip snpsid check for gd32, abstract phyfs turnaround, set max timeout calibration.
still has issue with gd32 with msc (does work with running with rtt as
log).
|
2021-10-29 16:08:19 +07:00 |
|
hathach
|
6c67fc4125
|
correctly init hs phy for bcm
|
2021-10-29 00:53:30 +07:00 |
|
hathach
|
7def380058
|
support bcm2711 on pi4, enhance dcd init with utmi and ulpi hs phy
|
2021-10-28 12:52:18 +07:00 |
|
hathach
|
9f1cd1a753
|
add synopsys id check, rename GCCFG_* to STM32_GCCFG-*
|
2021-10-26 23:10:26 +07:00 |
|
hathach
|
bb5dab5c2e
|
add hw config struct
|
2021-10-26 22:48:01 +07:00 |
|
hathach
|
34844c9061
|
use dwc2->fifo[]
|
2021-10-26 12:53:29 +07:00 |
|
hathach
|
5e1a031800
|
complete dwc2 regs struct
|
2021-10-26 12:22:41 +07:00 |
|
hathach
|
3755814f57
|
add epin, epout to dwc2 regs
|
2021-10-26 11:49:59 +07:00 |
|
hathach
|
8df078dc9e
|
more rename
|
2021-10-26 11:11:46 +07:00 |
|
hathach
|
7369d2441d
|
update dwc2_type
|
2021-10-26 00:55:24 +07:00 |
|
hathach
|
460052c8a0
|
spacing
|
2021-10-25 21:20:58 +07:00 |
|
hathach
|
32742571da
|
switch gd32 and stm32f4 to use new dwc2 driver
|
2021-10-25 00:06:57 +07:00 |
|
hathach
|
06de6b725c
|
adding generalized dwc2 driver
|
2021-10-24 23:24:46 +07:00 |