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esp32-s2_dfu
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535 Commits

Author SHA1 Message Date
hathach 10a8ef7614
fix nested extern declaration of 'SystemCoreClock' [-Werror=nested-externs] 2020-07-29 17:04:47 +07:00
hathach 5af08e2ffc
fix strict prototype 2020-07-29 16:59:07 +07:00
Ha Thach 8dda0a0dd1
Merge pull request #454 from me-no-dev/esp32-s2-fifos 
ESP32-S2: Handle the fact that available EP IN FIFOs are less than the number of available EP INs
 2020-07-28 15:16:15 +07:00
me-no-dev a1a390a788 Update dcd_esp32s2.c 2020-07-28 10:54:23 +03:00
hathach 0407cfe16c fix samd21 race condition with setup packet 
reproduced with Adafruit_TinyUSB_ArduinoCore port commit 11d669b4d2a40eb2fc5e51b2a9707a6de9d42363 and SAMD BSP 1.6.1
 2020-07-23 01:39:15 +07:00
hathach 7baeea7a00 update actual link speed for spresense 2020-07-17 18:28:19 +07:00
hathach dc00f0cae1
update link speed detection for nuc505 2020-07-16 20:44:06 +07:00
hathach 0517f4a2f1
dcd tdi report link speed on reset 2020-07-16 16:12:21 +07:00
Ha Thach 81392da1ea
Merge pull request #456 from me-no-dev/esp32-s2-epin-to 
ESP32-S2: Detect EP IN Xfer Timeout
 2020-07-10 12:29:06 +07:00
hathach 0fd074afd8
change REDUCE_SPEED=0/1 to explicitly SPEED=high/full 
update readme, boards.md to add link to new stm boards
 2020-07-08 16:29:48 +07:00
Ha Thach a192d99bf0
Merge pull request #457 from UweBonnes/add-stm-hs 
Add stm hs
 2020-07-05 14:07:08 +07:00
Uwe Bonnes fd38178189 STM32/OTG_HS: Allow OTG_HS port to run at FS speed. 
Add "REDUCE_SPEED=1" to the compile options.
 2020-07-03 10:52:57 +02:00
hathach ad5ae8c31d
update per review 2020-07-03 14:50:39 +07:00
hathach a09a86d299
fix NVIC disable typo 2020-07-03 01:19:02 +07:00
me-no-dev d493724a7b ESP32-S2: Detect EP IN Xfer Timeout 
In some rare ocasions (bad cable, noise, etc.) data transfer might timeout and hang the endpoint, unless the interrupt flag is cleared.
This pull request targets to solve that case.
 2020-07-02 13:05:17 +03:00
hathach 4cec866994
correct HSE_VALUE in hal_conf 
- although it is define in CFLAGS, it is worth to correct to be
consistent with other build
- extract set_speed()
 2020-07-02 14:57:00 +07:00
hathach 9a290febcd
change default port some stm bsp 
- f769disco default port is highspeed port1
- remove PORT0 on stlink since the board only populated HS connector
 2020-07-02 11:58:40 +07:00
hathach 4966fb2e13 clean up 2020-07-02 01:25:21 +07:00
hathach c2289777f7 Merge branch 'add-stm-hs' of github.com:hathach/tinyusb into add-stm-hs 2020-07-01 23:53:33 +07:00
Uwe Bonnes 196bdbc702 st/synopsys/dcd_synopsys.c: Remove USBC PHY PLL stabilization delay for now 
While the ST code has a 2 ms stabilization delay for the USBC PHY PLL,
running without this delay showed no problem for at leat 10 USB un/replug
cycles. Observe for problems!
 2020-07-01 14:45:07 +02:00
hathach d2450abaaf only set turnaround in reset complete 2020-07-01 18:51:04 +07:00
hathach e3974d6869 correctly set turn around according to cpu clock 
help to run with low speed mcu
 2020-07-01 18:44:52 +07:00
hathach a512a31c9d Merge branch 'master' into add-stm-hs 2020-07-01 17:58:02 +07:00
hathach ed1b670c55 clean up code 2020-07-01 17:57:37 +07:00
me-no-dev 6178f8de2f ESP32-S2: Handle the fact that available EP IN FIFOs are less than the number of available EP INs 
ESP32-S2 has only 5 available endpoint-in FIFOs (including EP0) but 7 available EP IN numbers. This change decouples the fifo number from the endpoint number, providing FIFO numbers until they reach the limit, at which point it will return false and assert an error that too many endpoints were allocated.
 2020-07-01 13:38:59 +03:00
Jan Dümpelmann 378e6aab8c Clear ep0_pending if rx short packet 2020-06-30 17:56:25 +02:00
Jan Dümpelmann 9e35ef73f7 Fix receiving of short packet data (ep out) 2020-06-30 12:55:39 +02:00
Uwe Bonnes 30a18e2605 stm32f723disco: USB HS enumerates. 2020-06-30 11:07:53 +02:00
Uwe Bonnes 05bfd9ac4a dcd_synopsys: Handle HS and FS IP in one device 
FIXME: Allow run-time selection to allow to handle both HS and FS with
one file

F746 HS port enumerates with error
config 1 interface 2 altsetting 0 bulk endpoint 0x3 has invalid maxpacket 64
 2020-06-30 11:02:41 +02:00
hathach ab75998316 Merge branch 'master' into add-stm-hs 2020-06-30 01:55:57 +07:00
Ha Thach 05996aee64
Merge pull request #427 from kasjer/kasjer/add-da1469x-support 
Support for DA1469x MCU from Dialog Semiconductor
 2020-06-30 01:20:56 +07:00
Ha Thach 268ab9eaa8
Merge pull request #399 from duempel/redesign_synopsys_receive 
Improvements to Synopsys EP OUT
 2020-06-29 16:02:40 +07:00
Jan Dümpelmann 99df7789a7 Add author name to dcd_synopsys.c 2020-06-29 10:55:03 +02:00
Jan Dümpelmann 4f69bcea7e Remove EP0 remaining bytes manipulation 
Renaming edpt_xact to edpt_schedule_packets
 2020-06-26 17:18:25 +02:00
Jeff Epler b2ef8cdd42 dcd_samd: Provide implementation for OPT_MCU_SAME5X 2020-06-25 18:51:04 -05:00
hathach d4d6e06c1d added OPT_MCU_SAME5X option 2020-06-24 00:53:17 +07:00
Jan Dümpelmann 067287ef91 Add transaction (edpt_xact) as sub transfer 
A transfer can have one or multiple transactions.
Usually only EP0 splits one xfer into multiple xact.
 2020-06-18 17:18:28 +02:00
Mengsk 9ffb9b69a4 Disable SOF in dcd_stm32_fsdev 
Signed-off-by: Mengsk <admin@hifiphile.com>
 2020-06-18 14:18:00 +02:00
Mengsk 57b553e023 Fix IAR warnings. 
Pa039 : use of address of unaligned structure member.
Pe188: enumerated type mixed with another type.
 2020-06-17 10:08:33 +02:00
hathach 667eaa6dd6 fix stm32h743 priority with freeRTOS 2020-06-16 00:03:52 +07:00
hathach 2dd1be13e5 Enhance EP FIFO allocation for both Fullspeed and Highspeed 
- Update shared RX FIFO calculation with FS/HS
- IN FIFO EP
  - Interrupt -> use EPSize
  - Bulk/ISO  -> use  max(EPSize, remaining-fifo / non-opened-EPIN)
 2020-06-15 23:17:49 +07:00
Jan Dümpelmann 4399dd1b06 cherry pick PR399 commit : Interrupt time improvements 2020-06-14 19:13:31 +07:00
hathach f438aedccb overwrite setup packet 2020-06-14 18:29:38 +07:00
Jerzy Kasenberg 0635bafe0a Add DCD for Dialog DA1469x MCU 
Dialog Semiconductor's BLE MCU DA1469x comes with full speed USB.
It's base on National Semiconductor discrete USB controller USBN9603/4.

This adds support for:
- control/interrupt/bulk endpoints (up to 64 bytes)
- ISO endpoint were not tested and may not work correctly
- reset/sleep/wakeup are handled
- code for VBUS changes is provided
 2020-06-09 15:55:46 +02:00
hathach 710c54f8cb allow hs ep open with 512 bytes 2020-06-01 01:36:09 +07:00
hathach f771afe6af fixed EP0 size to 64 since LS is not supported in device mode 
- set turn-around and report actual speed in Enum Done
- add dcd_event_bus_reset() helper to report speed
 2020-05-31 23:43:29 +07:00
hathach 5ffba8536d able to detect as hs 2020-05-31 19:41:22 +07:00
hathach d4bf777c94 try to get synopsys work with OTG HS + external PHY 2020-05-27 11:01:33 +07:00
hathach b4804d1592 random clean up for tdi 2020-05-26 22:15:38 +07:00
hathach 947c3eb10d multiple port support for global otg base 2020-05-26 16:07:48 +07:00