make: improve panelization

lib: update repo
brd: add contraints and predefined sizes
2024-04-27 10:40:12 +02:00 · 2024-04-19 04:20:05 +02:00 · 2024-04-19 04:18:14 +02:00 · 2024-04-19 04:01:49 +02:00 · 2024-04-19 04:00:26 +02:00 · 2024-04-19 04:00:26 +02:00
42 changed files with 8430 additions and 402 deletions
--- a/.gitignore
+++ b/.gitignore
@ -1,17 +1,37 @@
+# schematic lepton-EDA
+*.sch
+
+# board layout pcb-rnd
+*.lht
 *.lht.*
-*.versioned.lht
+
+# KiCAD
+*.kicad_prl
+*.kicad_pro-bak
+*.xml
+fp-info-cache
+
+# temporary files
 *~
-*.versioned.sch
+\#*\#
+~*.lck
+
+# outputs
 *.svg
+*.png
 *.pdf
 *.ps
 *.zip
-*.brd.*
-*.tdx
-\#*\#
-*.notes.txt
 *.bom.csv
-*.cost.csv
+*.cpl.csv
+*.3d.step
+*.versioned.*
+fabrication
+
+# scripts and utilities
 *.json
 *.rb
-geda/footprints/
+
+# panel files
+panel.*
+panel
--- a/.gitmodules
+++ b/.gitmodules
@ -1,3 +1,3 @@
 [submodule "library"]
 	path = library
-	url = http://git.cuvoodoo.info/qeda_library
+	url = https://git.cuvoodoo.info/kingkevin/qeda_library
--- a/.qeda.yaml
+++ b/.qeda.yaml
@ -1,17 +1,16 @@
 config:
-  output: coraleda
+  nodate: true
+  output: kicad7
+  symbol:
+    pinIcon: false
  pattern:
    densityLevel: 'N'
    lineWidth:
      silkscreen: 0.2
+    polarityMark: none
    preferManufacturer: false
    smoothPadCorners: false
 library:
  - resistor/r0603
  - capacitor/c0603
-  - diode/led0603
-  - ic/nor-gate_ti_sn74hc02@soic
-  - ic/nor-gate_ti_sn74lvc1g02@dbv
-  - ic/nor-gate_ti_sn74lvc1g02@dck
-  - mechanical/smd-button_hyp_1ts002e
-  - connector/usb-a-2.0-receptacle
+  - diode/led0805
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@ -1,12 +0,0 @@
-v1
-==
-
-uses smaller coin cell (CR1220).
-use only one type of NOR-gate.
-remove READY LED.
-
-v0
-==
-
-working proof of concept prototype.
-it allows populating NOR gates in different packages.
--- a/DEVELOPMENT.md
+++ b/DEVELOPMENT.md
@ -1 +1,108 @@
-the JSON files are the source schematic and board layout made using [EasyEDA](https://easyeda.com/).
+this will describe how to generate the output files form the sources.
+
+requirements
+============
+
+to be able to generate the outputs, you need following software:
+
+- [QEDA](http://qeda.org/): to generate footprints for the parts
+- [KiCad v8](https://www.kicad.org/): EDA software used for schematic capture and board layout
+- [PcbDraw](https://github.com/yaqwsx/PcbDraw): to generate board layout rendering
+- [KiKit](https://github.com/yaqwsx/KiKit): to generate fabrications files (Gerber, Excellon)
+- [KiBoM](https://github.com/SchrodingersGat/KiBoM): to generate Bill of Material (CSV)
+- [Interactive HTML BOM](https://github.com/openscopeproject/InteractiveHtmlBom): to generate placement guide
+
+install Interactive HTML BOM using KiCad's Plugin and Content Manager.
+
+for the others:
+
+~~~
+npm install qeda
+pip install pcbdraw kibom kikit
+~~~
+
+you can additionally install  KiKit using KiCad's Plugin and Content Manager for an integrated GUI.
+
+compiling
+=========
+
+to generate schematic, BoM, board render, and fabrication output, run `make`.
+
+library
+-------
+
+almost all of the symbols and footprints used in the schematic and board layout are defined in the [QEDA](http://qeda.org/) format and generated for the CAD software.
+the `library` folder contains the QEDA parts definitions.
+
+to install QEDA using NPM from the official repository:
+
+~~~
+sudo npm install -g qeda
+~~~
+
+to install QEDA from the sources:
+
+~~~
+git clone https://github.com/qeda/qeda
+cd qeda
+npm install
+sudo npm install --global
+~~~
+
+to generate the parts:
+
+~~~
+make lib
+~~~
+
+this will use the parts definition (.yaml files) in the `library` to generate the symbols (.sym files) and footprints used by KiCAD in the `kicad` folder.
+
+schematic
+---------
+
+the `.kicad_sch` file is the schematic source file.
+it has been drawn using the [KiCAD eeschema](https://www.kicad.org/) schematic editor.
+
+it uses standard symbols, and the ones in the `kicad/` folder.
+most symbols are generated by QEDA as described above.
+
+to export as pdf:
+
+~~~
+make print
+~~~
+
+BOM
+---
+
+to export the bill of material (as CSV):
+
+~~~
+make bom
+~~~
+
+board
+-----
+
+the `.kicad_brd` file is the board layout source file.
+it has been drawn using the [KiCAD pcbnew](https://docs.kicad.org/6.0/en/pcbnew/pcbnew.html) PCB editor.
+
+it uses the footprints from the `kicad/` folder.
+most symbols are generated by QEDA as described above.
+
+to export gerber files for PCB manufacturer (and photo preview + overview document):
+
+~~~
+make fabrication
+~~~
+
+versioning
+----------
+
+the source schematic and board layout do not include version information.
+when generating schematic or board fabrication output, a copy of the source files with date and version information is done as `.versioned.` files.
+the date corresponds to the last changes (i.e. commit).
+the version is formatted as `v.r`:
+
+- `v` corresponds to the major version information defined in `version`
+- `r` corresponds to the total number of changes done to the source files
--- a/KiBOM_CLI.py
+++ b/KiBOM_CLI.py
@ -0,0 +1,28 @@
+#!/usr/bin/env python3
+"""
+    @package
+    KiBOM - Bill of Materials generation for KiCad
+
+    Generate BOM in xml, csv, txt, tsv, html or xlsx formats.
+
+    - Components are automatically grouped into BoM rows (grouping is configurable)
+    - Component groups count number of components and list component designators
+    - Rows are automatically sorted by component reference(s)
+    - Supports board variants
+
+    Extended options are available in the "bom.ini" config file in the PCB directory
+    (this file is auto-generated with default options the first time the script is executed).
+
+    For usage help:
+    python KiBOM_CLI.py -h
+"""
+
+import sys
+import os
+
+here = os.path.abspath(os.path.dirname(__file__))
+sys.path.insert(0, here)
+
+from kibom.__main__ import main  # noqa: E402
+
+main()
--- a/112
+++ b/112
@ -0,0 +1,112 @@
+# project file name (use for schematic and board layout)
+NAME ?= template
+SUBSHEET ?= 
+# path to KiCad CLI
+KICAD = kicad-cli
+# path to qeda
+QEDA := qeda
+# path to KiBOM
+KIBOM := kibom
+# path to InteractiveHtmlBom
+IBOMGEN := ~/.local/share/kicad/8.0/3rdparty/plugins/org_openscopeproject_InteractiveHtmlBom/generate_interactive_bom.py
+
+# read project version
+VERSION := $(shell cat version)
+# current date for stamping output
+DATE = $(shell date +%Y-%m-%d)
+# revision based on number of changes on schematic or board layout
+REVISION := $(shell git log --pretty=oneline "${NAME}.kicad_sch" "${NAME}.kicad_pcb" | wc -l)
+
+# generate file with version information
+VERSIONED_EXT = kicad_sch kicad_pcb kicad_pro json
+define version_rule
+%.versioned.$1: %.$1
+	cp $$< $$@
+	sed --in-place 's/\$$$$version\$$$$/${VERSION}/g' $$@
+	sed --in-place 's/\$$$$date\$$$$/${DATE}/g' $$@
+	sed --in-place 's/\$$$$revision\$$$$/${REVISION}/g' $$@
+	sed --in-place 's/\.kicad_sch/.versioned.kicad_sch/g' $$@
+endef
+$(foreach EXT,$(VERSIONED_EXT),$(eval $(call version_rule,$(EXT))))
+VERSIONED_SHEET = $(foreach SHEET,$(NAME) $(SUBSHEET),$(SHEET).versioned.kicad_sch)
+
+FABRICATION_DIR := fabrication
+IBOM := ${FABRICATION_DIR}/ibom.html
+
+all: $(VERSIONED_SHEET) ${NAME}.sch.pdf ${NAME}.bom.csv render fab
+
+fab: ${FABRICATION_DIR} ${IBOM}
+
+render: ${NAME}.brd-top.png ${NAME}.brd-bot.png ${NAME}.brd-top.svg ${NAME}.brd-bot.svg ${NAME}.3d.step
+
+# generate fabrication files (gerbers/drill/BoM/PnP)
+${FABRICATION_DIR}: ${NAME}.versioned.kicad_sch ${NAME}.versioned.kicad_pcb
+	kikit fab jlcpcb --no-drc --assembly --field JLCPCB,LCSC --schematic $^ $@
+
+# generate fabrication files (gerbers/drill/uncorrected PnP)
+#${FABRICATION_DIR}: ${NAME}.versioned.kicad_pcb
+#	mkdir -p ${FABRICATION_DIR}
+#	$(KICAD) pcb export gerbers --output ${FABRICATION_DIR} $<
+#	$(KICAD) pcb export drill --output ${FABRICATION_DIR}/ $<
+#	$(KICAD) pcb export pos --output ${FABRICATION_DIR}/${NAME}.versioned.pos $<
+
+# generate interactive BoM
+${IBOM}: ${NAME}.versioned.kicad_pcb
+	python $(IBOMGEN) --no-browser --dest-dir `dirname $@` --name-format `basename $@ ".html"` --show-fields "Value" $< &>/dev/null
+
+# generate symbols and footprints from parts
+lib:
+	$(QEDA) generate qeda
+
+# generate printable version (PDF) of schematic
+%.sch.pdf: %.versioned.kicad_sch %.versioned.kicad_pro
+	$(KICAD) sch export pdf --output $@ $<
+
+# generate render from layout (top side)
+%.brd-top.png: %.versioned.kicad_pcb
+	pcbdraw plot --silent --no-components --dpi 600 --side front $< $@
+
+# generate render from layout (bottom side)
+%.brd-bot.png: %.versioned.kicad_pcb
+	pcbdraw plot --silent --no-components --dpi 600 --side back $< $@
+
+# generate render from layout (top side)
+%.brd-top.svg: %.versioned.kicad_pcb
+	$(KICAD) pcb export svg --layers F.Cu,F.Paste,F.Silkscreen,Edge.Cuts --page-size-mode 2 --exclude-drawing-sheet --output $@ $<
+
+# generate render from layout (bottom side)
+%.brd-bot.svg: %.versioned.kicad_pcb
+	$(KICAD) pcb export svg --layers B.Cu,B.Paste,B.Silkscreen,Edge.Cuts --mirror --page-size-mode 2 --exclude-drawing-sheet --output $@ $<
+
+# export Bill of Material (as CSV)
+%.bom.xml: %.versioned.kicad_sch %.versioned.kicad_pro
+	$(KICAD) sch export python-bom --output $@ $<
+
+# export 3D model
+%.3d.step: %.versioned.kicad_pcb
+	$(KICAD) pcb export step --output $@ $<
+
+# export Bill of Material (as CSV)
+%.bom.csv: %.bom.xml
+	$(KIBOM) $< $@
+
+# generate panel
+PANEL_DIR := panel_fab
+
+panel: panel.kicad_pcb panel.brd-top.svg panel.brd-bot.svg panel.brd-top.png panel.brd-bot.png ${PANEL_DIR}
+
+panel.kicad_pcb: ${NAME}.versioned.kicad_pcb ${NAME}.versioned.kicad_pro ${NAME}.versioned.kicad_sch panel.versioned.json
+	kikit panelize -p panel.versioned.json ${NAME}.versioned.kicad_pcb $@
+	sed --in-place 's/\"missing_courtyard\": \"warning\"/\"missing_courtyard\": \"ignore\"/g' $(patsubst %.kicad_pcb,%.kicad_pro,$@) # the mouse bites don't have a courtyard
+
+${PANEL_DIR}: ${NAME}.versioned.kicad_sch panel.kicad_pcb
+	kikit fab jlcpcb --assembly --missingError --field JLCPCB,LCSC --schematic $^ $@
+
+clean:
+	rm -f $(foreach EXT,$(VERSIONED_EXT),${NAME}.versioned.$(EXT))
+	rm -f ${NAME}.sch.pdf ${NAME}.brd-top.png ${NAME}.brd-bot.png ${NAME}.brd-top.svg ${NAME}.brd-bot.svg ${NAME}.versioned.xml ${NAME}.bom.csv
+	rm -f ${NAME}.versioned.kicad_prl ${NAME}.versioned.kicad_pro-bak ${NAME}.versioned.xml ${NAME}.versioned.csv
+	rm -f ${IBOM}
+	rm -rf ${FABRICATION_DIR}
+	rm -f panel.versioned.json panel.kicad_pcb panel.kicad_pro panel.brd-top.svg panel.brd-bot.svg panel.brd-top.png panel.brd-bot.png
+	rm -rf ${PANEL_DIR}
--- a/README.md
+++ b/README.md
@ -1,51 +1,7 @@
-The USB bug detector identifies USB type-A cables (or devices) with integrated circuits.
+these are the hardware design files for **insert project name here**.

-<img src="picture/v1_front.webp" title="front" height="250"/>
-<img src="picture/v1_back.webp" title="back" height="250"/>
+purpose
+=======

 usage
 =====
-
-To use the USB bug detector, follow the steps provided on the back of the board:
-
- insert a CR1220 coin cell battery in the USB bug detector for it to be operational
- press on the RESET button to arm the test
- the BUGGED LED should be off
- plug the USB cable in the USB receptacle
- if the BUGGED LED switches on, the USB cable embeds an integrated circuit (e.g. a bug)
- if the BUGGED LED remains off, the cable is same to use
-
-After the test, to save power, press again on the RESET button.
-
-To ensure that the USB bug detector works, after pressing on the RESET button, press on the SIMULATE button.
-This will simulate a USB plug with integrated circuit.
-The BUGGED LED should switch on.
-This also ensures the battery is not empty.
-
-When the LED is on, the USB bug detector draws 3 mA.
-When the LED is off, the USB bug detector draws 64 nA.
-This results in a idle battery life of 62 years (for a typical 35 mAh CR1220 battery).
-This is on par with the self life of the battery (~ 1%/year).
-
-mode of operation
-=================
-
-An NOR-gate-based SR-latch is used.
-The RESET button triggers the R signal to reset the latch.
-When a USB cable is plugged, power is provided by the battery to the cable.
-If an integrated circuits is present, current will flow through.
-A 1 kOhm resistor on the low side (e.g. ground) will create a voltage.
-If the plug draws more than 1.6 mA, the resulting 1.6 V will trigger the S signal to set the latch.
-The BUG LED will indicate when the SR-latch is set.
-The latch remains set until the RESET button is present.
-Thus, even if the plug stops drawing power, the LED remains on.
-
-This minimum 1.6 mA current draw is often caused by the decoupling/bypass capacitor required by integrated circuit, or accompanying voltage regulator.
-When charging, the capacitor acts as a short for a small time, allowing current to flow.
-On USB plugs with just resistors, or LEDs, the resulting current flow is not large enough.
-
-The SIMULATE circuit simulates an integrated circuit by putting a 100 nF capacitor across the USB receptacle.
-
-Because of the 1 kOhm inline resistor, and limited 3.3 V provided by the battery, a maximum of 3.3 mA can be drawn by the USB plug.
-This is often not enough to power up integrated circuit properly, particularly if they use a radio interface.
-Thus it is safe to use the USB bug detector on bugs, without activating it.
--- a/bom.ini
+++ b/bom.ini
@ -0,0 +1,108 @@
+[BOM_OPTIONS]
+; General BoM options here
+; If 'ignore_dnf' option is set to 1, rows that are not to be fitted on the PCB will not be written to the BoM file
+ignore_dnf = 0
+; If 'html_generate_dnf' option is set to 1, also generate a list of components not fitted on the PCB (HTML only)
+html_generate_dnf = 1
+; If 'use_alt' option is set to 1, grouped references will be printed in the alternate compressed style eg: R1-R7,R18
+use_alt = 0
+; If 'alt_wrap' option is set to and integer N, the references field will wrap after N entries are printed
+alt_wrap = 0
+; If 'number_rows' option is set to 1, each row in the BoM will be prepended with an incrementing row number
+number_rows = 1
+; If 'group_connectors' option is set to 1, connectors with the same footprints will be grouped together, independent of the name of the connector
+group_connectors = 1
+; If 'test_regex' option is set to 1, each component group will be tested against a number of regular-expressions (specified, per column, below). If any matches are found, the row is ignored in the output file
+test_regex = 1
+; If 'merge_blank_fields' option is set to 1, component groups with blank fields will be merged into the most compatible group, where possible
+merge_blank_fields = 1
+; Specify output file name format, %O is the defined output name, %v is the version, %V is the variant name which will be ammended according to 'variant_file_name_format'.
+output_file_name = %O%V
+; Specify the variant file name format, this is a unique field as the variant is not always used/specified. When it is unused you will want to strip all of this.
+variant_file_name_format = _(%V)
+; Field name used to determine if a particular part is to be fitted
+fit_field = Config
+; Make a backup of the bom before generating the new one, using the following template
+;make_backup = %O.tmp
+; Default number of boards to produce if none given on CLI with -n
+number_boards = 1
+; Default PCB variant if none given on CLI with -r
+board_variant = ['default']
+; Whether to hide headers from output file
+hide_headers = False
+; Whether to hide PCB info from output file
+hide_pcb_info = False
+
+[IGNORE_COLUMNS]
+; Any column heading that appears here will be excluded from the Generated BoM
+; Titles are case-insensitive
+Part
+Part Lib
+Footprint
+Footprint Lib
+Build Quantity
+sheetpath
+qeda_part
+qeda_variant
+name
+JLCPCB_CORRECTION
+Rating
+
+[COLUMN_ORDER]
+; Columns will appear in the order they are listed here
+; Titles are case-insensitive
+References
+Value
+Quantity Per PCB
+Description
+Part
+Part Lib
+Footprint
+Footprint Lib
+Build Quantity
+Manufacturer
+MPN
+DigiKey
+LCSC
+JLCPCB
+Datasheet
+
+[GROUP_FIELDS]
+; List of fields used for sorting individual components into groups
+; Components which match (comparing *all* fields) will be grouped together
+; Field names are case-insensitive
+Value
+Footprint
+Footprint Lib
+
+[COMPONENT_ALIASES]
+; A series of values which are considered to be equivalent for the part name
+; Each line represents a list of equivalent component name values separated by white space
+; e.g. 'c c_small cap' will ensure the equivalent capacitor symbols can be grouped together
+; Aliases are case-insensitive
+c	c_small	cap	capacitor
+r	r_small	res	resistor
+sw	switch
+l	l_small	inductor
+zener	zenersmall
+d	diode	d_small
+
+[REGEX_INCLUDE]
+; A series of regular expressions used to include parts in the BoM
+; If there are any regex defined here, only components that match against ANY of them will be included in the BOM
+; Column names are case-insensitive
+; Format is: "[ColumName] [Regex]" (white-space separated)
+
+[REGEX_EXCLUDE]
+; A series of regular expressions used to exclude parts from the BoM
+; If a component matches ANY of these, it will be excluded from the BoM
+; Column names are case-insensitive
+; Format is: "[ColumName] [Regex]" (white-space separated)
+References	^TP[0-9]*
+References	^FID
+Part	mount.*hole
+Part	solder.*bridge
+Part	test.*point
+Footprint	test.*point
+Footprint	mount.*hole
+Footprint	fiducial
--- a/6
+++ b/6
@ -0,0 +1,6 @@
+(fp_lib_table
+  (version 7)
+  (lib (name "qeda")(type "KiCad")(uri "${KIPRJMOD}/kicad/qeda.pretty")(options "")(descr ""))
+  (lib (name "kikit")(type "KiCad")(uri "${KIPRJMOD}/kicad/kikit.pretty")(options "")(descr ""))
+  (lib (name "logo")(type "KiCad")(uri "${KIPRJMOD}/kicad/logo.pretty")(options "")(descr ""))
+)
--- a/kicad/kikit.pretty/Board.kicad_mod
+++ b/kicad/kikit.pretty/Board.kicad_mod
@ -0,0 +1,14 @@
+(module Board (layer F.Cu) (tedit 605A21C1)
+  (descr "Mark board for extraction")
+  (attr virtual)
+  (fp_text reference REF** (at -4.5 -5) (layer Dwgs.User)
+    (effects (font (size 1 1) (thickness 0.15)) (justify left))
+  )
+  (fp_text value Board (at -7.25 -5) (layer Dwgs.User)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_line (start 0 0) (end -1.25 -4) (layer Dwgs.User) (width 0.2))
+  (fp_line (start -1.25 -4) (end -9.25 -4) (layer Dwgs.User) (width 0.2))
+  (fp_line (start 0 0) (end 0.5 -1) (layer Dwgs.User) (width 0.2))
+  (fp_line (start 0 0) (end -1 -0.5) (layer Dwgs.User) (width 0.2))
+)
--- a/kicad/kikit.pretty/Fiducial.kicad_mod
+++ b/kicad/kikit.pretty/Fiducial.kicad_mod
@ -0,0 +1,13 @@
+(module Fiducial:Fiducial (layer F.Cu) (tedit 5EA93A7C)
+  (descr "Circular Fiducial")
+  (tags fiducial)
+  (attr smd)
+  (fp_text reference REF** (at 0 -1.5) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Fiducial (at 0 1.5) (layer F.Fab) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad "" smd circle (at 0 0) (size 0.5 0.5) (layers F.Cu F.Mask)
+    (solder_mask_margin 0.25) (clearance 0.25))
+)
--- a/kicad/kikit.pretty/NPTH.kicad_mod
+++ b/kicad/kikit.pretty/NPTH.kicad_mod
@ -0,0 +1,9 @@
+(module NPTH (layer F.Cu) (tedit 618E7E16)
+  (fp_text reference REF** (at 0 0.5) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value NPTH (at 0 -0.5) (layer F.Fab) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (pad "" np_thru_hole circle (at 0 0) (size 1 1) (drill 1) (layers *.Cu *.Mask))
+)
--- a/kicad/kikit.pretty/Tab.kicad_mod
+++ b/kicad/kikit.pretty/Tab.kicad_mod
@ -0,0 +1,17 @@
+(module Tab (layer F.Cu) (tedit 60708B1A)
+  (descr "A symbol representing annotation for tab placement")
+  (attr virtual)
+  (fp_text reference REF** (at 0 -2) (layer F.SilkS) hide
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+  (fp_text value Tab (at -2.75 -1) (layer Dwgs.User)
+    (effects (font (size 1.2 1.2) (thickness 0.2)))
+  )
+  (fp_line (start 0.25 0) (end -0.75 1) (layer Dwgs.User) (width 0.3))
+  (fp_line (start 0.25 0) (end -0.75 -1) (layer Dwgs.User) (width 0.3))
+  (fp_line (start 0.25 0) (end -2.75 0) (layer Dwgs.User) (width 0.3))
+  (fp_line (start 0.25 1) (end 0.25 -1) (layer Dwgs.User) (width 0.3))
+  (fp_text user "KIKIT: width: 3mm" (at -5.5 0 90) (layer Dwgs.User)
+    (effects (font (size 1 1) (thickness 0.15)))
+  )
+)
--- a/kicad/logo.pretty/CuVoodoo_copper.kicad_mod
+++ b/kicad/logo.pretty/CuVoodoo_copper.kicad_mod
@ -0,0 +1,950 @@
+(footprint "CuVoodoo_copper" (version 20221018) (generator pcbnew)
+  (layer "F.Cu")
+  (descr "CuVoodoo logo")
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+    (connect_pads (clearance 0))
+    (min_thickness 0.254) (filled_areas_thickness no)
+    (keepout (tracks not_allowed) (vias not_allowed) (pads not_allowed) (copperpour not_allowed) (footprints allowed))
+    (fill (thermal_gap 0.508) (thermal_bridge_width 0.508))
+    (polygon
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--- a/kicad/logo.pretty/CuVoodoo_silk.kicad_mod
+++ b/kicad/logo.pretty/CuVoodoo_silk.kicad_mod
@ -0,0 +1,617 @@
+(footprint "CuVoodoo_silk" (version 20221018) (generator pcbnew)
+  (layer "F.Cu")
+  (attr board_only exclude_from_pos_files exclude_from_bom allow_missing_courtyard)
+  (fp_text reference "REF**" (at 0 -0.5 unlocked) (layer "F.SilkS") hide
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+    (tstamp f846a54a-9ddc-4bbc-be16-9ad293284767)
+  )
+  (fp_text value "CuVoodoo_silk" (at 0 1 unlocked) (layer "F.Fab") hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp a2d5c5b6-08b2-4c1d-af6a-961acdb63b34)
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+  (fp_line (start 8.75 3.75) (end 6.25 3.75)
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+  (fp_arc (start 6 4) (mid 6.073223 3.823223) (end 6.25 3.75)
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+  (fp_poly
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+
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+  (fp_poly
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--- a/kicad/logo.pretty/OSHW.kicad_mod
+++ b/kicad/logo.pretty/OSHW.kicad_mod
@ -0,0 +1,108 @@
+(footprint "OSHW" (version 20221018) (generator pcbnew)
+  (layer "F.Cu")
+  (attr board_only exclude_from_pos_files exclude_from_bom allow_missing_courtyard)
+  (fp_text reference "REF**" (at 0 -0.5 unlocked) (layer "F.SilkS") hide
+      (effects (font (size 1 1) (thickness 0.1)))
+    (tstamp f1e067ff-287b-4a60-b936-f32f4b57d565)
+  )
+  (fp_text value "OSHW" (at 0 1 unlocked) (layer "F.Fab") hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp b22282bc-de50-4908-a3c5-ad7501a68e4a)
+  )
+  (fp_line (start 0.227273 2.727273) (end 1.136364 2.727273)
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+  (fp_line (start 0.227273 3.636364) (end 1.136364 3.636364)
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+  (fp_line (start 0.227273 4.545455) (end 1.136364 4.545455)
+    (stroke (width 0.454544) (type solid)) (layer "F.SilkS") (tstamp 76e9343e-0e40-4f34-a90b-b087051025c3))
+  (fp_line (start 0.227273 5.454545) (end 1.136364 5.454545)
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+  (fp_line (start 0.227273 7.272727) (end 1.136364 7.272727)
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+  (fp_arc (start 7.272727 2.045455) (mid 7.754845 2.245155) (end 7.954545 2.727273)
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--- a/kicad/logo.pretty/bunny.kicad_mod
+++ b/kicad/logo.pretty/bunny.kicad_mod
@ -0,0 +1,599 @@
+(footprint "bunny" (version 20221018) (generator pcbnew)
+  (layer "F.Cu")
+  (descr "design year indication")
+  (attr board_only exclude_from_pos_files exclude_from_bom allow_missing_courtyard)
+  (fp_text reference "REF**" (at 0 -0.5 unlocked) (layer "F.SilkS") hide
+      (effects (font (size 1 1) (thickness 0.1)))
+    (tstamp 4e2c9664-f6ac-467e-880e-cb2256b0c6f7)
+  )
+  (fp_text value "bunny" (at 0 1 unlocked) (layer "F.Fab") hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 3d70715b-682b-4e83-9646-7a633830e583)
+  )
+  (fp_circle (center 4.78 7) (end 4.98 7)
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+  (fp_circle (center 5 5) (end 9.85 5)
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--- a/kicad/logo/bunny.svg
+++ b/kicad/logo/bunny.svg
--- a/kicad/logo/dragon.svg
+++ b/kicad/logo/dragon.svg
--- a/kicad/partdb.kicad_dbl
+++ b/kicad/partdb.kicad_dbl
--- a/kicad/qeda.3dshapes/CAPC1608X92N.wrl
+++ b/kicad/qeda.3dshapes/CAPC1608X92N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -0.4 -0.8 0,
+        0.4 -0.8 0,
+        0.4 0.8 0,
+        -0.4 0.8 0,
+        -0.4 -0.8 0.92,
+        0.4 -0.8 0.92,
+        0.4 0.8 0.92,
+        -0.4 0.8 0.92
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+    }
+    coordIndex [
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+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/LEDC2012X80N.wrl
+++ b/kicad/qeda.3dshapes/LEDC2012X80N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -0.6 -1 0,
+        0.6 -1 0,
+        0.6 1 0,
+        -0.6 1 0,
+        -0.6 -1 0.8,
+        0.6 -1 0.8,
+        0.6 1 0.8,
+        -0.6 1 0.8
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+    coordIndex [
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+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/UC1608X55N.wrl
+++ b/kicad/qeda.3dshapes/UC1608X55N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -0.4 -0.8 0,
+        0.4 -0.8 0,
+        0.4 0.8 0,
+        -0.4 0.8 0,
+        -0.4 -0.8 0.55,
+        0.4 -0.8 0.55,
+        0.4 0.8 0.55,
+        -0.4 0.8 0.55
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.3dshapes/UPC2012X80N.wrl
+++ b/kicad/qeda.3dshapes/UPC2012X80N.wrl
@ -0,0 +1,35 @@
+#VRML V2.0 utf8
+Shape {
+  appearance Appearance {
+    material Material {
+    diffuseColor 0.37 0.37 0.37
+    emissiveColor 0.0 0.0 0.0
+    specularColor 1.0 1.0 1.0
+    ambientIntensity 1.0
+    transparency 0.5
+    shininess 1.0
+    }
+  }
+  geometry IndexedFaceSet {
+    coord Coordinate {
+      point [
+        -0.6 -1 0,
+        0.6 -1 0,
+        0.6 1 0,
+        -0.6 1 0,
+        -0.6 -1 0.8,
+        0.6 -1 0.8,
+        0.6 1 0.8,
+        -0.6 1 0.8
+      ]
+    }
+    coordIndex [
+      0,1,2,3,-1
+      4,5,6,7,-1
+      0,1,5,4,-1
+      2,3,7,6,-1
+      0,3,7,4,-1
+      1,2,6,5,-1
+    ]
+  }
+}
--- a/kicad/qeda.kicad_sym
+++ b/kicad/qeda.kicad_sym
@ -0,0 +1,142 @@
+(kicad_symbol_lib (version 20211014) (generator qeda)
+  (symbol "R0603" (pin_numbers hide) (pin_names hide) (in_bom yes) (on_board yes)
+    (property "Reference" "R"
+      (id 0)
+      (at 0.000 1.778 0)
+      (effects (font (size 1.27 1.27)) (justify bottom))
+    )
+    (property "Value" "R0603"
+      (id 1)
+      (at 0.000 -1.778 0)
+      (effects (font (size 1.27 1.27)) (justify top))
+    )
+    (property "Footprint" "qeda:UC1608X55N"
+      (id 2)
+      (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "ki_description" "resistor, chip, 1.6x0.8 mm"
+      (id 3)
+      (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (rectangle (start -2.540 1.016) (end 2.540 -1.016) (stroke (width 0.305) (type default) (color 0 0 0 0)) (fill (type background)))
+    (pin passive line
+      (at -3.810 0.000 0)
+      (length 1.270)
+      (name "L"
+        (effects (font (size 1.27 1.27)))
+      )
+      (number "1"
+        (effects (font (size 1.27 1.27)))
+      )
+    )
+    (pin passive line
+      (at 3.810 0.000 180)
+      (length 1.270)
+      (name "R"
+        (effects (font (size 1.27 1.27)))
+      )
+      (number "2"
+        (effects (font (size 1.27 1.27)))
+      )
+    )
+  )
+  (symbol "C0603" (pin_numbers hide) (pin_names hide) (in_bom yes) (on_board yes)
+    (property "Reference" "C"
+      (id 0)
+      (at 0.000 2.794 0)
+      (effects (font (size 1.27 1.27)) (justify bottom))
+    )
+    (property "Value" "C0603"
+      (id 1)
+      (at 0.000 -2.794 0)
+      (effects (font (size 1.27 1.27)) (justify top))
+    )
+    (property "Footprint" "qeda:CAPC1608X92N"
+      (id 2)
+      (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "ki_description" "Chip capacitor 1.6x0.8 mm"
+      (id 3)
+      (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "ki_keywords" "Capacitor"
+      (id 4)
+      (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (polyline (pts (xy -0.381 2.032) (xy -0.381 -2.032)) (stroke (width 0.305) (type default) (color 0 0 0 0)) (fill (type none)))
+    (polyline (pts (xy 0.381 2.032) (xy 0.381 -2.032)) (stroke (width 0.305) (type default) (color 0 0 0 0)) (fill (type none)))
+    (pin passive line
+      (at -2.540 0.000 0)
+      (length 2.159)
+      (name "L"
+        (effects (font (size 1.27 1.27)))
+      )
+      (number "1"
+        (effects (font (size 1.27 1.27)))
+      )
+    )
+    (pin passive line
+      (at 2.540 0.000 180)
+      (length 2.159)
+      (name "R"
+        (effects (font (size 1.27 1.27)))
+      )
+      (number "2"
+        (effects (font (size 1.27 1.27)))
+      )
+    )
+  )
+  (symbol "LED0805" (pin_numbers hide) (pin_names hide) (in_bom yes) (on_board yes)
+    (property "Reference" "D"
+      (id 0)
+      (at 0.000 2.032 0)
+      (effects (font (size 1.27 1.27)) (justify bottom))
+    )
+    (property "Value" "LED0805"
+      (id 1)
+      (at 0.000 -2.032 0)
+      (effects (font (size 1.27 1.27)) (justify top))
+    )
+    (property "Footprint" "qeda:UPC2012X80N"
+      (id 2)
+      (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "ki_description" "diode, LED, chip, 2.0x1.2 mm"
+      (id 3)
+      (at 0 0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (polyline (pts (xy -1.016 1.270) (xy 1.016 0.000) (xy -1.016 -1.270) (xy -1.016 1.270)) (stroke (width 0.305) (type default) (color 0 0 0 0)) (fill (type background)))
+    (polyline (pts (xy 1.016 1.270) (xy 1.016 -1.270)) (stroke (width 0.305) (type default) (color 0 0 0 0)) (fill (type none)))
+    (polyline (pts (xy 1.270 1.905) (xy 2.540 3.175)) (stroke (width 0.305) (type default) (color 0 0 0 0)) (fill (type none)))
+    (polyline (pts (xy 1.725 2.720) (xy 2.540 3.175) (xy 2.085 2.360) (xy 1.725 2.720)) (stroke (width 0.305) (type default) (color 0 0 0 0)) (fill (type outline)))
+    (polyline (pts (xy 1.905 1.270) (xy 3.175 2.540)) (stroke (width 0.305) (type default) (color 0 0 0 0)) (fill (type none)))
+    (polyline (pts (xy 2.360 2.085) (xy 3.175 2.540) (xy 2.720 1.725) (xy 2.360 2.085)) (stroke (width 0.305) (type default) (color 0 0 0 0)) (fill (type outline)))
+    (pin passive line
+      (at -2.540 0.000 0)
+      (length 1.524)
+      (name "A"
+        (effects (font (size 1.27 1.27)))
+      )
+      (number "2"
+        (effects (font (size 1.27 1.27)))
+      )
+    )
+    (pin passive line
+      (at 2.540 0.000 180)
+      (length 1.524)
+      (name "C"
+        (effects (font (size 1.27 1.27)))
+      )
+      (number "1"
+        (effects (font (size 1.27 1.27)))
+      )
+    )
+  )
+)
--- a/kicad/qeda.pretty/CAPC1608X92N.kicad_mod
+++ b/kicad/qeda.pretty/CAPC1608X92N.kicad_mod
@ -0,0 +1,38 @@
+(module CAPC1608X92N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at 0.000 -0.750) (size 1.250 1.100) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at 0.000 0.750) (size 1.250 1.100) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -0.925 -0.900) (end -0.925 0.900) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.925 -0.900) (end 0.925 0.900) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value CAPC1608X92N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_line (start -0.400 -0.800) (end 0.400 -0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 -0.800) (end 0.400 0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 0.800) (end -0.400 0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.400 0.800) (end -0.400 -0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.875 -1.550) (end -0.875 -1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.875 -1.050) (end -0.875 1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.875 1.050) (end -0.875 1.550) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.875 1.550) (end 0.875 1.550) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.875 1.550) (end 0.875 1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.875 1.050) (end 0.875 -1.050) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.875 -1.050) (end 0.875 -1.550) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.875 -1.550) (end -0.875 -1.550) (layer F.CrtYd) (width 0.050))
+  (model CAPC1608X92N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/LEDC2012X80N.kicad_mod
+++ b/kicad/qeda.pretty/LEDC2012X80N.kicad_mod
@ -0,0 +1,42 @@
+(module LEDC2012X80N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at 0.000 -0.900) (size 1.600 1.100) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at 0.000 0.900) (size 1.600 1.100) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -1.100 -1.100) (end -1.100 1.100) (layer F.SilkS) (width 0.200))
+  (fp_line (start 1.100 -1.100) (end 1.100 1.100) (layer F.SilkS) (width 0.200))
+  (fp_line (start -1.100 -1.100) (end -1.100 -1.750) (layer F.SilkS) (width 0.200))
+  (fp_line (start -1.100 -1.750) (end 1.100 -1.750) (layer F.SilkS) (width 0.200))
+  (fp_line (start 1.100 -1.750) (end 1.100 -1.100) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value LEDC2012X80N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 0.792 0.792) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 0.792 0.792) (thickness 0.100)))
+  )
+  (fp_line (start 0.000 -1.000) (end 0.600 -1.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.600 -1.000) (end 0.600 1.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.600 1.000) (end -0.600 1.000) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.600 1.000) (end -0.600 -0.400) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.600 -0.400) (end 0.000 -1.000) (layer F.Fab) (width 0.100))
+  (fp_line (start -1.050 -1.700) (end -1.050 -1.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.050 -1.250) (end -1.050 1.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.050 1.250) (end -1.050 1.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.050 1.700) (end 1.050 1.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 1.700) (end 1.050 1.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 1.250) (end 1.050 -1.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 -1.250) (end 1.050 -1.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 -1.700) (end -1.050 -1.700) (layer F.CrtYd) (width 0.050))
+  (model LEDC2012X80N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/UC1608X55N.kicad_mod
+++ b/kicad/qeda.pretty/UC1608X55N.kicad_mod
@ -0,0 +1,38 @@
+(module UC1608X55N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at 0.000 -0.700) (size 1.100 0.750) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at 0.000 0.700) (size 1.100 0.750) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -0.850 -0.900) (end -0.850 0.900) (layer F.SilkS) (width 0.200))
+  (fp_line (start 0.850 -0.900) (end 0.850 0.900) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value UC1608X55N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 0.528 0.528) (thickness 0.100)))
+  )
+  (fp_line (start -0.400 -0.800) (end 0.400 -0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 -0.800) (end 0.400 0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.400 0.800) (end -0.400 0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.400 0.800) (end -0.400 -0.800) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.730 -1.255) (end -0.730 -0.980) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.730 -0.980) (end -0.730 0.980) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.730 0.980) (end -0.730 1.255) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -0.730 1.255) (end 0.730 1.255) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.730 1.255) (end 0.730 0.980) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.730 0.980) (end 0.730 -0.980) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.730 -0.980) (end 0.730 -1.255) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 0.730 -1.255) (end -0.730 -1.255) (layer F.CrtYd) (width 0.050))
+  (model UC1608X55N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/kicad/qeda.pretty/UPC2012X80N.kicad_mod
+++ b/kicad/qeda.pretty/UPC2012X80N.kicad_mod
@ -0,0 +1,42 @@
+(module UPC2012X80N (layer F.Cu)
+  (attr smd)
+  (pad 1 smd rect (at 0.000 -0.900) (size 1.600 1.100) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (pad 2 smd rect (at 0.000 0.900) (size 1.600 1.100) (layers F.Cu F.Mask F.Paste)
+    (solder_mask_margin 0.050))
+  (fp_text reference REF** (at 0.000 0.000) (layer F.SilkS)
+    (effects (font (size 1.200 1.200) (thickness 0.200)))
+  )
+  (fp_line (start -1.100 -1.100) (end -1.100 1.100) (layer F.SilkS) (width 0.200))
+  (fp_line (start 1.100 -1.100) (end 1.100 1.100) (layer F.SilkS) (width 0.200))
+  (fp_line (start -1.100 -1.100) (end -1.100 -1.750) (layer F.SilkS) (width 0.200))
+  (fp_line (start -1.100 -1.750) (end 1.100 -1.750) (layer F.SilkS) (width 0.200))
+  (fp_line (start 1.100 -1.750) (end 1.100 -1.100) (layer F.SilkS) (width 0.200))
+  (fp_circle (center 0.000 0.000) (end 0.000 0.500) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.700 0.000) (end 0.700 0.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.000 -0.700) (end 0.000 0.700) (layer F.Fab) (width 0.100))
+  (fp_text value UPC2012X80N (at 0.000 0.000 90) (layer F.Fab)
+    (effects (font (size 0.792 0.792) (thickness 0.100)))
+  )
+  (fp_text user REF** (at 0.000 0.000 90) hide (layer F.Fab)
+    (effects (font (size 0.792 0.792) (thickness 0.100)))
+  )
+  (fp_line (start 0.000 -1.000) (end 0.600 -1.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.600 -1.000) (end 0.600 1.000) (layer F.Fab) (width 0.100))
+  (fp_line (start 0.600 1.000) (end -0.600 1.000) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.600 1.000) (end -0.600 -0.400) (layer F.Fab) (width 0.100))
+  (fp_line (start -0.600 -0.400) (end 0.000 -1.000) (layer F.Fab) (width 0.100))
+  (fp_line (start -1.050 -1.700) (end -1.050 -1.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.050 -1.250) (end -1.050 1.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.050 1.250) (end -1.050 1.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start -1.050 1.700) (end 1.050 1.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 1.700) (end 1.050 1.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 1.250) (end 1.050 -1.250) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 -1.250) (end 1.050 -1.700) (layer F.CrtYd) (width 0.050))
+  (fp_line (start 1.050 -1.700) (end -1.050 -1.700) (layer F.CrtYd) (width 0.050))
+  (model UPC2012X80N.wrl
+    (at (xyz 0 0 0))
+    (scale (xyz 0.3937 0.3937 0.3937))
+    (rotate (xyz 0 0 0 ))
+  )
+)
--- a/2
+++ b/2
@ -1 +1 @@
-Subproject commit e482148d18ad4d94d476c68798828ac647141b06
+Subproject commit 3f3f15e7c3aacf85d86bfeb31cfcd14abf2f66e1
--- a/picture/v0_back.webp
+++ b/picture/v0_back.webp
--- a/picture/v0_front.webp
+++ b/picture/v0_front.webp
--- a/picture/v1_back.webp
+++ b/picture/v1_back.webp
--- a/picture/v1_front.webp
+++ b/picture/v1_front.webp
--- a/6
+++ b/6
@ -0,0 +1,6 @@
+(sym_lib_table
+  (version 7)
+  (lib (name "qeda")(type "KiCad")(uri "${KIPRJMOD}/kicad/qeda.kicad_sym")(options "")(descr ""))
+  (lib (name "partdb")(type "Database")(uri "${KIPRJMOD}/kicad/partdb.kicad_dbl")(options "")(descr ""))
+  (lib (name "Connector_Audio")(type "KiCad")(uri "${KICAD7_SYMBOL_DIR}/Connector_Audio.kicad_sym")(options "")(descr ""))
+)
--- a/template.kicad_pcb
+++ b/template.kicad_pcb
@ -0,0 +1,113 @@
+(kicad_pcb
+	(version 20240108)
+	(generator "pcbnew")
+	(generator_version "8.0")
+	(general
+		(thickness 1.6)
+		(legacy_teardrops no)
+	)
+	(paper "A4")
+	(title_block
+		(date "$date$")
+		(rev "$version$.$revision$")
+		(company "CuVoodoo")
+		(comment 1 "King Kévin")
+		(comment 2 "CERN-OHL-S")
+	)
+	(layers
+		(0 "F.Cu" signal)
+		(31 "B.Cu" signal)
+		(33 "F.Adhes" user "F.Adhesive")
+		(36 "B.SilkS" user "B.Silkscreen")
+		(37 "F.SilkS" user "F.Silkscreen")
+		(38 "B.Mask" user)
+		(39 "F.Mask" user)
+		(44 "Edge.Cuts" user)
+		(45 "Margin" user)
+		(46 "B.CrtYd" user "B.Courtyard")
+		(47 "F.CrtYd" user "F.Courtyard")
+		(48 "B.Fab" user)
+		(49 "F.Fab" user)
+	)
+	(setup
+		(stackup
+			(layer "F.SilkS"
+				(type "Top Silk Screen")
+				(color "White")
+			)
+			(layer "F.Mask"
+				(type "Top Solder Mask")
+				(color "Green")
+				(thickness 0.01)
+			)
+			(layer "F.Cu"
+				(type "copper")
+				(thickness 0.035)
+			)
+			(layer "dielectric 1"
+				(type "core")
+				(color "Polyimide")
+				(thickness 1.51)
+				(material "FR4")
+				(epsilon_r 4.5)
+				(loss_tangent 0.02)
+			)
+			(layer "B.Cu"
+				(type "copper")
+				(thickness 0.035)
+			)
+			(layer "B.Mask"
+				(type "Bottom Solder Mask")
+				(color "Green")
+				(thickness 0.01)
+			)
+			(layer "B.SilkS"
+				(type "Bottom Silk Screen")
+				(color "White")
+			)
+			(copper_finish "HAL SnPb")
+			(dielectric_constraints no)
+		)
+		(pad_to_mask_clearance 0.038)
+		(solder_mask_min_width 0.1)
+		(allow_soldermask_bridges_in_footprints no)
+		(pcbplotparams
+			(layerselection 0x00010fc_ffffffff)
+			(plot_on_all_layers_selection 0x0000000_00000000)
+			(disableapertmacros no)
+			(usegerberextensions no)
+			(usegerberattributes yes)
+			(usegerberadvancedattributes yes)
+			(creategerberjobfile yes)
+			(dashed_line_dash_ratio 12.000000)
+			(dashed_line_gap_ratio 3.000000)
+			(svgprecision 6)
+			(plotframeref no)
+			(viasonmask no)
+			(mode 1)
+			(useauxorigin no)
+			(hpglpennumber 1)
+			(hpglpenspeed 20)
+			(hpglpendiameter 15.000000)
+			(pdf_front_fp_property_popups yes)
+			(pdf_back_fp_property_popups yes)
+			(dxfpolygonmode yes)
+			(dxfimperialunits yes)
+			(dxfusepcbnewfont yes)
+			(psnegative no)
+			(psa4output no)
+			(plotreference yes)
+			(plotvalue yes)
+			(plotfptext yes)
+			(plotinvisibletext no)
+			(sketchpadsonfab no)
+			(subtractmaskfromsilk no)
+			(outputformat 1)
+			(mirror no)
+			(drillshape 1)
+			(scaleselection 1)
+			(outputdirectory "")
+		)
+	)
+	(net 0 "")
+)
--- a/template.kicad_pro
+++ b/template.kicad_pro
@ -0,0 +1,667 @@
+{
+  "board": {
+    "3dviewports": [],
+    "design_settings": {
+      "defaults": {
+        "apply_defaults_to_fp_fields": false,
+        "apply_defaults_to_fp_shapes": false,
+        "apply_defaults_to_fp_text": false,
+        "board_outline_line_width": 0.05,
+        "copper_line_width": 0.2,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.05,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": true,
+          "text_position": 0,
+          "units_format": 1
+        },
+        "fab_line_width": 0.1,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.15,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 0.762,
+          "height": 1.524,
+          "width": 1.524
+        },
+        "silk_line_width": 0.15,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.15,
+        "silk_text_upright": false,
+        "zones": {
+          "45_degree_only": false,
+          "min_clearance": 0.508
+        }
+      },
+      "diff_pair_dimensions": [
+        {
+          "gap": 0.0,
+          "via_gap": 0.0,
+          "width": 0.0
+        },
+        {
+          "gap": 0.43,
+          "via_gap": 0.0,
+          "width": 0.2
+        }
+      ],
+      "drc_exclusions": [],
+      "meta": {
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "connection_width": "warning",
+        "copper_edge_clearance": "error",
+        "copper_sliver": "warning",
+        "courtyards_overlap": "error",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "error",
+        "duplicate_footprints": "warning",
+        "extra_footprint": "warning",
+        "footprint": "error",
+        "footprint_symbol_mismatch": "warning",
+        "footprint_type_mismatch": "warning",
+        "hole_clearance": "error",
+        "hole_near_hole": "error",
+        "invalid_outline": "error",
+        "isolated_copper": "warning",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "lib_footprint_issues": "ignore",
+        "lib_footprint_mismatch": "ignore",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "missing_courtyard": "warning",
+        "missing_footprint": "warning",
+        "net_conflict": "warning",
+        "npth_inside_courtyard": "ignore",
+        "padstack": "error",
+        "pth_inside_courtyard": "ignore",
+        "shorting_items": "error",
+        "silk_edge_clearance": "ignore",
+        "silk_over_copper": "warning",
+        "silk_overlap": "warning",
+        "skew_out_of_range": "error",
+        "solder_mask_bridge": "error",
+        "starved_thermal": "error",
+        "text_height": "warning",
+        "text_thickness": "warning",
+        "through_hole_pad_without_hole": "error",
+        "too_many_vias": "error",
+        "track_dangling": "warning",
+        "track_width": "error",
+        "tracks_crossing": "error",
+        "unconnected_items": "error",
+        "unresolved_variable": "error",
+        "via_dangling": "warning",
+        "zone_has_empty_net": "error",
+        "zones_intersect": "error"
+      },
+      "rules": {
+        "allow_blind_buried_vias": false,
+        "allow_microvias": false,
+        "max_error": 0.005,
+        "min_clearance": 0.127,
+        "min_connection": 0.127,
+        "min_copper_edge_clearance": 0.3,
+        "min_hole_clearance": 0.254,
+        "min_hole_to_hole": 0.254,
+        "min_microvia_diameter": 0.2,
+        "min_microvia_drill": 0.1,
+        "min_resolved_spokes": 2,
+        "min_silk_clearance": 0.15,
+        "min_text_height": 1.0,
+        "min_text_thickness": 0.153,
+        "min_through_hole_diameter": 0.3,
+        "min_track_width": 0.127,
+        "min_via_annular_width": 0.13,
+        "min_via_diameter": 0.5,
+        "solder_mask_clearance": 0.0,
+        "solder_mask_min_width": 0.0,
+        "solder_mask_to_copper_clearance": 0.05,
+        "use_height_for_length_calcs": true
+      },
+      "teardrop_options": [
+        {
+          "td_onpadsmd": true,
+          "td_onroundshapesonly": false,
+          "td_ontrackend": false,
+          "td_onviapad": true
+        }
+      ],
+      "teardrop_parameters": [
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_round_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_rect_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_track_end",
+          "td_width_to_size_filter_ratio": 0.9
+        }
+      ],
+      "track_widths": [
+        0.0,
+        0.127,
+        0.2,
+        0.3,
+        0.5
+      ],
+      "tuning_pattern_settings": {
+        "diff_pair_defaults": {
+          "corner_radius_percentage": 80,
+          "corner_style": 1,
+          "max_amplitude": 1.0,
+          "min_amplitude": 0.2,
+          "single_sided": false,
+          "spacing": 1.0
+        },
+        "diff_pair_skew_defaults": {
+          "corner_radius_percentage": 80,
+          "corner_style": 1,
+          "max_amplitude": 1.0,
+          "min_amplitude": 0.2,
+          "single_sided": false,
+          "spacing": 0.6
+        },
+        "single_track_defaults": {
+          "corner_radius_percentage": 80,
+          "corner_style": 1,
+          "max_amplitude": 1.0,
+          "min_amplitude": 0.2,
+          "single_sided": false,
+          "spacing": 0.6
+        }
+      },
+      "via_dimensions": [
+        {
+          "diameter": 0.0,
+          "drill": 0.0
+        },
+        {
+          "diameter": 0.6,
+          "drill": 0.3
+        },
+        {
+          "diameter": 0.8,
+          "drill": 0.4
+        },
+        {
+          "diameter": 1.0,
+          "drill": 0.5
+        }
+      ],
+      "zones_allow_external_fillets": false,
+      "zones_use_no_outline": true
+    },
+    "ipc2581": {
+      "dist": "",
+      "distpn": "",
+      "internal_id": "",
+      "mfg": "",
+      "mpn": ""
+    },
+    "layer_presets": [],
+    "viewports": []
+  },
+  "boards": [],
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "erc": {
+    "erc_exclusions": [],
+    "meta": {
+      "version": 0
+    },
+    "pin_map": [
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        1,
+        0,
+        1,
+        2
+      ],
+      [
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        1,
+        1,
+        2,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        1,
+        1,
+        1,
+        1,
+        1,
+        0,
+        1,
+        1,
+        1,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        2,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2
+      ]
+    ],
+    "rule_severities": {
+      "bus_definition_conflict": "error",
+      "bus_entry_needed": "error",
+      "bus_to_bus_conflict": "error",
+      "bus_to_net_conflict": "error",
+      "conflicting_netclasses": "error",
+      "different_unit_footprint": "error",
+      "different_unit_net": "error",
+      "duplicate_reference": "error",
+      "duplicate_sheet_names": "error",
+      "endpoint_off_grid": "warning",
+      "extra_units": "error",
+      "global_label_dangling": "warning",
+      "hier_label_mismatch": "error",
+      "label_dangling": "error",
+      "lib_symbol_issues": "warning",
+      "missing_bidi_pin": "warning",
+      "missing_input_pin": "warning",
+      "missing_power_pin": "error",
+      "missing_unit": "warning",
+      "multiple_net_names": "warning",
+      "net_not_bus_member": "warning",
+      "no_connect_connected": "warning",
+      "no_connect_dangling": "warning",
+      "pin_not_connected": "error",
+      "pin_not_driven": "error",
+      "pin_to_pin": "warning",
+      "power_pin_not_driven": "error",
+      "similar_labels": "warning",
+      "simulation_model_issue": "error",
+      "unannotated": "error",
+      "unit_value_mismatch": "error",
+      "unresolved_variable": "error",
+      "wire_dangling": "error"
+    }
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": []
+  },
+  "meta": {
+    "filename": "template.kicad_pro",
+    "version": 1
+  },
+  "net_settings": {
+    "classes": [
+      {
+        "bus_width": 12,
+        "clearance": 0.2,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.2,
+        "via_diameter": 0.6,
+        "via_drill": 0.3,
+        "wire_width": 6
+      },
+      {
+        "bus_width": 12,
+        "clearance": 0.2,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Thick",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.5,
+        "via_diameter": 0.8,
+        "via_drill": 0.4,
+        "wire_width": 6
+      },
+      {
+        "bus_width": 12,
+        "clearance": 0.15,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Thin",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.15,
+        "via_diameter": 0.5,
+        "via_drill": 0.3,
+        "wire_width": 6
+      }
+    ],
+    "meta": {
+      "version": 3
+    },
+    "net_colors": null,
+    "netclass_assignments": null,
+    "netclass_patterns": []
+  },
+  "pcbnew": {
+    "last_paths": {
+      "gencad": "",
+      "idf": "",
+      "netlist": "",
+      "plot": "",
+      "pos_files": "",
+      "specctra_dsn": "",
+      "step": "",
+      "svg": "",
+      "vrml": ""
+    },
+    "page_layout_descr_file": ""
+  },
+  "schematic": {
+    "annotate_start_num": 0,
+    "bom_fmt_presets": [],
+    "bom_fmt_settings": {
+      "field_delimiter": ",",
+      "keep_line_breaks": false,
+      "keep_tabs": false,
+      "name": "CSV",
+      "ref_delimiter": ",",
+      "ref_range_delimiter": "",
+      "string_delimiter": "\""
+    },
+    "bom_presets": [],
+    "bom_settings": {
+      "exclude_dnp": false,
+      "fields_ordered": [
+        {
+          "group_by": false,
+          "label": "Reference",
+          "name": "Reference",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Value",
+          "name": "Value",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Datasheet",
+          "name": "Datasheet",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Footprint",
+          "name": "Footprint",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Qty",
+          "name": "${QUANTITY}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "DNP",
+          "name": "${DNP}",
+          "show": true
+        }
+      ],
+      "filter_string": "",
+      "group_symbols": true,
+      "name": "Grouped By Value",
+      "sort_asc": true,
+      "sort_field": "Reference"
+    },
+    "connection_grid_size": 50.0,
+    "drawing": {
+      "dashed_lines_dash_length_ratio": 12.0,
+      "dashed_lines_gap_length_ratio": 3.0,
+      "default_line_thickness": 6.0,
+      "default_text_size": 50.0,
+      "field_names": [],
+      "intersheets_ref_own_page": false,
+      "intersheets_ref_prefix": "",
+      "intersheets_ref_short": false,
+      "intersheets_ref_show": false,
+      "intersheets_ref_suffix": "",
+      "junction_size_choice": 3,
+      "label_size_ratio": 0.375,
+      "operating_point_overlay_i_precision": 3,
+      "operating_point_overlay_i_range": "~A",
+      "operating_point_overlay_v_precision": 3,
+      "operating_point_overlay_v_range": "~V",
+      "overbar_offset_ratio": 1.23,
+      "pin_symbol_size": 25.0,
+      "text_offset_ratio": 0.15
+    },
+    "legacy_lib_dir": "",
+    "legacy_lib_list": [],
+    "meta": {
+      "version": 1
+    },
+    "net_format_name": "",
+    "ngspice": {
+      "fix_include_paths": true,
+      "fix_passive_vals": false,
+      "meta": {
+        "version": 0
+      },
+      "model_mode": 0,
+      "workbook_filename": ""
+    },
+    "page_layout_descr_file": "",
+    "plot_directory": "",
+    "spice_adjust_passive_values": false,
+    "spice_current_sheet_as_root": false,
+    "spice_external_command": "spice \"%I\"",
+    "spice_model_current_sheet_as_root": true,
+    "spice_save_all_currents": false,
+    "spice_save_all_dissipations": false,
+    "spice_save_all_voltages": false,
+    "subpart_first_id": 65,
+    "subpart_id_separator": 0
+  },
+  "sheets": [
+    [
+      "43fc3289-82a7-492c-a423-3030e10115dc",
+      "Root"
+    ]
+  ],
+  "text_variables": {}
+}
--- a/template.kicad_sch
+++ b/template.kicad_sch
@ -0,0 +1,20 @@
+(kicad_sch
+	(version 20231120)
+	(generator "eeschema")
+	(generator_version "8.0")
+	(uuid "43fc3289-82a7-492c-a423-3030e10115dc")
+	(paper "A4")
+	(title_block
+		(date "$date$")
+		(rev "$version$.$revision$")
+		(company "CuVoodoo")
+		(comment 1 "King Kévin")
+		(comment 2 "CERN-OHL-S")
+	)
+	(lib_symbols)
+	(sheet_instances
+		(path "/"
+			(page "1")
+		)
+	)
+)
--- a/usb_bug_detector.brd.json
+++ b/usb_bug_detector.brd.json
--- a/usb_bug_detector.sch.json
+++ b/usb_bug_detector.sch.json
--- a/2
+++ b/2
@ -1 +1 @@
-1
+0
Author	SHA1	Message	Date
King Kévin	a8810edd3b	make: improve panelization	2024-04-27 10:40:12 +02:00
King Kévin	0038c3bdf3	lib: update repo	2024-04-19 04:20:05 +02:00
King Kévin	209b5852e0	brd: add contraints and predefined sizes	2024-04-19 04:18:14 +02:00
King Kévin	870be28af6	sch/brd: save as KiCAD v8	2024-04-19 04:01:49 +02:00
King Kévin	bf94fcb10c	make: fix clean	2024-04-19 04:00:26 +02:00
King Kévin	6823a71175	doc: update dev notes to KiCAD v8	2024-04-19 04:00:26 +02:00
King Kévin	9b8c48a33c	make: add svg render	2024-04-19 04:00:26 +02:00
King Kévin	2497f9d94b	make: use ibom from kicad8	2024-04-19 04:00:26 +02:00
King Kévin	88deb003a6	lib: update repo	2024-03-18 23:44:10 +01:00
King Kévin	529880abb4	make dragon kicad compatible	2024-03-18 23:43:19 +01:00
King Kévin	fa16059e46	add old and new year logo	2024-03-08 07:24:21 +01:00
King Kévin	200f8b179d	make: remove components from 2d rendering	2024-03-08 07:14:50 +01:00
King Kévin	07570f2911	make: update bom tool	2024-03-08 07:14:21 +01:00
King Kévin	0830600044	make: include DNF parts	2024-03-08 07:14:21 +01:00
King Kévin	3933cbccf8	make: export 3d model	2024-03-08 07:14:21 +01:00
King Kévin	89b65b72de	make: add MPN in BoM	2024-03-08 07:13:47 +01:00
King Kévin	9e186892e5	make: ignore DRC	2024-03-08 07:12:31 +01:00
King Kévin	ddf9deb7fc	lib: update repo	2024-03-08 07:07:09 +01:00
King Kévin	0d73e5171d	remove refdes2fab.py and this is a just a gloabal plugin for me	2023-12-18 20:47:12 +01:00
King Kévin	3e78d6beb5	lib: update logo properties	2023-10-01 10:12:16 +02:00
King Kévin	c133c944de	lib: add silk logo (less DRC errors)	2023-10-01 10:12:16 +02:00
King Kévin	16b19cc0d4	lib: update repo	2023-10-01 10:09:52 +02:00
King Kévin	7310a8173a	lib: update repo	2023-09-19 05:12:28 +02:00
King Kévin	e97b5bf01f	lib: update part database	2023-09-19 05:11:40 +02:00
King Kévin	4aef742dc5	lib: generate Kicad7 library	2023-09-19 05:11:17 +02:00
King Kévin	f84deb30b8	lib: remove JLCPCB correction info as it is in the database now	2023-09-19 05:10:41 +02:00
King Kévin	50444cd555	bom: ignore some fields	2023-08-11 11:06:14 +02:00
King Kévin	cedd9571ee	lib: update repo	2023-08-11 11:05:29 +02:00
King Kévin	7ba4b33939	make: use JLCPCB field in bom fabrication export	2023-08-11 11:04:37 +02:00
King Kévin	6fe5a0e425	make: prevent bom backup	2023-08-11 11:04:37 +02:00
King Kévin	6eb31f0646	ignore kicad lock files	2023-08-11 11:04:37 +02:00
King Kévin	b893e7b57d	make: ignore DRC for export	2023-08-11 11:04:37 +02:00
King Kévin	ffbdffdf48	kicad: update files to v7	2023-03-30 22:32:40 +02:00
King Kévin	59b145d66e	doc: better list dependencies	2023-03-30 22:30:26 +02:00
King Kévin	c63fbf1689	make: use kikit again to generate fabrication	2023-03-30 22:30:26 +02:00
King Kévin	d0d4203d20	make: add bom generator (not included in pip)	2023-03-30 22:30:26 +02:00
King Kévin	cacdcb4ceb	make: update bom generation	2023-03-30 22:30:26 +02:00
King Kévin	87cb8cb49b	make: now use ibom plugin	2023-03-30 22:30:26 +02:00
King Kévin	99ab15f5eb	make: switch back from kicad nightly	2023-03-30 22:30:26 +02:00
King Kévin	253f301eb0	lib: update database	2023-03-30 22:30:26 +02:00
King Kévin	f1227afdcb	make: fabrication does not need schematic	2023-03-30 22:30:26 +02:00
King Kévin	33f9b2cb87	make: add subsheet support	2023-03-30 22:29:07 +02:00
King Kévin	8fa5152b25	make: use kicad-cli to export fabrication (kikit does not support v7 yet)	2023-03-30 22:26:57 +02:00
King Kévin	b066d8b473	make: update pcbdraw call	2023-03-30 22:26:57 +02:00
King Kévin	d6ed8e8f86	make: use kicad-cli to generate bom	2023-03-30 22:26:57 +02:00
King Kévin	ad93fccfcd	make: use kicad-cli to render schematic	2023-03-30 22:26:54 +02:00
King Kévin	5849e04d54	lib: update partdb library	2023-03-30 22:25:49 +02:00
King Kévin	0b268fef02	lib: add logos	2023-03-30 22:25:49 +02:00
King Kévin	cf6e95493f	lib: switch kicad footprint to v7	2023-03-30 22:25:49 +02:00
King Kévin	58e504ea47	lib: disable qeda pin shapes	2023-03-30 22:23:41 +02:00
King Kévin	87819cd3e6	lib: add partdb library	2023-03-30 22:23:41 +02:00
King Kévin	5d9a596047	lib: enable audio connector library	2023-03-30 22:23:41 +02:00
King Kévin	8992163da1	lib: switch to version 7	2023-03-30 22:23:41 +02:00
King Kévin	4e8d15f64c	sch: set kicad6 library	2022-12-24 03:09:46 +01:00
King Kévin	9b313a227c	lib: update repo	2022-12-24 03:08:33 +01:00
King Kévin	283b18e1e9	lib: switch output to KiCad 6	2022-12-24 03:08:20 +01:00
King Kévin	9490a25e50	lib: add JLCPCB corrections for USB connectors	2022-12-24 03:05:45 +01:00
King Kévin	f69a88300f	brd: add material propertires	2022-09-13 12:19:22 +02:00
King Kévin	f558b68515	add script to put refdes in fab layer	2022-09-13 12:14:21 +02:00
King Kévin	b612622310	make: specify ibom generator	2022-08-10 17:43:30 +02:00
King Kévin	c3ce63cbcd	make: output iteractive bom	2022-08-10 14:45:31 +02:00
King Kévin	1d561046dd	doc: add JLCPCB position correction	2022-08-10 12:39:29 +02:00
King Kévin	4636a6508b	doc: replace rake with make	2022-08-10 12:37:46 +02:00
King Kévin	e787a3412e	add parts placement corrections	2022-07-13 11:10:43 +02:00
King Kévin	dc767e3e37	make: output panel fab sooner	2022-07-13 11:10:21 +02:00
King Kévin	ac4807e5ac	make: remove git hash from revision	2022-07-04 10:17:51 +02:00
King Kévin	df2e0df1d7	lib: update repo	2022-06-22 09:13:01 +02:00
King Kévin	54dfc1d55d	rake: replace with more common make file	2022-06-22 09:12:23 +02:00
King Kévin	991fb55439	lib: rename generated lib to qeda	2022-06-17 18:06:46 +02:00
King Kévin	d00955e75d	brd: add net sizes	2022-06-17 17:55:41 +02:00
King Kévin	025d70af1b	sch/brd: add template kicad schematic and board layout	2022-06-10 19:56:34 +02:00
King Kévin	8b216cf9ff	lib: add most common components	2022-06-10 19:55:18 +02:00
King Kévin	b1c719eebb	git: remove cache file	2022-06-10 19:54:18 +02:00
King Kévin	4fdef09f30	sch/brd: remove lepton and ringdove files	2022-06-10 19:32:19 +02:00
King Kévin	4699c6b609	lib: update repo	2022-06-10 19:32:19 +02:00
King Kévin	88b9e8eb72	doc: update development doc for kicad toolchain	2022-06-10 19:32:19 +02:00
King Kévin	ecb253e18b	save JLC PnP corrections	2022-06-10 19:32:19 +02:00
King Kévin	2e982048c5	lib: document correction	2022-06-10 19:32:19 +02:00
King Kévin	fc17a5abe3	rake: version panel configuration	2022-06-10 19:32:19 +02:00
King Kévin	0d85bfb90a	rake: add panelization target	2022-06-10 19:32:19 +02:00
King Kévin	2882cb46c8	lib: remove date information	2022-06-10 19:32:19 +02:00
King Kévin	834f8c6f51	rake: use custom bom generator configuration	2022-06-10 19:32:19 +02:00
King Kévin	118fcf108c	rake: change Rakefile for KiCAD processing	2022-06-10 19:32:13 +02:00
King Kévin	932d8f9a39	git: ignore KiCAD output and cache	2022-06-10 19:31:54 +02:00
King Kévin	097ceb5efc	lib: add kikit footprints	2022-06-10 19:31:54 +02:00
King Kévin	26d6478b5c	lib: add kicad library config	2022-06-10 19:31:54 +02:00
King Kévin	acabbdfa31	lib: remove lepton and ringdove files	2022-06-10 19:31:49 +02:00
King Kévin	baecb40eaf	lib: allow generating kicad library	2022-06-10 19:31:41 +02:00
King Kévin	2f285de510	doc: add empty changelog file	2022-06-10 19:14:56 +02:00
King Kévin	479d64bc6a	rake: export gerber in a directory	2022-05-18 17:42:13 +02:00
King Kévin	531206e2b3	rake: ignore stdout when exporting svg	2022-05-18 17:42:13 +02:00
King Kévin	b9d4fabffd	lib: update repo	2022-05-17 11:14:21 +02:00
King Kévin	5d0de1ee87	brd: fix footprint paths	2022-03-27 16:26:01 +02:00
King Kévin	865d7a899e	README: development moved to other file	2022-03-23 10:49:07 +01:00
King Kévin	38466530e1	pnp: fix USB-C orientation	2022-03-23 10:34:20 +01:00
King Kévin	6e6ff34b51	pnp: adjust USB-C and CR1220 offset	2022-03-23 10:34:20 +01:00
King Kévin	b3200d6e6e	fab: add rotation for SOT23	2022-03-23 10:34:20 +01:00
King Kévin	93783e1682	qeda: set polarity mark to none	2022-03-23 10:34:20 +01:00
King Kévin	832e954f1e	put development instructions in seperate file	2022-03-23 10:32:24 +01:00
King Kévin	9298df7acf	update library	2022-03-07 14:42:51 +01:00
King Kévin	2e69c48388	update library url	2022-03-07 14:40:01 +01:00
King Kévin	bb05a4bf7a	lib: update to master	2022-02-02 16:42:09 +01:00
King Kévin	fd34b256e2	Makefile: fix lepton CLI call	2022-02-02 16:42:09 +01:00
King Kévin	e62773bfa1	Rakefile: minor, show error on empty BOM	2022-02-02 16:42:09 +01:00
King Kévin	b38e271a1e	Rakefile: minor, improve readability	2022-02-02 16:42:09 +01:00
King Kévin	8b0c84366a	ignore other manual fabrication export (not from Rakefile)	2022-02-02 15:29:48 +01:00
King Kévin	8e0783f1b6	remove NOTES file. notes should be in README	2021-12-19 11:35:23 +01:00
King Kévin	bc768d9d50	lib: add library to generate QR code footprints	2021-12-19 11:29:31 +01:00
King Kévin	6be506f497	README: remove netlist command	2021-12-19 11:29:06 +01:00
King Kévin	9d0b94fa07	Rakefile: remove unused netlist export	2021-12-19 11:28:47 +01:00
King Kévin	dd5f301225	Rakefile: remove unused notes export	2021-12-19 11:27:15 +01:00
King Kévin	3aa8672944	rake: put pnp info only on versioned file (don't change the source)	2021-12-19 11:25:58 +01:00
King Kévin	8490dbbda9	add PnP export	2021-12-19 11:24:57 +01:00
King Kévin	6d62658212	Rakefile: change attributes to be exported	2021-12-19 11:24:36 +01:00
King Kévin	e91356ffa3	README: fix layout	2021-09-02 12:33:14 +02:00