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Merge pull request #1765 from hathach/rp2040-host-bulk-comment 

Rp2040 host bulk comment
This commit is contained in:
Ha Thach 2022-12-01 10:10:40 +07:00 committed by GitHub
parent 2ae6a4d519 c9c7dfa868
commit f24f47d038
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 351 additions and 328 deletions
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583
src/portable/raspberrypi/rp2040/hcd_rp2040.c
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@ -81,89 +81,90 @@ static struct hw_endpoint *get_dev_ep(uint8_t dev_addr, uint8_t ep_addr)
TU_ATTR_ALWAYS_INLINE static inline uint8_t dev_speed(void) TU_ATTR_ALWAYS_INLINE static inline uint8_t dev_speed(void)
{ {
return (usb_hw->sie_status & USB_SIE_STATUS_SPEED_BITS) >> USB_SIE_STATUS_SPEED_LSB; return (usb_hw->sie_status & USB_SIE_STATUS_SPEED_BITS) >> USB_SIE_STATUS_SPEED_LSB;
} }
static bool need_pre(uint8_t dev_addr) TU_ATTR_ALWAYS_INLINE static inline bool need_pre(uint8_t dev_addr)
{ {
// If this device is different to the speed of the root device // If this device is different to the speed of the root device
// (i.e. is a low speed device on a full speed hub) then need pre // (i.e. is a low speed device on a full speed hub) then need pre
return hcd_port_speed_get(0) != tuh_speed_get(dev_addr); return hcd_port_speed_get(0) != tuh_speed_get(dev_addr);
} }
static void __tusb_irq_path_func(hw_xfer_complete)(struct hw_endpoint *ep, xfer_result_t xfer_result) static void __tusb_irq_path_func(hw_xfer_complete)(struct hw_endpoint *ep, xfer_result_t xfer_result)
{ {
// Mark transfer as done before we tell the tinyusb stack // Mark transfer as done before we tell the tinyusb stack
uint8_t dev_addr = ep->dev_addr; uint8_t dev_addr = ep->dev_addr;
uint8_t ep_addr = ep->ep_addr; uint8_t ep_addr = ep->ep_addr;
uint xferred_len = ep->xferred_len; uint xferred_len = ep->xferred_len;
hw_endpoint_reset_transfer(ep); hw_endpoint_reset_transfer(ep);
hcd_event_xfer_complete(dev_addr, ep_addr, xferred_len, xfer_result, true); hcd_event_xfer_complete(dev_addr, ep_addr, xferred_len, xfer_result, true);
} }
static void __tusb_irq_path_func(_handle_buff_status_bit)(uint bit, struct hw_endpoint *ep) static void __tusb_irq_path_func(_handle_buff_status_bit)(uint bit, struct hw_endpoint *ep)
{ {
usb_hw_clear->buf_status = bit; usb_hw_clear->buf_status = bit;
// EP may have been stalled? // EP may have been stalled?
assert(ep->active); assert(ep->active);
bool done = hw_endpoint_xfer_continue(ep); bool done = hw_endpoint_xfer_continue(ep);
if (done) if ( done )
{ {
hw_xfer_complete(ep, XFER_RESULT_SUCCESS); hw_xfer_complete(ep, XFER_RESULT_SUCCESS);
} }
} }
static void __tusb_irq_path_func(hw_handle_buff_status)(void) static void __tusb_irq_path_func(hw_handle_buff_status)(void)
{ {
uint32_t remaining_buffers = usb_hw->buf_status; uint32_t remaining_buffers = usb_hw->buf_status;
pico_trace("buf_status 0x%08x\n", remaining_buffers); pico_trace("buf_status 0x%08x\n", remaining_buffers);
// Check EPX first // Check EPX first
uint bit = 0b1; uint bit = 0b1;
if (remaining_buffers & bit) if ( remaining_buffers & bit )
{
remaining_buffers &= ~bit;
struct hw_endpoint * ep = &epx;
uint32_t ep_ctrl = *ep->endpoint_control;
if ( ep_ctrl & EP_CTRL_DOUBLE_BUFFERED_BITS )
{ {
TU_LOG(3, "Double Buffered: ");
}
else
{
TU_LOG(3, "Single Buffered: ");
}
TU_LOG_HEX(3, ep_ctrl);
_handle_buff_status_bit(bit, ep);
}
// Check "interrupt" (asynchronous) endpoints for both IN and OUT
for ( uint i = 1; i <= USB_HOST_INTERRUPT_ENDPOINTS && remaining_buffers; i++ )
{
// EPX is bit 0 & 1
// IEP1 IN is bit 2
// IEP1 OUT is bit 3
// IEP2 IN is bit 4
// IEP2 OUT is bit 5
// IEP3 IN is bit 6
// IEP3 OUT is bit 7
// etc
for ( uint j = 0; j < 2; j++ )
{
bit = 1 << (i * 2 + j);
if ( remaining_buffers & bit )
{
remaining_buffers &= ~bit; remaining_buffers &= ~bit;
struct hw_endpoint *ep = &epx; _handle_buff_status_bit(bit, &ep_pool[i]);
}
uint32_t ep_ctrl = *ep->endpoint_control;
if (ep_ctrl & EP_CTRL_DOUBLE_BUFFERED_BITS)
{
TU_LOG(3, "Double Buffered: ");
}else
{
TU_LOG(3, "Single Buffered: ");
}
TU_LOG_HEX(3, ep_ctrl);
_handle_buff_status_bit(bit, ep);
} }
}
// Check "interrupt" (asynchronous) endpoints for both IN and OUT if ( remaining_buffers )
for (uint i = 1; i <= USB_HOST_INTERRUPT_ENDPOINTS && remaining_buffers; i++) {
{ panic("Unhandled buffer %d\n", remaining_buffers);
// EPX is bit 0 & 1 }
// IEP1 IN is bit 2
// IEP1 OUT is bit 3
// IEP2 IN is bit 4
// IEP2 OUT is bit 5
// IEP3 IN is bit 6
// IEP3 OUT is bit 7
// etc
for(uint j = 0; j < 2; j++)
{
bit = 1 << (i*2+j);
if (remaining_buffers & bit)
{
remaining_buffers &= ~bit;
_handle_buff_status_bit(bit, &ep_pool[i]);
}
}
}
if (remaining_buffers)
{
panic("Unhandled buffer %d\n", remaining_buffers);
}
} }
static void __tusb_irq_path_func(hw_trans_complete)(void) static void __tusb_irq_path_func(hw_trans_complete)(void)
@ -186,70 +187,72 @@ static void __tusb_irq_path_func(hw_trans_complete)(void)
static void __tusb_irq_path_func(hcd_rp2040_irq)(void) static void __tusb_irq_path_func(hcd_rp2040_irq)(void)
{ {
uint32_t status = usb_hw->ints; uint32_t status = usb_hw->ints;
uint32_t handled = 0; uint32_t handled = 0;
if (status & USB_INTS_HOST_CONN_DIS_BITS) if ( status & USB_INTS_HOST_CONN_DIS_BITS )
{
handled |= USB_INTS_HOST_CONN_DIS_BITS;
if ( dev_speed() )
{ {
handled |= USB_INTS_HOST_CONN_DIS_BITS; hcd_event_device_attach(RHPORT_NATIVE, true);
}
if (dev_speed()) else
{ {
hcd_event_device_attach(RHPORT_NATIVE, true); hcd_event_device_remove(RHPORT_NATIVE, true);
}
else
{
hcd_event_device_remove(RHPORT_NATIVE, true);
}
// Clear speed change interrupt
usb_hw_clear->sie_status = USB_SIE_STATUS_SPEED_BITS;
} }
if (status & USB_INTS_STALL_BITS) // Clear speed change interrupt
{ usb_hw_clear->sie_status = USB_SIE_STATUS_SPEED_BITS;
// We have rx'd a stall from the device }
// NOTE THIS SHOULD HAVE PRIORITY OVER BUFF_STATUS
// AND TRANS_COMPLETE as the stall is an alternative response
// to one of those events
pico_trace("Stall REC\n");
handled |= USB_INTS_STALL_BITS;
usb_hw_clear->sie_status = USB_SIE_STATUS_STALL_REC_BITS;
hw_xfer_complete(&epx, XFER_RESULT_STALLED);
}
if (status & USB_INTS_BUFF_STATUS_BITS) if ( status & USB_INTS_STALL_BITS )
{ {
handled |= USB_INTS_BUFF_STATUS_BITS; // We have rx'd a stall from the device
TU_LOG(2, "Buffer complete\n"); // NOTE THIS SHOULD HAVE PRIORITY OVER BUFF_STATUS
hw_handle_buff_status(); // AND TRANS_COMPLETE as the stall is an alternative response
} // to one of those events
pico_trace("Stall REC\n");
handled |= USB_INTS_STALL_BITS;
usb_hw_clear->sie_status = USB_SIE_STATUS_STALL_REC_BITS;
hw_xfer_complete(&epx, XFER_RESULT_STALLED);
}
if (status & USB_INTS_TRANS_COMPLETE_BITS) if ( status & USB_INTS_BUFF_STATUS_BITS )
{ {
handled |= USB_INTS_TRANS_COMPLETE_BITS; handled |= USB_INTS_BUFF_STATUS_BITS;
usb_hw_clear->sie_status = USB_SIE_STATUS_TRANS_COMPLETE_BITS; TU_LOG(2, "Buffer complete\n");
TU_LOG(2, "Transfer complete\n"); hw_handle_buff_status();
hw_trans_complete(); }
}
if (status & USB_INTS_ERROR_RX_TIMEOUT_BITS) if ( status & USB_INTS_TRANS_COMPLETE_BITS )
{ {
handled |= USB_INTS_ERROR_RX_TIMEOUT_BITS; handled |= USB_INTS_TRANS_COMPLETE_BITS;
usb_hw_clear->sie_status = USB_SIE_STATUS_RX_TIMEOUT_BITS; usb_hw_clear->sie_status = USB_SIE_STATUS_TRANS_COMPLETE_BITS;
} TU_LOG(2, "Transfer complete\n");
hw_trans_complete();
}
if (status & USB_INTS_ERROR_DATA_SEQ_BITS) if ( status & USB_INTS_ERROR_RX_TIMEOUT_BITS )
{ {
usb_hw_clear->sie_status = USB_SIE_STATUS_DATA_SEQ_ERROR_BITS; handled |= USB_INTS_ERROR_RX_TIMEOUT_BITS;
TU_LOG(3, " Seq Error: [0] = 0x%04u [1] = 0x%04x\r\n", tu_u32_low16(*epx.buffer_control), tu_u32_high16(*epx.buffer_control)); usb_hw_clear->sie_status = USB_SIE_STATUS_RX_TIMEOUT_BITS;
panic("Data Seq Error \n"); }
}
if (status ^ handled) if ( status & USB_INTS_ERROR_DATA_SEQ_BITS )
{ {
panic("Unhandled IRQ 0x%x\n", (uint) (status ^ handled)); usb_hw_clear->sie_status = USB_SIE_STATUS_DATA_SEQ_ERROR_BITS;
} TU_LOG(3, " Seq Error: [0] = 0x%04u [1] = 0x%04x\r\n",
tu_u32_low16(*epx.buffer_control),
tu_u32_high16(*epx.buffer_control));
panic("Data Seq Error \n");
}
if ( status ^ handled )
{
panic("Unhandled IRQ 0x%x\n", (uint) (status ^ handled));
}
} }
void __tusb_irq_path_func(hcd_int_handler)(uint8_t rhport) void __tusb_irq_path_func(hcd_int_handler)(uint8_t rhport)
@ -260,116 +263,118 @@ void __tusb_irq_path_func(hcd_int_handler)(uint8_t rhport)
static struct hw_endpoint *_next_free_interrupt_ep(void) static struct hw_endpoint *_next_free_interrupt_ep(void)
{ {
struct hw_endpoint *ep = NULL; struct hw_endpoint * ep = NULL;
for (uint i = 1; i < TU_ARRAY_SIZE(ep_pool); i++) for ( uint i = 1; i < TU_ARRAY_SIZE(ep_pool); i++ )
{
ep = &ep_pool[i];
if ( !ep->configured )
{ {
ep = &ep_pool[i]; // Will be configured by _hw_endpoint_init / _hw_endpoint_allocate
if (!ep->configured) ep->interrupt_num = (uint8_t) (i - 1);
{ return ep;
// Will be configured by _hw_endpoint_init / _hw_endpoint_allocate
ep->interrupt_num = (uint8_t) (i - 1);
return ep;
}
} }
return ep; }
return ep;
} }
static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type) static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
{ {
struct hw_endpoint *ep = NULL; struct hw_endpoint * ep = NULL;
if (transfer_type != TUSB_XFER_CONTROL) if ( transfer_type != TUSB_XFER_CONTROL )
{ {
// Note: even though datasheet name these "Interrupt" endpoints. These are actually // Note: even though datasheet name these "Interrupt" endpoints. These are actually
// "Asynchronous" endpoints and can be used for other type such as: Bulk (ISO need confirmation) // "Asynchronous" endpoints and can be used for other type such as: Bulk (ISO need confirmation)
ep = _next_free_interrupt_ep(); ep = _next_free_interrupt_ep();
pico_info("Allocate %s ep %d\n", tu_edpt_type_str(transfer_type), ep->interrupt_num); pico_info("Allocate %s ep %d\n", tu_edpt_type_str(transfer_type), ep->interrupt_num);
assert(ep); assert(ep);
ep->buffer_control = &usbh_dpram->int_ep_buffer_ctrl[ep->interrupt_num].ctrl; ep->buffer_control = &usbh_dpram->int_ep_buffer_ctrl[ep->interrupt_num].ctrl;
ep->endpoint_control = &usbh_dpram->int_ep_ctrl[ep->interrupt_num].ctrl; ep->endpoint_control = &usbh_dpram->int_ep_ctrl[ep->interrupt_num].ctrl;
// 0 for epx (double buffered): TODO increase to 1024 for ISO // 0 for epx (double buffered): TODO increase to 1024 for ISO
// 2x64 for intep0 // 2x64 for intep0
// 3x64 for intep1 // 3x64 for intep1
// etc // etc
ep->hw_data_buf = &usbh_dpram->epx_data[64 * (ep->interrupt_num + 2)]; ep->hw_data_buf = &usbh_dpram->epx_data[64 * (ep->interrupt_num + 2)];
} }
else else
{ {
ep = &epx; ep = &epx;
ep->buffer_control = &usbh_dpram->epx_buf_ctrl; ep->buffer_control = &usbh_dpram->epx_buf_ctrl;
ep->endpoint_control = &usbh_dpram->epx_ctrl; ep->endpoint_control = &usbh_dpram->epx_ctrl;
ep->hw_data_buf = &usbh_dpram->epx_data[0]; ep->hw_data_buf = &usbh_dpram->epx_data[0];
} }
return ep; return ep;
} }
static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t transfer_type, uint8_t bmInterval) static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t transfer_type, uint8_t bmInterval)
{ {
// Already has data buffer, endpoint control, and buffer control allocated at this point // Already has data buffer, endpoint control, and buffer control allocated at this point
assert(ep->endpoint_control); assert(ep->endpoint_control);
assert(ep->buffer_control); assert(ep->buffer_control);
assert(ep->hw_data_buf); assert(ep->hw_data_buf);
uint8_t const num = tu_edpt_number(ep_addr); uint8_t const num = tu_edpt_number(ep_addr);
tusb_dir_t const dir = tu_edpt_dir(ep_addr); tusb_dir_t const dir = tu_edpt_dir(ep_addr);
ep->ep_addr = ep_addr; ep->ep_addr = ep_addr;
ep->dev_addr = dev_addr; ep->dev_addr = dev_addr;
// For host, IN to host == RX, anything else rx == false // For host, IN to host == RX, anything else rx == false
ep->rx = (dir == TUSB_DIR_IN); ep->rx = (dir == TUSB_DIR_IN);
// Response to a setup packet on EP0 starts with pid of 1 // Response to a setup packet on EP0 starts with pid of 1
ep->next_pid = (num == 0 ? 1u : 0u); ep->next_pid = (num == 0 ? 1u : 0u);
ep->wMaxPacketSize = wMaxPacketSize; ep->wMaxPacketSize = wMaxPacketSize;
ep->transfer_type = transfer_type; ep->transfer_type = transfer_type;
pico_trace("hw_endpoint_init dev %d ep %d %s xfer %d\n", ep->dev_addr, tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)], ep->transfer_type); pico_trace("hw_endpoint_init dev %d ep %d %s xfer %d\n", ep->dev_addr, tu_edpt_number(ep->ep_addr),
pico_trace("dev %d ep %d %s setup buffer @ 0x%p\n", ep->dev_addr, tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)], ep->hw_data_buf); ep_dir_string[tu_edpt_dir(ep->ep_addr)], ep->transfer_type);
uint dpram_offset = hw_data_offset(ep->hw_data_buf); pico_trace("dev %d ep %d %s setup buffer @ 0x%p\n", ep->dev_addr, tu_edpt_number(ep->ep_addr),
// Bits 0-5 should be 0 ep_dir_string[tu_edpt_dir(ep->ep_addr)], ep->hw_data_buf);
assert(!(dpram_offset & 0b111111)); uint dpram_offset = hw_data_offset(ep->hw_data_buf);
// Bits 0-5 should be 0
assert(!(dpram_offset & 0b111111));
// Fill in endpoint control register with buffer offset // Fill in endpoint control register with buffer offset
uint32_t ep_reg = EP_CTRL_ENABLE_BITS uint32_t ep_reg = EP_CTRL_ENABLE_BITS
| EP_CTRL_INTERRUPT_PER_BUFFER | EP_CTRL_INTERRUPT_PER_BUFFER
| (ep->transfer_type << EP_CTRL_BUFFER_TYPE_LSB) | (ep->transfer_type << EP_CTRL_BUFFER_TYPE_LSB)
| dpram_offset; | dpram_offset;
if (bmInterval) if ( bmInterval )
{
ep_reg |= (uint32_t) ((bmInterval - 1) << EP_CTRL_HOST_INTERRUPT_INTERVAL_LSB);
}
*ep->endpoint_control = ep_reg;
pico_trace("endpoint control (0x%p) <- 0x%x\n", ep->endpoint_control, ep_reg);
ep->configured = true;
if ( ep != &epx )
{
// Endpoint has its own addr_endp and interrupt bits to be setup!
// This is an interrupt/async endpoint. so need to set up ADDR_ENDP register with:
// - device address
// - endpoint number / direction
// - preamble
uint32_t reg = (uint32_t) (dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB));
if ( dir == TUSB_DIR_OUT )
{ {
ep_reg |= (uint32_t) ((bmInterval - 1) << EP_CTRL_HOST_INTERRUPT_INTERVAL_LSB); reg |= USB_ADDR_ENDP1_INTEP_DIR_BITS;
} }
*ep->endpoint_control = ep_reg;
pico_trace("endpoint control (0x%p) <- 0x%x\n", ep->endpoint_control, ep_reg);
ep->configured = true;
if (ep != &epx) if ( need_pre(dev_addr) )
{ {
// Endpoint has its own addr_endp and interrupt bits to be setup! reg |= USB_ADDR_ENDP1_INTEP_PREAMBLE_BITS;
// This is an interrupt/async endpoint. so need to set up ADDR_ENDP register with:
// - device address
// - endpoint number / direction
// - preamble
uint32_t reg = (uint32_t) (dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB));
if (dir == TUSB_DIR_OUT)
{
reg |= USB_ADDR_ENDP1_INTEP_DIR_BITS;
}
if (need_pre(dev_addr))
{
reg |= USB_ADDR_ENDP1_INTEP_PREAMBLE_BITS;
}
usb_hw->int_ep_addr_ctrl[ep->interrupt_num] = reg;
// Finally, enable interrupt that endpoint
usb_hw_set->int_ep_ctrl = 1 << (ep->interrupt_num + 1);
// If it's an interrupt endpoint we need to set up the buffer control
// register
} }
usb_hw->int_ep_addr_ctrl[ep->interrupt_num] = reg;
// Finally, enable interrupt that endpoint
usb_hw_set->int_ep_ctrl = 1 << (ep->interrupt_num + 1);
// If it's an interrupt endpoint we need to set up the buffer control
// register
}
} }
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
@ -434,16 +439,17 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport)
{ {
(void) rhport; (void) rhport;
assert(rhport == 0); assert(rhport == 0);
// TODO: Should enumval this register // TODO: Should enumval this register
switch (dev_speed()) switch ( dev_speed() )
{ {
case 1: case 1:
return TUSB_SPEED_LOW; return TUSB_SPEED_LOW;
case 2: case 2:
return TUSB_SPEED_FULL; return TUSB_SPEED_FULL;
default: default:
panic("Invalid speed\n"); panic("Invalid speed\n");
return TUSB_SPEED_INVALID; return TUSB_SPEED_INVALID;
} }
} }
@ -476,8 +482,8 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
uint32_t hcd_frame_number(uint8_t rhport) uint32_t hcd_frame_number(uint8_t rhport)
{ {
(void) rhport; (void) rhport;
return usb_hw->sof_rd; return usb_hw->sof_rd;
} }
void hcd_int_enable(uint8_t rhport) void hcd_int_enable(uint8_t rhport)
@ -501,117 +507,116 @@ void hcd_int_disable(uint8_t rhport)
bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
{ {
(void) rhport; (void) rhport;
pico_trace("hcd_edpt_open dev_addr %d, ep_addr %d\n", dev_addr, ep_desc->bEndpointAddress); pico_trace("hcd_edpt_open dev_addr %d, ep_addr %d\n", dev_addr, ep_desc->bEndpointAddress);
// Allocated differently based on if it's an interrupt endpoint or not // Allocated differently based on if it's an interrupt endpoint or not
struct hw_endpoint *ep = _hw_endpoint_allocate(ep_desc->bmAttributes.xfer); struct hw_endpoint *ep = _hw_endpoint_allocate(ep_desc->bmAttributes.xfer);
TU_ASSERT(ep); TU_ASSERT(ep);
_hw_endpoint_init(ep, _hw_endpoint_init(ep,
dev_addr, dev_addr,
ep_desc->bEndpointAddress, ep_desc->bEndpointAddress,
tu_edpt_packet_size(ep_desc), tu_edpt_packet_size(ep_desc),
ep_desc->bmAttributes.xfer, ep_desc->bmAttributes.xfer,
ep_desc->bInterval); ep_desc->bInterval);
return true; return true;
} }
bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
{ {
(void) rhport; (void) rhport;
pico_trace("hcd_edpt_xfer dev_addr %d, ep_addr 0x%x, len %d\n", dev_addr, ep_addr, buflen); pico_trace("hcd_edpt_xfer dev_addr %d, ep_addr 0x%x, len %d\n", dev_addr, ep_addr, buflen);
uint8_t const ep_num = tu_edpt_number(ep_addr);
tusb_dir_t const ep_dir = tu_edpt_dir(ep_addr);
// Get appropriate ep. Either EPX or interrupt endpoint uint8_t const ep_num = tu_edpt_number(ep_addr);
struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr); tusb_dir_t const ep_dir = tu_edpt_dir(ep_addr);
TU_ASSERT(ep); // Get appropriate ep. Either EPX or interrupt endpoint
struct hw_endpoint *ep = get_dev_ep(dev_addr, ep_addr);
// EP should be inactive TU_ASSERT(ep);
assert(!ep->active);
// Control endpoint can change direction 0x00 <-> 0x80 // EP should be inactive
if ( ep_addr != ep->ep_addr ) assert(!ep->active);
{
assert(ep_num == 0);
// Direction has flipped on endpoint control so re init it but with same properties // Control endpoint can change direction 0x00 <-> 0x80
_hw_endpoint_init(ep, dev_addr, ep_addr, ep->wMaxPacketSize, ep->transfer_type, 0); if ( ep_addr != ep->ep_addr )
} {
assert(ep_num == 0);
// If a normal transfer (non-interrupt) then initiate using // Direction has flipped on endpoint control so re init it but with same properties
// sie ctrl registers. Otherwise interrupt ep registers should _hw_endpoint_init(ep, dev_addr, ep_addr, ep->wMaxPacketSize, ep->transfer_type, 0);
// already be configured }
if (ep == &epx) {
hw_endpoint_xfer_start(ep, buffer, buflen);
// That has set up buffer control, endpoint control etc // If a normal transfer (non-interrupt) then initiate using
// for host we have to initiate the transfer // sie ctrl registers. Otherwise interrupt ep registers should
usb_hw->dev_addr_ctrl = (uint32_t) (dev_addr | (ep_num << USB_ADDR_ENDP_ENDPOINT_LSB)); // already be configured
if ( ep == &epx )
{
hw_endpoint_xfer_start(ep, buffer, buflen);
uint32_t flags = USB_SIE_CTRL_START_TRANS_BITS | SIE_CTRL_BASE | // That has set up buffer control, endpoint control etc
(ep_dir ? USB_SIE_CTRL_RECEIVE_DATA_BITS : USB_SIE_CTRL_SEND_DATA_BITS); // for host we have to initiate the transfer
// Set pre if we are a low speed device on full speed hub usb_hw->dev_addr_ctrl = (uint32_t) (dev_addr | (ep_num << USB_ADDR_ENDP_ENDPOINT_LSB));
flags |= need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0;
usb_hw->sie_ctrl = flags; uint32_t flags = USB_SIE_CTRL_START_TRANS_BITS | SIE_CTRL_BASE |
}else (ep_dir ? USB_SIE_CTRL_RECEIVE_DATA_BITS : USB_SIE_CTRL_SEND_DATA_BITS) |
{ (need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0);
hw_endpoint_xfer_start(ep, buffer, buflen); usb_hw->sie_ctrl = flags;
} }else
{
hw_endpoint_xfer_start(ep, buffer, buflen);
}
return true; return true;
} }
bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8])
{ {
(void) rhport; (void) rhport;
// Copy data into setup packet buffer // Copy data into setup packet buffer
for(uint8_t i=0; i<8; i++) for ( uint8_t i = 0; i < 8; i++ )
{ {
usbh_dpram->setup_packet[i] = setup_packet[i]; usbh_dpram->setup_packet[i] = setup_packet[i];
} }
// Configure EP0 struct with setup info for the trans complete // Configure EP0 struct with setup info for the trans complete
struct hw_endpoint *ep = _hw_endpoint_allocate(0); struct hw_endpoint * ep = _hw_endpoint_allocate(0);
TU_ASSERT(ep); TU_ASSERT(ep);
// EPX should be inactive // EPX should be inactive
assert(!ep->active); assert(!ep->active);
// EP0 out // EP0 out
_hw_endpoint_init(ep, dev_addr, 0x00, ep->wMaxPacketSize, 0, 0); _hw_endpoint_init(ep, dev_addr, 0x00, ep->wMaxPacketSize, 0, 0);
assert(ep->configured); assert(ep->configured);
ep->remaining_len = 8; ep->remaining_len = 8;
ep->active = true; ep->active = true;
// Set device address // Set device address
usb_hw->dev_addr_ctrl = dev_addr; usb_hw->dev_addr_ctrl = dev_addr;
// Set pre if we are a low speed device on full speed hub // Set pre if we are a low speed device on full speed hub
uint32_t const flags = SIE_CTRL_BASE | USB_SIE_CTRL_SEND_SETUP_BITS | USB_SIE_CTRL_START_TRANS_BITS | uint32_t const flags = SIE_CTRL_BASE | USB_SIE_CTRL_SEND_SETUP_BITS | USB_SIE_CTRL_START_TRANS_BITS |
(need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0); (need_pre(dev_addr) ? USB_SIE_CTRL_PREAMBLE_EN_BITS : 0);
usb_hw->sie_ctrl = flags; usb_hw->sie_ctrl = flags;
return true; return true;
} }
bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr)
{ {
(void) dev_addr; (void) dev_addr;
(void) ep_addr; (void) ep_addr;
panic("hcd_clear_stall"); panic("hcd_clear_stall");
return true; return true;
} }
#endif #endif

54
src/portable/raspberrypi/rp2040/rp2040_usb.c
View File

@ -47,6 +47,12 @@ TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_lock_update(__unused struc
static void _hw_endpoint_xfer_sync(struct hw_endpoint *ep); static void _hw_endpoint_xfer_sync(struct hw_endpoint *ep);
static void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep); static void _hw_endpoint_start_next_buffer(struct hw_endpoint *ep);
// if usb hardware is in host mode
TU_ATTR_ALWAYS_INLINE static inline bool is_host_mode(void)
{
return (usb_hw->main_ctrl & USB_MAIN_CTRL_HOST_NDEVICE_BITS) ? true : false;
}
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// //
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
@ -69,6 +75,8 @@ void rp2040_usb_init(void)
// Mux the controller to the onboard usb phy // Mux the controller to the onboard usb phy
usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS; usb_hw->muxing = USB_USB_MUXING_TO_PHY_BITS | USB_USB_MUXING_SOFTCON_BITS;
TU_LOG2_INT(sizeof(hw_endpoint_t));
} }
void __tusb_irq_path_func(hw_endpoint_reset_transfer)(struct hw_endpoint *ep) void __tusb_irq_path_func(hw_endpoint_reset_transfer)(struct hw_endpoint *ep)
@ -80,19 +88,23 @@ void __tusb_irq_path_func(hw_endpoint_reset_transfer)(struct hw_endpoint *ep)
} }
void __tusb_irq_path_func(_hw_endpoint_buffer_control_update32)(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) { void __tusb_irq_path_func(_hw_endpoint_buffer_control_update32)(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask) {
uint32_t value = 0; uint32_t value = 0;
if (and_mask) { if ( and_mask )
value = *ep->buffer_control & and_mask; {
} value = *ep->buffer_control & and_mask;
if (or_mask) { }
value |= or_mask; if ( or_mask )
if (or_mask & USB_BUF_CTRL_AVAIL) { {
if (*ep->buffer_control & USB_BUF_CTRL_AVAIL) { value |= or_mask;
panic("ep %d %s was already available", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]); if ( or_mask & USB_BUF_CTRL_AVAIL )
} {
*ep->buffer_control = value & ~USB_BUF_CTRL_AVAIL; if ( *ep->buffer_control & USB_BUF_CTRL_AVAIL )
// 12 cycle delay.. (should be good for 48*12Mhz = 576Mhz) {
// Don't need delay in host mode as host is in charge panic("ep %d %s was already available", tu_edpt_number(ep->ep_addr), ep_dir_string[tu_edpt_dir(ep->ep_addr)]);
}
*ep->buffer_control = value & ~USB_BUF_CTRL_AVAIL;
// 12 cycle delay.. (should be good for 48*12Mhz = 576Mhz)
// Don't need delay in host mode as host is in charge
#if !CFG_TUH_ENABLED #if !CFG_TUH_ENABLED
__asm volatile ( __asm volatile (
"b 1f\n" "b 1f\n"
@ -104,9 +116,9 @@ void __tusb_irq_path_func(_hw_endpoint_buffer_control_update32)(struct hw_endpoi
"1:\n" "1:\n"
: : : "memory"); : : : "memory");
#endif #endif
}
} }
*ep->buffer_control = value; }
*ep->buffer_control = value;
} }
// prepare buffer, return buffer control // prepare buffer, return buffer control
@ -152,12 +164,14 @@ static void __tusb_irq_path_func(_hw_endpoint_start_next_buffer)(struct hw_endpo
// always compute and start with buffer 0 // always compute and start with buffer 0
uint32_t buf_ctrl = prepare_ep_buffer(ep, 0) | USB_BUF_CTRL_SEL; uint32_t buf_ctrl = prepare_ep_buffer(ep, 0) | USB_BUF_CTRL_SEL;
// For now: skip double buffered for Device mode, OUT endpoint since // For now: skip double buffered for OUT endpoint in Device mode, since
// host could send < 64 bytes and cause short packet on buffer0 // host could send < 64 bytes and cause short packet on buffer0
// NOTE this could happen to Host mode IN endpoint // NOTE: this could happen to Host mode IN endpoint
// Also, Host mode interrupt endpoint hardware is only single buffered // Also, Host mode "interrupt" endpoint hardware is only single buffered,
bool const force_single = (!(usb_hw->main_ctrl & USB_MAIN_CTRL_HOST_NDEVICE_BITS) && !tu_edpt_dir(ep->ep_addr)) || // NOTE2: Currently Host bulk is implemented using "interrupt" endpoint
((usb_hw->main_ctrl & USB_MAIN_CTRL_HOST_NDEVICE_BITS) && tu_edpt_number(ep->ep_addr) != 0); bool const is_host = is_host_mode();
bool const force_single = (!is_host && !tu_edpt_dir(ep->ep_addr)) ||
(is_host && tu_edpt_number(ep->ep_addr) != 0);
if(ep->remaining_len && !force_single) if(ep->remaining_len && !force_single)
{ {

42
src/portable/raspberrypi/rp2040/rp2040_usb.h
View File

@ -82,26 +82,30 @@ void hw_endpoint_reset_transfer(struct hw_endpoint *ep);
void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask); void _hw_endpoint_buffer_control_update32(struct hw_endpoint *ep, uint32_t and_mask, uint32_t or_mask);
TU_ATTR_ALWAYS_INLINE static inline uint32_t _hw_endpoint_buffer_control_get_value32(struct hw_endpoint *ep) { TU_ATTR_ALWAYS_INLINE static inline uint32_t _hw_endpoint_buffer_control_get_value32 (struct hw_endpoint *ep)
return *ep->buffer_control;
}
TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_value32(struct hw_endpoint *ep, uint32_t value) {
return _hw_endpoint_buffer_control_update32(ep, 0, value);
}
TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_mask32(struct hw_endpoint *ep, uint32_t value) {
return _hw_endpoint_buffer_control_update32(ep, ~value, value);
}
TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_clear_mask32(struct hw_endpoint *ep, uint32_t value) {
return _hw_endpoint_buffer_control_update32(ep, ~value, 0);
}
static inline uintptr_t hw_data_offset(uint8_t *buf)
{ {
// Remove usb base from buffer pointer return *ep->buffer_control;
return (uintptr_t)buf ^ (uintptr_t)usb_dpram; }
TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_value32 (struct hw_endpoint *ep, uint32_t value)
{
return _hw_endpoint_buffer_control_update32(ep, 0, value);
}
TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_set_mask32 (struct hw_endpoint *ep, uint32_t value)
{
return _hw_endpoint_buffer_control_update32(ep, ~value, value);
}
TU_ATTR_ALWAYS_INLINE static inline void _hw_endpoint_buffer_control_clear_mask32 (struct hw_endpoint *ep, uint32_t value)
{
return _hw_endpoint_buffer_control_update32(ep, ~value, 0);
}
static inline uintptr_t hw_data_offset (uint8_t *buf)
{
// Remove usb base from buffer pointer
return (uintptr_t) buf ^ (uintptr_t) usb_dpram;
} }
extern const char *ep_dir_string[]; extern const char *ep_dir_string[];