adding samd21 metro m0 support
This commit is contained in:
hathach
parent
d036f62b0e
commit
18f8217f4f
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@ -1,6 +1,6 @@
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<!DOCTYPE CrossStudio_Project_File>
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<solution Name="device_composite" target="8" version="2">
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<project Name="Nordic nrf5x">
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<project Name="Nordic nRF5x">
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<configuration
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Name="Common"
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Placement="Flash"
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@ -99,7 +99,7 @@
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path="../src"
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recurse="Yes" />
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</project>
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<project Name="Microchip samd51">
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<project Name="Microchip SAMD51">
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<configuration
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Name="Common"
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Placement="Flash"
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@ -196,4 +196,101 @@
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path="../src"
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recurse="Yes" />
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</project>
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<project Name="Microchip SAMD21">
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<configuration
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Name="Common"
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Placement="Flash"
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Target="nRF52840_xxAA"
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arm_architecture="v7EM"
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arm_core_type="Cortex-M4"
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arm_endian="Little"
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arm_fp_abi="Hard"
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arm_fpu_type="FPv4-SP-D16"
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arm_interwork="No"
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arm_linker_heap_size="1024"
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arm_linker_process_stack_size="0"
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arm_linker_stack_size="1024"
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arm_simulator_memory_simulation_parameter="RX 00000000,00080000,FFFFFFFF;RWX 20000000,00030000,CDCDCDCD"
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arm_target_debug_interface_type="ADIv5"
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arm_target_device_name="ATSAMD51J19"
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arm_target_interface_type="SWD"
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build_treat_warnings_as_errors="Yes"
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c_preprocessor_definitions="__SAMD21G18A__;__SAMD21_FAMILY;__SAM_D21_SUBFAMILY;ARM_MATH_CM0PLUS;FLASH_PLACEMENT=1;USE_SIMPLE_ASSERT;CIRCUITPY_GCLK_INIT_1ST=0xffff;BOARD_METRO_M0_EXPRESS;CFG_TUSB_MCU=OPT_MCU_SAMD21"
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c_user_include_directories="../src;$(rootDir)/hw/cmsis/Include;$(rootDir)/hw;$(rootDir)/src;$(asf4Dir);$(asf4Dir)/include;$(asf4Dir)/config;$(asf4Dir)/hri;$(asf4Dir)/hal/include;$(asf4Dir)/hal/utils/include;$(asf4Dir)/hpl/port;$(asf4Dir)/hpl/gclk"
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debug_register_definition_file="ses_samd21/ATSAMD21G18A_Registers.xml"
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debug_target_connection="J-Link"
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gcc_entry_point="Reset_Handler"
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link_use_linker_script_file="No"
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linker_memory_map_file="$(ProjectDir)/ses_samd21/ATSAMD21G18A_MemoryMap.xml"
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linker_section_placement_file="ses_samd21/flash_placement.xml"
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linker_section_placements_segments="FLASH RX 0x00000000 0x00080000;RAM RWX 0x20000000 0x00030000"
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macros="DeviceFamily=SAMD21;Target=ATSAMD21G18A;Placement=Flash;rootDir=../../../..;asf4Dir=../../../../hw/mcu/microchip/samd/asf4/samd21"
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project_directory=""
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project_type="Executable"
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target_reset_script="Reset();"
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target_script_file="$(ProjectDir)/ses_samd51/SAMD51_Target.js"
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target_trace_initialize_script="EnableTrace("$(TraceInterfaceType)")" />
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<folder
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Name="tinyusb"
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exclude=""
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filter="*.c;*.h"
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path="../../../../src"
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recurse="Yes" />
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<folder Name="hw">
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<folder Name="bsp">
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<file file_name="../../../../hw/bsp/ansi_escape.h" />
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<file file_name="../../../../hw/bsp/board.h" />
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<folder Name="metro_m0_express">
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<file file_name="../../../../hw/bsp/metro_m0_express/board_metro_m0_express.c" />
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<file file_name="../../../../hw/bsp/metro_m0_express/board_metro_m0_express.h" />
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</folder>
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</folder>
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<folder Name="mcu">
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<folder Name="microchip">
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<folder Name="samd">
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<folder Name="asf4">
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<folder Name="samd51">
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<folder Name="gcc">
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<file file_name="../../../../hw/mcu/microchip/samd/asf4/samd51/gcc/system_samd51.c" />
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</folder>
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<folder Name="hpl">
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<folder Name="core">
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<file file_name="../../../../../../../adafruit/circuitpython/thach_cp/ports/atmel-samd/asf4/samd51/hpl/core/hpl_init.c" />
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</folder>
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<folder Name="osc32kctrl">
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<file file_name="../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/osc32kctrl/hpl_osc32kctrl.c" />
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</folder>
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<folder Name="oscctrl">
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<file file_name="../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/oscctrl/hpl_oscctrl.c" />
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</folder>
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<folder Name="mclk">
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<file file_name="../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/mclk/hpl_mclk.c" />
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</folder>
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<folder Name="gclk">
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<file file_name="../../../../hw/mcu/microchip/samd/asf4/samd51/hpl/gclk/hpl_gclk.c" />
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</folder>
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</folder>
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</folder>
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</folder>
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</folder>
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</folder>
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</folder>
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</folder>
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<configuration Name="Debug" build_treat_warnings_as_errors="Yes" />
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<folder
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Name="src"
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exclude=""
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filter="*.c;*.h"
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path="../src"
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recurse="Yes" />
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<folder Name="samd21">
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<file file_name="ses_samd21/ATSAMD21G18A_MemoryMap.xml" />
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<file file_name="ses_samd21/ATSAMD21G18A_Registers.xml" />
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<file file_name="ses_samd21/ATSAMD21G18A_Vectors.s" />
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<file file_name="ses_samd21/flash_placement.xml" />
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<file file_name="ses_samd21/SAMD21_Startup.s" />
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<file file_name="ses_samd21/SAMD21_Target.js" />
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<file file_name="ses_samd21/thumb_crt0.s" />
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</folder>
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</project>
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</solution>
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@ -0,0 +1,5 @@
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<!DOCTYPE Board_Memory_Definition_File>
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<root name="ATSAMD21G18A">
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<MemorySegment name="FLASH" start="0x00000000" size="0x00040000" access="ReadOnly" />
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<MemorySegment name="RAM" start="0x20000000" size="0x00008000" access="Read/Write" />
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</root>
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,331 @@
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/*****************************************************************************
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* SEGGER Microcontroller GmbH & Co. KG *
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* Solutions for real time microcontroller applications *
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*****************************************************************************
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* *
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* (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
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* *
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* Internet: www.segger.com Support: support@segger.com *
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* *
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*****************************************************************************/
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/*****************************************************************************
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* Preprocessor Definitions *
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* ------------------------ *
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* VECTORS_IN_RAM *
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* *
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* If defined, an area of RAM will large enough to store the vector table *
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* will be reserved. *
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* *
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*****************************************************************************/
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.syntax unified
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.code 16
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.section .init, "ax"
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.align 0
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/*****************************************************************************
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* Default Exception Handlers *
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*****************************************************************************/
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.thumb_func
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.weak NMI_Handler
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NMI_Handler:
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b .
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.thumb_func
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.weak HardFault_Handler
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HardFault_Handler:
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b .
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.thumb_func
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.weak SVC_Handler
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SVC_Handler:
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b .
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.thumb_func
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.weak PendSV_Handler
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PendSV_Handler:
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b .
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.thumb_func
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.weak SysTick_Handler
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SysTick_Handler:
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b .
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.thumb_func
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Dummy_Handler:
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b .
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#if defined(__OPTIMIZATION_SMALL)
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.weak PM_IRQHandler
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.thumb_set PM_IRQHandler,Dummy_Handler
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.weak SYSCTRL_IRQHandler
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.thumb_set SYSCTRL_IRQHandler,Dummy_Handler
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.weak WDT_IRQHandler
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.thumb_set WDT_IRQHandler,Dummy_Handler
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.weak RTC_IRQHandler
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.thumb_set RTC_IRQHandler,Dummy_Handler
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.weak EIC_IRQHandler
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.thumb_set EIC_IRQHandler,Dummy_Handler
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.weak NVMCTRL_IRQHandler
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.thumb_set NVMCTRL_IRQHandler,Dummy_Handler
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.weak DMAC_IRQHandler
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.thumb_set DMAC_IRQHandler,Dummy_Handler
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.weak USB_IRQHandler
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.thumb_set USB_IRQHandler,Dummy_Handler
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.weak EVSYS_IRQHandler
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.thumb_set EVSYS_IRQHandler,Dummy_Handler
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.weak SERCOM0_IRQHandler
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.thumb_set SERCOM0_IRQHandler,Dummy_Handler
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.weak SERCOM1_IRQHandler
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.thumb_set SERCOM1_IRQHandler,Dummy_Handler
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.weak SERCOM2_IRQHandler
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.thumb_set SERCOM2_IRQHandler,Dummy_Handler
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.weak SERCOM3_IRQHandler
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.thumb_set SERCOM3_IRQHandler,Dummy_Handler
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.weak SERCOM4_IRQHandler
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.thumb_set SERCOM4_IRQHandler,Dummy_Handler
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.weak SERCOM5_IRQHandler
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.thumb_set SERCOM5_IRQHandler,Dummy_Handler
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.weak TCC0_IRQHandler
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.thumb_set TCC0_IRQHandler,Dummy_Handler
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.weak TCC1_IRQHandler
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.thumb_set TCC1_IRQHandler,Dummy_Handler
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.weak TCC2_IRQHandler
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.thumb_set TCC2_IRQHandler,Dummy_Handler
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.weak TC3_IRQHandler
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.thumb_set TC3_IRQHandler,Dummy_Handler
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.weak TC4_IRQHandler
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.thumb_set TC4_IRQHandler,Dummy_Handler
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.weak TC5_IRQHandler
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.thumb_set TC5_IRQHandler,Dummy_Handler
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.weak ADC_IRQHandler
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.thumb_set ADC_IRQHandler,Dummy_Handler
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.weak AC_IRQHandler
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.thumb_set AC_IRQHandler,Dummy_Handler
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.weak DAC_IRQHandler
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.thumb_set DAC_IRQHandler,Dummy_Handler
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.weak I2S_IRQHandler
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.thumb_set I2S_IRQHandler,Dummy_Handler
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#else
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.thumb_func
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.weak PM_IRQHandler
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PM_IRQHandler:
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b .
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.thumb_func
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.weak SYSCTRL_IRQHandler
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SYSCTRL_IRQHandler:
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b .
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.thumb_func
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.weak WDT_IRQHandler
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WDT_IRQHandler:
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b .
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.thumb_func
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.weak RTC_IRQHandler
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RTC_IRQHandler:
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b .
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.thumb_func
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.weak EIC_IRQHandler
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EIC_IRQHandler:
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b .
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.thumb_func
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.weak NVMCTRL_IRQHandler
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NVMCTRL_IRQHandler:
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b .
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.thumb_func
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.weak DMAC_IRQHandler
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DMAC_IRQHandler:
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b .
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.thumb_func
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.weak USB_IRQHandler
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USB_IRQHandler:
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b .
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.thumb_func
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.weak EVSYS_IRQHandler
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EVSYS_IRQHandler:
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b .
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.thumb_func
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.weak SERCOM0_IRQHandler
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SERCOM0_IRQHandler:
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b .
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.thumb_func
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.weak SERCOM1_IRQHandler
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SERCOM1_IRQHandler:
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b .
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.thumb_func
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.weak SERCOM2_IRQHandler
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SERCOM2_IRQHandler:
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b .
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.thumb_func
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.weak SERCOM3_IRQHandler
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SERCOM3_IRQHandler:
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b .
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.thumb_func
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.weak SERCOM4_IRQHandler
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SERCOM4_IRQHandler:
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b .
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.thumb_func
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.weak SERCOM5_IRQHandler
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SERCOM5_IRQHandler:
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b .
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.thumb_func
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.weak TCC0_IRQHandler
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TCC0_IRQHandler:
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b .
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.thumb_func
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.weak TCC1_IRQHandler
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TCC1_IRQHandler:
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b .
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.thumb_func
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.weak TCC2_IRQHandler
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TCC2_IRQHandler:
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b .
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.thumb_func
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.weak TC3_IRQHandler
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TC3_IRQHandler:
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b .
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.thumb_func
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.weak TC4_IRQHandler
|
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TC4_IRQHandler:
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b .
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.thumb_func
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.weak TC5_IRQHandler
|
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TC5_IRQHandler:
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b .
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|
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.thumb_func
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.weak ADC_IRQHandler
|
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ADC_IRQHandler:
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b .
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.thumb_func
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.weak AC_IRQHandler
|
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AC_IRQHandler:
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b .
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|
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.thumb_func
|
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.weak DAC_IRQHandler
|
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DAC_IRQHandler:
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b .
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|
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.thumb_func
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.weak I2S_IRQHandler
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I2S_IRQHandler:
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b .
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#endif
|
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|
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/*****************************************************************************
|
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* Vector Table *
|
||||
*****************************************************************************/
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|
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.section .vectors, "ax"
|
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.align 0
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.global _vectors
|
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.extern __stack_end__
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||||
.extern Reset_Handler
|
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|
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_vectors:
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.word __stack_end__
|
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.word Reset_Handler
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.word NMI_Handler
|
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.word HardFault_Handler
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word SVC_Handler
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word PM_IRQHandler
|
||||
.word SYSCTRL_IRQHandler
|
||||
.word WDT_IRQHandler
|
||||
.word RTC_IRQHandler
|
||||
.word EIC_IRQHandler
|
||||
.word NVMCTRL_IRQHandler
|
||||
.word DMAC_IRQHandler
|
||||
.word USB_IRQHandler
|
||||
.word EVSYS_IRQHandler
|
||||
.word SERCOM0_IRQHandler
|
||||
.word SERCOM1_IRQHandler
|
||||
.word SERCOM2_IRQHandler
|
||||
.word SERCOM3_IRQHandler
|
||||
.word SERCOM4_IRQHandler
|
||||
.word SERCOM5_IRQHandler
|
||||
.word TCC0_IRQHandler
|
||||
.word TCC1_IRQHandler
|
||||
.word TCC2_IRQHandler
|
||||
.word TC3_IRQHandler
|
||||
.word TC4_IRQHandler
|
||||
.word TC5_IRQHandler
|
||||
.word Dummy_Handler /* Reserved */
|
||||
.word Dummy_Handler /* Reserved */
|
||||
.word ADC_IRQHandler
|
||||
.word AC_IRQHandler
|
||||
.word DAC_IRQHandler
|
||||
.word Dummy_Handler /* Reserved */
|
||||
.word I2S_IRQHandler
|
||||
_vectors_end:
|
||||
|
||||
#ifdef VECTORS_IN_RAM
|
||||
.section .vectors_ram, "ax"
|
||||
.align 0
|
||||
.global _vectors_ram
|
||||
|
||||
_vectors_ram:
|
||||
.space _vectors_end - _vectors, 0
|
||||
#endif
|
||||
|
|
@ -0,0 +1,114 @@
|
|||
/*****************************************************************************
|
||||
* SEGGER Microcontroller GmbH & Co. KG *
|
||||
* Solutions for real time microcontroller applications *
|
||||
*****************************************************************************
|
||||
* *
|
||||
* (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
|
||||
* *
|
||||
* Internet: www.segger.com Support: support@segger.com *
|
||||
* *
|
||||
*****************************************************************************/
|
||||
|
||||
/*****************************************************************************
|
||||
* Preprocessor Definitions *
|
||||
* ------------------------ *
|
||||
* NO_STACK_INIT *
|
||||
* *
|
||||
* If defined, the stack pointer will not be initialised. *
|
||||
* *
|
||||
* NO_SYSTEM_INIT *
|
||||
* *
|
||||
* If defined, the SystemInit() function will not be called. By default *
|
||||
* SystemInit() is called after reset to enable the clocks and memories to *
|
||||
* be initialised prior to any C startup initialisation. *
|
||||
* *
|
||||
* NO_VTOR_CONFIG *
|
||||
* *
|
||||
* If defined, the vector table offset register will not be configured. *
|
||||
* *
|
||||
* MEMORY_INIT *
|
||||
* *
|
||||
* If defined, the MemoryInit() function will be called. By default *
|
||||
* MemoryInit() is called after SystemInit() to enable an external memory *
|
||||
* controller. *
|
||||
* *
|
||||
* STACK_INIT_VAL *
|
||||
* *
|
||||
* If defined, specifies the initial stack pointer value. If undefined, *
|
||||
* the stack pointer will be initialised to point to the end of the *
|
||||
* RAM segment. *
|
||||
* *
|
||||
* VECTORS_IN_RAM *
|
||||
* *
|
||||
* If defined, the exception vectors will be copied from Flash to RAM. *
|
||||
* *
|
||||
*****************************************************************************/
|
||||
|
||||
.syntax unified
|
||||
|
||||
.global Reset_Handler
|
||||
.extern _vectors
|
||||
|
||||
.section .init, "ax"
|
||||
.thumb_func
|
||||
|
||||
.equ VTOR_REG, 0xE000ED08
|
||||
|
||||
#ifndef STACK_INIT_VAL
|
||||
#define STACK_INIT_VAL __RAM_segment_end__
|
||||
#endif
|
||||
|
||||
Reset_Handler:
|
||||
#ifndef NO_STACK_INIT
|
||||
/* Initialise main stack */
|
||||
ldr r0, =STACK_INIT_VAL
|
||||
ldr r1, =0x7
|
||||
bics r0, r1
|
||||
mov sp, r0
|
||||
#endif
|
||||
|
||||
#ifndef NO_SYSTEM_INIT
|
||||
/* Initialise system */
|
||||
ldr r0, =SystemInit
|
||||
blx r0
|
||||
.pushsection .init_array, "aw", %init_array
|
||||
.word SystemCoreClockUpdate
|
||||
.popsection
|
||||
#endif
|
||||
|
||||
#ifdef MEMORY_INIT
|
||||
ldr r0, =MemoryInit
|
||||
blx r0
|
||||
#endif
|
||||
|
||||
#ifdef VECTORS_IN_RAM
|
||||
/* Copy exception vectors into RAM */
|
||||
ldr r0, =__vectors_start__
|
||||
ldr r1, =__vectors_end__
|
||||
ldr r2, =__vectors_ram_start__
|
||||
1:
|
||||
cmp r0, r1
|
||||
beq 2f
|
||||
ldr r3, [r0]
|
||||
str r3, [r2]
|
||||
adds r0, r0, #4
|
||||
adds r2, r2, #4
|
||||
b 1b
|
||||
2:
|
||||
#endif
|
||||
|
||||
#ifndef NO_VTOR_CONFIG
|
||||
/* Configure vector table offset register */
|
||||
ldr r0, =VTOR_REG
|
||||
#ifdef VECTORS_IN_RAM
|
||||
ldr r1, =_vectors_ram
|
||||
#else
|
||||
ldr r1, =_vectors
|
||||
#endif
|
||||
str r1, [r0]
|
||||
#endif
|
||||
|
||||
/* Jump to program start */
|
||||
b _start
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
/*****************************************************************************
|
||||
* SEGGER Microcontroller GmbH & Co. KG *
|
||||
* Solutions for real time microcontroller applications *
|
||||
*****************************************************************************
|
||||
* *
|
||||
* (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
|
||||
* *
|
||||
* Internet: www.segger.com Support: support@segger.com *
|
||||
* *
|
||||
*****************************************************************************/
|
||||
|
||||
function Reset() {
|
||||
TargetInterface.resetAndStop();
|
||||
}
|
||||
|
||||
function EnableTrace(traceInterfaceType) {
|
||||
// TODO: Enable trace
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,37 @@
|
|||
<!DOCTYPE Linker_Placement_File>
|
||||
<Root name="Flash Section Placement">
|
||||
<MemorySegment name="$(FLASH_NAME:FLASH)">
|
||||
<ProgramSection alignment="0x100" load="Yes" name=".vectors" start="$(FLASH_START:)" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".init" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".init_rodata" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".text" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".dtors" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".ctors" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".rodata" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".ARM.exidx" address_symbol="__exidx_start" end_symbol="__exidx_end" />
|
||||
<ProgramSection alignment="4" load="Yes" runin=".fast_run" name=".fast" />
|
||||
<ProgramSection alignment="4" load="Yes" runin=".data_run" name=".data" />
|
||||
<ProgramSection alignment="4" load="Yes" runin=".tdata_run" name=".tdata" />
|
||||
</MemorySegment>
|
||||
<MemorySegment name="$(RAM_NAME:RAM);SRAM">
|
||||
<ProgramSection alignment="0x100" load="No" name=".vectors_ram" start="$(RAM_START:$(SRAM_START:))" />
|
||||
<ProgramSection alignment="4" load="No" name=".fast_run" />
|
||||
<ProgramSection alignment="4" load="No" name=".data_run" />
|
||||
<ProgramSection alignment="4" load="No" name=".bss" />
|
||||
<ProgramSection alignment="4" load="No" name=".tbss" />
|
||||
<ProgramSection alignment="4" load="No" name=".tdata_run" />
|
||||
<ProgramSection alignment="4" load="No" name=".non_init" />
|
||||
<ProgramSection alignment="4" size="__HEAPSIZE__" load="No" name=".heap" />
|
||||
<ProgramSection alignment="8" size="__STACKSIZE__" load="No" place_from_segment_end="Yes" name=".stack" />
|
||||
<ProgramSection alignment="8" size="__STACKSIZE_PROCESS__" load="No" name=".stack_process" />
|
||||
</MemorySegment>
|
||||
<MemorySegment name="$(FLASH2_NAME:FLASH2)">
|
||||
<ProgramSection alignment="4" load="Yes" name=".text2" />
|
||||
<ProgramSection alignment="4" load="Yes" name=".rodata2" />
|
||||
<ProgramSection alignment="4" load="Yes" runin=".data2_run" name=".data2" />
|
||||
</MemorySegment>
|
||||
<MemorySegment name="$(RAM2_NAME:RAM2)">
|
||||
<ProgramSection alignment="4" load="No" name=".data2_run" />
|
||||
<ProgramSection alignment="4" load="No" name=".bss2" />
|
||||
</MemorySegment>
|
||||
</Root>
|
||||
|
|
@ -0,0 +1,415 @@
|
|||
// **********************************************************************
|
||||
// * SEGGER Microcontroller GmbH *
|
||||
// * The Embedded Experts *
|
||||
// **********************************************************************
|
||||
// * *
|
||||
// * (c) 2014 - 2018 SEGGER Microcontroller GmbH *
|
||||
// * (c) 2001 - 2018 Rowley Associates Limited *
|
||||
// * *
|
||||
// * www.segger.com Support: support@segger.com *
|
||||
// * *
|
||||
// **********************************************************************
|
||||
// * *
|
||||
// * All rights reserved. *
|
||||
// * *
|
||||
// * Redistribution and use in source and binary forms, with or *
|
||||
// * without modification, are permitted provided that the following *
|
||||
// * conditions are met: *
|
||||
// * *
|
||||
// * - Redistributions of source code must retain the above copyright *
|
||||
// * notice, this list of conditions and the following disclaimer. *
|
||||
// * *
|
||||
// * - Neither the name of SEGGER Microcontroller GmbH *
|
||||
// * nor the names of its contributors may be used to endorse or *
|
||||
// * promote products derived from this software without specific *
|
||||
// * prior written permission. *
|
||||
// * *
|
||||
// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
|
||||
// * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
|
||||
// * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
|
||||
// * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
|
||||
// * DISCLAIMED. *
|
||||
// * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
|
||||
// * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
|
||||
// * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
|
||||
// * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
|
||||
// * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
|
||||
// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
|
||||
// * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
|
||||
// * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
|
||||
// * DAMAGE. *
|
||||
// * *
|
||||
// **********************************************************************
|
||||
//
|
||||
//
|
||||
// Preprocessor Definitions
|
||||
// ------------------------
|
||||
// APP_ENTRY_POINT
|
||||
//
|
||||
// Defines the application entry point function, if undefined this setting
|
||||
// defaults to "main".
|
||||
//
|
||||
// INITIALIZE_STACK
|
||||
//
|
||||
// If defined, the contents of the stack will be initialized to a the
|
||||
// value 0xCC.
|
||||
//
|
||||
// INITIALIZE_SECONDARY_SECTIONS
|
||||
//
|
||||
// If defined, the .data2, .text2, .rodata2 and .bss2 sections will be initialized.
|
||||
//
|
||||
// INITIALIZE_TCM_SECTIONS
|
||||
//
|
||||
// If defined, the .data_tcm, .text_tcm, .rodata_tcm and .bss_tcm sections
|
||||
// will be initialized.
|
||||
//
|
||||
// INITIALIZE_USER_SECTIONS
|
||||
//
|
||||
// If defined, the function InitializeUserMemorySections will be called prior
|
||||
// to entering main in order to allow the user to initialize any user defined
|
||||
// memory sections.
|
||||
//
|
||||
// FULL_LIBRARY
|
||||
//
|
||||
// If defined then
|
||||
// - argc, argv are setup by the debug_getargs.
|
||||
// - the exit symbol is defined and executes on return from main.
|
||||
// - the exit symbol calls destructors, atexit functions and then debug_exit.
|
||||
//
|
||||
// If not defined then
|
||||
// - argc and argv are zero.
|
||||
// - the exit symbol is defined, executes on return from main and loops
|
||||
//
|
||||
|
||||
#ifndef APP_ENTRY_POINT
|
||||
#define APP_ENTRY_POINT main
|
||||
#endif
|
||||
|
||||
#ifndef ARGSSPACE
|
||||
#define ARGSSPACE 128
|
||||
#endif
|
||||
.syntax unified
|
||||
|
||||
.global _start
|
||||
.extern APP_ENTRY_POINT
|
||||
.global exit
|
||||
.weak exit
|
||||
|
||||
#ifdef INITIALIZE_USER_SECTIONS
|
||||
.extern InitializeUserMemorySections
|
||||
#endif
|
||||
|
||||
.section .init, "ax"
|
||||
.code 16
|
||||
.balign 2
|
||||
.thumb_func
|
||||
|
||||
_start:
|
||||
/* Set up main stack if size > 0 */
|
||||
ldr r1, =__stack_end__
|
||||
ldr r0, =__stack_start__
|
||||
subs r2, r1, r0
|
||||
beq 1f
|
||||
#ifdef __ARM_EABI__
|
||||
movs r2, #0x7
|
||||
bics r1, r2
|
||||
#endif
|
||||
mov sp, r1
|
||||
#ifdef INITIALIZE_STACK
|
||||
movs r2, #0xCC
|
||||
ldr r0, =__stack_start__
|
||||
bl memory_set
|
||||
#endif
|
||||
1:
|
||||
|
||||
/* Set up process stack if size > 0 */
|
||||
ldr r1, =__stack_process_end__
|
||||
ldr r0, =__stack_process_start__
|
||||
subs r2, r1, r0
|
||||
beq 1f
|
||||
#ifdef __ARM_EABI__
|
||||
movs r2, #0x7
|
||||
bics r1, r2
|
||||
#endif
|
||||
msr psp, r1
|
||||
movs r2, #2
|
||||
msr control, r2
|
||||
#ifdef INITIALIZE_STACK
|
||||
movs r2, #0xCC
|
||||
bl memory_set
|
||||
#endif
|
||||
1:
|
||||
|
||||
/* Copy initialized memory sections into RAM (if necessary). */
|
||||
ldr r0, =__data_load_start__
|
||||
ldr r1, =__data_start__
|
||||
ldr r2, =__data_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__text_load_start__
|
||||
ldr r1, =__text_start__
|
||||
ldr r2, =__text_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__fast_load_start__
|
||||
ldr r1, =__fast_start__
|
||||
ldr r2, =__fast_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__ctors_load_start__
|
||||
ldr r1, =__ctors_start__
|
||||
ldr r2, =__ctors_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__dtors_load_start__
|
||||
ldr r1, =__dtors_start__
|
||||
ldr r2, =__dtors_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__rodata_load_start__
|
||||
ldr r1, =__rodata_start__
|
||||
ldr r2, =__rodata_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__tdata_load_start__
|
||||
ldr r1, =__tdata_start__
|
||||
ldr r2, =__tdata_end__
|
||||
bl memory_copy
|
||||
#ifdef INITIALIZE_SECONDARY_SECTIONS
|
||||
ldr r0, =__data2_load_start__
|
||||
ldr r1, =__data2_start__
|
||||
ldr r2, =__data2_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__text2_load_start__
|
||||
ldr r1, =__text2_start__
|
||||
ldr r2, =__text2_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__rodata2_load_start__
|
||||
ldr r1, =__rodata2_start__
|
||||
ldr r2, =__rodata2_end__
|
||||
bl memory_copy
|
||||
#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
|
||||
#ifdef INITIALIZE_TCM_SECTIONS
|
||||
ldr r0, =__data_tcm_load_start__
|
||||
ldr r1, =__data_tcm_start__
|
||||
ldr r2, =__data_tcm_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__text_tcm_load_start__
|
||||
ldr r1, =__text_tcm_start__
|
||||
ldr r2, =__text_tcm_end__
|
||||
bl memory_copy
|
||||
ldr r0, =__rodata_tcm_load_start__
|
||||
ldr r1, =__rodata_tcm_start__
|
||||
ldr r2, =__rodata_tcm_end__
|
||||
bl memory_copy
|
||||
#endif /* #ifdef INITIALIZE_TCM_SECTIONS */
|
||||
|
||||
/* Zero the bss. */
|
||||
ldr r0, =__bss_start__
|
||||
ldr r1, =__bss_end__
|
||||
movs r2, #0
|
||||
bl memory_set
|
||||
ldr r0, =__tbss_start__
|
||||
ldr r1, =__tbss_end__
|
||||
movs r2, #0
|
||||
bl memory_set
|
||||
#ifdef INITIALIZE_SECONDARY_SECTIONS
|
||||
ldr r0, =__bss2_start__
|
||||
ldr r1, =__bss2_end__
|
||||
mov r2, #0
|
||||
bl memory_set
|
||||
#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
|
||||
#ifdef INITIALIZE_TCM_SECTIONS
|
||||
ldr r0, =__bss_tcm_start__
|
||||
ldr r1, =__bss_tcm_end__
|
||||
mov r2, #0
|
||||
bl memory_set
|
||||
#endif /* #ifdef INITIALIZE_TCM_SECTIONS */
|
||||
|
||||
/* Initialize the heap */
|
||||
ldr r0, = __heap_start__
|
||||
ldr r1, = __heap_end__
|
||||
subs r1, r1, r0
|
||||
cmp r1, #8
|
||||
blt 1f
|
||||
movs r2, #0
|
||||
str r2, [r0]
|
||||
adds r0, r0, #4
|
||||
str r1, [r0]
|
||||
1:
|
||||
|
||||
#ifdef INITIALIZE_USER_SECTIONS
|
||||
ldr r2, =InitializeUserMemorySections
|
||||
blx r2
|
||||
#endif
|
||||
|
||||
/* Call constructors */
|
||||
ldr r0, =__ctors_start__
|
||||
ldr r1, =__ctors_end__
|
||||
ctor_loop:
|
||||
cmp r0, r1
|
||||
beq ctor_end
|
||||
ldr r2, [r0]
|
||||
adds r0, #4
|
||||
push {r0-r1}
|
||||
blx r2
|
||||
pop {r0-r1}
|
||||
b ctor_loop
|
||||
ctor_end:
|
||||
|
||||
/* Setup initial call frame */
|
||||
movs r0, #0
|
||||
mov lr, r0
|
||||
mov r12, sp
|
||||
|
||||
.type start, function
|
||||
start:
|
||||
/* Jump to application entry point */
|
||||
#ifdef FULL_LIBRARY
|
||||
movs r0, #ARGSSPACE
|
||||
ldr r1, =args
|
||||
ldr r2, =debug_getargs
|
||||
blx r2
|
||||
ldr r1, =args
|
||||
#else
|
||||
movs r0, #0
|
||||
movs r1, #0
|
||||
#endif
|
||||
ldr r2, =APP_ENTRY_POINT
|
||||
blx r2
|
||||
|
||||
.thumb_func
|
||||
exit:
|
||||
#ifdef FULL_LIBRARY
|
||||
mov r5, r0 // save the exit parameter/return result
|
||||
|
||||
/* Call destructors */
|
||||
ldr r0, =__dtors_start__
|
||||
ldr r1, =__dtors_end__
|
||||
dtor_loop:
|
||||
cmp r0, r1
|
||||
beq dtor_end
|
||||
ldr r2, [r0]
|
||||
add r0, #4
|
||||
push {r0-r1}
|
||||
blx r2
|
||||
pop {r0-r1}
|
||||
b dtor_loop
|
||||
dtor_end:
|
||||
|
||||
/* Call atexit functions */
|
||||
ldr r2, =_execute_at_exit_fns
|
||||
blx r2
|
||||
|
||||
/* Call debug_exit with return result/exit parameter */
|
||||
mov r0, r5
|
||||
ldr r2, =debug_exit
|
||||
blx r2
|
||||
#endif
|
||||
|
||||
/* Returned from application entry point, loop forever. */
|
||||
exit_loop:
|
||||
b exit_loop
|
||||
|
||||
.thumb_func
|
||||
memory_copy:
|
||||
cmp r0, r1
|
||||
beq 2f
|
||||
subs r2, r2, r1
|
||||
beq 2f
|
||||
1:
|
||||
ldrb r3, [r0]
|
||||
adds r0, r0, #1
|
||||
strb r3, [r1]
|
||||
adds r1, r1, #1
|
||||
subs r2, r2, #1
|
||||
bne 1b
|
||||
2:
|
||||
bx lr
|
||||
|
||||
.thumb_func
|
||||
memory_set:
|
||||
cmp r0, r1
|
||||
beq 1f
|
||||
strb r2, [r0]
|
||||
adds r0, r0, #1
|
||||
b memory_set
|
||||
1:
|
||||
bx lr
|
||||
|
||||
// default C/C++ library helpers
|
||||
|
||||
.macro HELPER helper_name
|
||||
.section .text.\helper_name, "ax", %progbits
|
||||
.balign 2
|
||||
.global \helper_name
|
||||
.weak \helper_name
|
||||
\helper_name:
|
||||
.thumb_func
|
||||
.endm
|
||||
|
||||
.macro JUMPTO name
|
||||
#if defined(__thumb__) && !defined(__thumb2__)
|
||||
mov r12, r0
|
||||
ldr r0, =\name
|
||||
push {r0}
|
||||
mov r0, r12
|
||||
pop {pc}
|
||||
#else
|
||||
b \name
|
||||
#endif
|
||||
.endm
|
||||
|
||||
HELPER __aeabi_read_tp
|
||||
ldr r0, =__tbss_start__-8
|
||||
bx lr
|
||||
HELPER abort
|
||||
b .
|
||||
HELPER __assert
|
||||
b .
|
||||
HELPER __aeabi_assert
|
||||
b .
|
||||
HELPER __sync_synchronize
|
||||
bx lr
|
||||
HELPER __getchar
|
||||
JUMPTO debug_getchar
|
||||
HELPER __putchar
|
||||
JUMPTO debug_putchar
|
||||
HELPER __open
|
||||
JUMPTO debug_fopen
|
||||
HELPER __close
|
||||
JUMPTO debug_fclose
|
||||
HELPER __write
|
||||
mov r3, r0
|
||||
mov r0, r1
|
||||
movs r1, #1
|
||||
JUMPTO debug_fwrite
|
||||
HELPER __read
|
||||
mov r3, r0
|
||||
mov r0, r1
|
||||
movs r1, #1
|
||||
JUMPTO debug_fread
|
||||
HELPER __seek
|
||||
push {r4, lr}
|
||||
mov r4, r0
|
||||
bl debug_fseek
|
||||
cmp r0, #0
|
||||
bne 1f
|
||||
mov r0, r4
|
||||
bl debug_ftell
|
||||
pop {r4, pc}
|
||||
1:
|
||||
ldr r0, =-1
|
||||
pop {r4, pc}
|
||||
// char __user_locale_name_buffer[];
|
||||
.section .bss.__user_locale_name_buffer, "aw", %nobits
|
||||
.global __user_locale_name_buffer
|
||||
.weak __user_locale_name_buffer
|
||||
__user_locale_name_buffer:
|
||||
.word 0x0
|
||||
|
||||
#ifdef FULL_LIBRARY
|
||||
.bss
|
||||
args:
|
||||
.space ARGSSPACE
|
||||
#endif
|
||||
|
||||
/* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
|
||||
.section .stack, "wa", %nobits
|
||||
.section .stack_process, "wa", %nobits
|
||||
.section .heap, "wa", %nobits
|
||||
|
||||
|
|
@ -87,7 +87,7 @@
|
|||
#elif defined BOARD_METRO_M4_EXPRESS
|
||||
#include "metro_m4_express/board_metro_m4_express.h"
|
||||
#elif defined BOARD_METRO_M0_EXPRESS
|
||||
#include "metro_m4_express/board_metro_m0_express.h"
|
||||
#include "metro_m0_express/board_metro_m0_express.h"
|
||||
#else
|
||||
#error BOARD is not defined or supported yet
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue