diff --git a/examples/device/device_composite/ses/device_composite.emProject b/examples/device/device_composite/ses/device_composite.emProject
index 54395e5a..e63a9fb0 100644
--- a/examples/device/device_composite/ses/device_composite.emProject
+++ b/examples/device/device_composite/ses/device_composite.emProject
@@ -1,6 +1,6 @@
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diff --git a/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_MemoryMap.xml b/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_MemoryMap.xml
new file mode 100644
index 00000000..f5002347
--- /dev/null
+++ b/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_MemoryMap.xml
@@ -0,0 +1,5 @@
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diff --git a/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_Registers.xml b/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_Registers.xml
new file mode 100644
index 00000000..2e0fa061
--- /dev/null
+++ b/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_Registers.xml
@@ -0,0 +1,9587 @@
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diff --git a/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_Vectors.s b/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_Vectors.s
new file mode 100644
index 00000000..5844d499
--- /dev/null
+++ b/examples/device/device_composite/ses/ses_samd21/ATSAMD21G18A_Vectors.s
@@ -0,0 +1,331 @@
+/*****************************************************************************
+ * SEGGER Microcontroller GmbH & Co. KG *
+ * Solutions for real time microcontroller applications *
+ *****************************************************************************
+ * *
+ * (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
+ * *
+ * Internet: www.segger.com Support: support@segger.com *
+ * *
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Preprocessor Definitions *
+ * ------------------------ *
+ * VECTORS_IN_RAM *
+ * *
+ * If defined, an area of RAM will large enough to store the vector table *
+ * will be reserved. *
+ * *
+ *****************************************************************************/
+
+ .syntax unified
+ .code 16
+
+ .section .init, "ax"
+ .align 0
+
+/*****************************************************************************
+ * Default Exception Handlers *
+ *****************************************************************************/
+
+ .thumb_func
+ .weak NMI_Handler
+NMI_Handler:
+ b .
+
+ .thumb_func
+ .weak HardFault_Handler
+HardFault_Handler:
+ b .
+
+ .thumb_func
+ .weak SVC_Handler
+SVC_Handler:
+ b .
+
+ .thumb_func
+ .weak PendSV_Handler
+PendSV_Handler:
+ b .
+
+ .thumb_func
+ .weak SysTick_Handler
+SysTick_Handler:
+ b .
+
+ .thumb_func
+Dummy_Handler:
+ b .
+
+#if defined(__OPTIMIZATION_SMALL)
+
+ .weak PM_IRQHandler
+ .thumb_set PM_IRQHandler,Dummy_Handler
+
+ .weak SYSCTRL_IRQHandler
+ .thumb_set SYSCTRL_IRQHandler,Dummy_Handler
+
+ .weak WDT_IRQHandler
+ .thumb_set WDT_IRQHandler,Dummy_Handler
+
+ .weak RTC_IRQHandler
+ .thumb_set RTC_IRQHandler,Dummy_Handler
+
+ .weak EIC_IRQHandler
+ .thumb_set EIC_IRQHandler,Dummy_Handler
+
+ .weak NVMCTRL_IRQHandler
+ .thumb_set NVMCTRL_IRQHandler,Dummy_Handler
+
+ .weak DMAC_IRQHandler
+ .thumb_set DMAC_IRQHandler,Dummy_Handler
+
+ .weak USB_IRQHandler
+ .thumb_set USB_IRQHandler,Dummy_Handler
+
+ .weak EVSYS_IRQHandler
+ .thumb_set EVSYS_IRQHandler,Dummy_Handler
+
+ .weak SERCOM0_IRQHandler
+ .thumb_set SERCOM0_IRQHandler,Dummy_Handler
+
+ .weak SERCOM1_IRQHandler
+ .thumb_set SERCOM1_IRQHandler,Dummy_Handler
+
+ .weak SERCOM2_IRQHandler
+ .thumb_set SERCOM2_IRQHandler,Dummy_Handler
+
+ .weak SERCOM3_IRQHandler
+ .thumb_set SERCOM3_IRQHandler,Dummy_Handler
+
+ .weak SERCOM4_IRQHandler
+ .thumb_set SERCOM4_IRQHandler,Dummy_Handler
+
+ .weak SERCOM5_IRQHandler
+ .thumb_set SERCOM5_IRQHandler,Dummy_Handler
+
+ .weak TCC0_IRQHandler
+ .thumb_set TCC0_IRQHandler,Dummy_Handler
+
+ .weak TCC1_IRQHandler
+ .thumb_set TCC1_IRQHandler,Dummy_Handler
+
+ .weak TCC2_IRQHandler
+ .thumb_set TCC2_IRQHandler,Dummy_Handler
+
+ .weak TC3_IRQHandler
+ .thumb_set TC3_IRQHandler,Dummy_Handler
+
+ .weak TC4_IRQHandler
+ .thumb_set TC4_IRQHandler,Dummy_Handler
+
+ .weak TC5_IRQHandler
+ .thumb_set TC5_IRQHandler,Dummy_Handler
+
+ .weak ADC_IRQHandler
+ .thumb_set ADC_IRQHandler,Dummy_Handler
+
+ .weak AC_IRQHandler
+ .thumb_set AC_IRQHandler,Dummy_Handler
+
+ .weak DAC_IRQHandler
+ .thumb_set DAC_IRQHandler,Dummy_Handler
+
+ .weak I2S_IRQHandler
+ .thumb_set I2S_IRQHandler,Dummy_Handler
+
+#else
+
+ .thumb_func
+ .weak PM_IRQHandler
+PM_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak SYSCTRL_IRQHandler
+SYSCTRL_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak WDT_IRQHandler
+WDT_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak RTC_IRQHandler
+RTC_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak EIC_IRQHandler
+EIC_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak NVMCTRL_IRQHandler
+NVMCTRL_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak DMAC_IRQHandler
+DMAC_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak USB_IRQHandler
+USB_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak EVSYS_IRQHandler
+EVSYS_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak SERCOM0_IRQHandler
+SERCOM0_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak SERCOM1_IRQHandler
+SERCOM1_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak SERCOM2_IRQHandler
+SERCOM2_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak SERCOM3_IRQHandler
+SERCOM3_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak SERCOM4_IRQHandler
+SERCOM4_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak SERCOM5_IRQHandler
+SERCOM5_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak TCC0_IRQHandler
+TCC0_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak TCC1_IRQHandler
+TCC1_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak TCC2_IRQHandler
+TCC2_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak TC3_IRQHandler
+TC3_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak TC4_IRQHandler
+TC4_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak TC5_IRQHandler
+TC5_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak ADC_IRQHandler
+ADC_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak AC_IRQHandler
+AC_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak DAC_IRQHandler
+DAC_IRQHandler:
+ b .
+
+ .thumb_func
+ .weak I2S_IRQHandler
+I2S_IRQHandler:
+ b .
+
+#endif
+
+/*****************************************************************************
+ * Vector Table *
+ *****************************************************************************/
+
+ .section .vectors, "ax"
+ .align 0
+ .global _vectors
+ .extern __stack_end__
+ .extern Reset_Handler
+
+_vectors:
+ .word __stack_end__
+ .word Reset_Handler
+ .word NMI_Handler
+ .word HardFault_Handler
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word SVC_Handler
+ .word 0 /* Reserved */
+ .word 0 /* Reserved */
+ .word PendSV_Handler
+ .word SysTick_Handler
+ .word PM_IRQHandler
+ .word SYSCTRL_IRQHandler
+ .word WDT_IRQHandler
+ .word RTC_IRQHandler
+ .word EIC_IRQHandler
+ .word NVMCTRL_IRQHandler
+ .word DMAC_IRQHandler
+ .word USB_IRQHandler
+ .word EVSYS_IRQHandler
+ .word SERCOM0_IRQHandler
+ .word SERCOM1_IRQHandler
+ .word SERCOM2_IRQHandler
+ .word SERCOM3_IRQHandler
+ .word SERCOM4_IRQHandler
+ .word SERCOM5_IRQHandler
+ .word TCC0_IRQHandler
+ .word TCC1_IRQHandler
+ .word TCC2_IRQHandler
+ .word TC3_IRQHandler
+ .word TC4_IRQHandler
+ .word TC5_IRQHandler
+ .word Dummy_Handler /* Reserved */
+ .word Dummy_Handler /* Reserved */
+ .word ADC_IRQHandler
+ .word AC_IRQHandler
+ .word DAC_IRQHandler
+ .word Dummy_Handler /* Reserved */
+ .word I2S_IRQHandler
+_vectors_end:
+
+#ifdef VECTORS_IN_RAM
+ .section .vectors_ram, "ax"
+ .align 0
+ .global _vectors_ram
+
+_vectors_ram:
+ .space _vectors_end - _vectors, 0
+#endif
diff --git a/examples/device/device_composite/ses/ses_samd21/SAMD21_Startup.s b/examples/device/device_composite/ses/ses_samd21/SAMD21_Startup.s
new file mode 100644
index 00000000..c4b48d35
--- /dev/null
+++ b/examples/device/device_composite/ses/ses_samd21/SAMD21_Startup.s
@@ -0,0 +1,114 @@
+/*****************************************************************************
+ * SEGGER Microcontroller GmbH & Co. KG *
+ * Solutions for real time microcontroller applications *
+ *****************************************************************************
+ * *
+ * (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
+ * *
+ * Internet: www.segger.com Support: support@segger.com *
+ * *
+ *****************************************************************************/
+
+/*****************************************************************************
+ * Preprocessor Definitions *
+ * ------------------------ *
+ * NO_STACK_INIT *
+ * *
+ * If defined, the stack pointer will not be initialised. *
+ * *
+ * NO_SYSTEM_INIT *
+ * *
+ * If defined, the SystemInit() function will not be called. By default *
+ * SystemInit() is called after reset to enable the clocks and memories to *
+ * be initialised prior to any C startup initialisation. *
+ * *
+ * NO_VTOR_CONFIG *
+ * *
+ * If defined, the vector table offset register will not be configured. *
+ * *
+ * MEMORY_INIT *
+ * *
+ * If defined, the MemoryInit() function will be called. By default *
+ * MemoryInit() is called after SystemInit() to enable an external memory *
+ * controller. *
+ * *
+ * STACK_INIT_VAL *
+ * *
+ * If defined, specifies the initial stack pointer value. If undefined, *
+ * the stack pointer will be initialised to point to the end of the *
+ * RAM segment. *
+ * *
+ * VECTORS_IN_RAM *
+ * *
+ * If defined, the exception vectors will be copied from Flash to RAM. *
+ * *
+ *****************************************************************************/
+
+ .syntax unified
+
+ .global Reset_Handler
+ .extern _vectors
+
+ .section .init, "ax"
+ .thumb_func
+
+ .equ VTOR_REG, 0xE000ED08
+
+#ifndef STACK_INIT_VAL
+#define STACK_INIT_VAL __RAM_segment_end__
+#endif
+
+Reset_Handler:
+#ifndef NO_STACK_INIT
+ /* Initialise main stack */
+ ldr r0, =STACK_INIT_VAL
+ ldr r1, =0x7
+ bics r0, r1
+ mov sp, r0
+#endif
+
+#ifndef NO_SYSTEM_INIT
+ /* Initialise system */
+ ldr r0, =SystemInit
+ blx r0
+ .pushsection .init_array, "aw", %init_array
+ .word SystemCoreClockUpdate
+ .popsection
+#endif
+
+#ifdef MEMORY_INIT
+ ldr r0, =MemoryInit
+ blx r0
+#endif
+
+#ifdef VECTORS_IN_RAM
+ /* Copy exception vectors into RAM */
+ ldr r0, =__vectors_start__
+ ldr r1, =__vectors_end__
+ ldr r2, =__vectors_ram_start__
+1:
+ cmp r0, r1
+ beq 2f
+ ldr r3, [r0]
+ str r3, [r2]
+ adds r0, r0, #4
+ adds r2, r2, #4
+ b 1b
+2:
+#endif
+
+#ifndef NO_VTOR_CONFIG
+ /* Configure vector table offset register */
+ ldr r0, =VTOR_REG
+#ifdef VECTORS_IN_RAM
+ ldr r1, =_vectors_ram
+#else
+ ldr r1, =_vectors
+#endif
+ str r1, [r0]
+#endif
+
+ /* Jump to program start */
+ b _start
+
+
diff --git a/examples/device/device_composite/ses/ses_samd21/SAMD21_Target.js b/examples/device/device_composite/ses/ses_samd21/SAMD21_Target.js
new file mode 100644
index 00000000..20560af4
--- /dev/null
+++ b/examples/device/device_composite/ses/ses_samd21/SAMD21_Target.js
@@ -0,0 +1,19 @@
+/*****************************************************************************
+ * SEGGER Microcontroller GmbH & Co. KG *
+ * Solutions for real time microcontroller applications *
+ *****************************************************************************
+ * *
+ * (c) 2017 SEGGER Microcontroller GmbH & Co. KG *
+ * *
+ * Internet: www.segger.com Support: support@segger.com *
+ * *
+ *****************************************************************************/
+
+function Reset() {
+ TargetInterface.resetAndStop();
+}
+
+function EnableTrace(traceInterfaceType) {
+ // TODO: Enable trace
+}
+
diff --git a/examples/device/device_composite/ses/ses_samd21/flash_placement.xml b/examples/device/device_composite/ses/ses_samd21/flash_placement.xml
new file mode 100644
index 00000000..79bedc53
--- /dev/null
+++ b/examples/device/device_composite/ses/ses_samd21/flash_placement.xml
@@ -0,0 +1,37 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/examples/device/device_composite/ses/ses_samd21/thumb_crt0.s b/examples/device/device_composite/ses/ses_samd21/thumb_crt0.s
new file mode 100644
index 00000000..17f88e0c
--- /dev/null
+++ b/examples/device/device_composite/ses/ses_samd21/thumb_crt0.s
@@ -0,0 +1,415 @@
+// **********************************************************************
+// * SEGGER Microcontroller GmbH *
+// * The Embedded Experts *
+// **********************************************************************
+// * *
+// * (c) 2014 - 2018 SEGGER Microcontroller GmbH *
+// * (c) 2001 - 2018 Rowley Associates Limited *
+// * *
+// * www.segger.com Support: support@segger.com *
+// * *
+// **********************************************************************
+// * *
+// * All rights reserved. *
+// * *
+// * Redistribution and use in source and binary forms, with or *
+// * without modification, are permitted provided that the following *
+// * conditions are met: *
+// * *
+// * - Redistributions of source code must retain the above copyright *
+// * notice, this list of conditions and the following disclaimer. *
+// * *
+// * - Neither the name of SEGGER Microcontroller GmbH *
+// * nor the names of its contributors may be used to endorse or *
+// * promote products derived from this software without specific *
+// * prior written permission. *
+// * *
+// * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
+// * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
+// * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
+// * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
+// * DISCLAIMED. *
+// * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR *
+// * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
+// * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
+// * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
+// * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
+// * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
+// * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
+// * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
+// * DAMAGE. *
+// * *
+// **********************************************************************
+//
+//
+// Preprocessor Definitions
+// ------------------------
+// APP_ENTRY_POINT
+//
+// Defines the application entry point function, if undefined this setting
+// defaults to "main".
+//
+// INITIALIZE_STACK
+//
+// If defined, the contents of the stack will be initialized to a the
+// value 0xCC.
+//
+// INITIALIZE_SECONDARY_SECTIONS
+//
+// If defined, the .data2, .text2, .rodata2 and .bss2 sections will be initialized.
+//
+// INITIALIZE_TCM_SECTIONS
+//
+// If defined, the .data_tcm, .text_tcm, .rodata_tcm and .bss_tcm sections
+// will be initialized.
+//
+// INITIALIZE_USER_SECTIONS
+//
+// If defined, the function InitializeUserMemorySections will be called prior
+// to entering main in order to allow the user to initialize any user defined
+// memory sections.
+//
+// FULL_LIBRARY
+//
+// If defined then
+// - argc, argv are setup by the debug_getargs.
+// - the exit symbol is defined and executes on return from main.
+// - the exit symbol calls destructors, atexit functions and then debug_exit.
+//
+// If not defined then
+// - argc and argv are zero.
+// - the exit symbol is defined, executes on return from main and loops
+//
+
+#ifndef APP_ENTRY_POINT
+#define APP_ENTRY_POINT main
+#endif
+
+#ifndef ARGSSPACE
+#define ARGSSPACE 128
+#endif
+ .syntax unified
+
+ .global _start
+ .extern APP_ENTRY_POINT
+ .global exit
+ .weak exit
+
+#ifdef INITIALIZE_USER_SECTIONS
+ .extern InitializeUserMemorySections
+#endif
+
+ .section .init, "ax"
+ .code 16
+ .balign 2
+ .thumb_func
+
+_start:
+ /* Set up main stack if size > 0 */
+ ldr r1, =__stack_end__
+ ldr r0, =__stack_start__
+ subs r2, r1, r0
+ beq 1f
+#ifdef __ARM_EABI__
+ movs r2, #0x7
+ bics r1, r2
+#endif
+ mov sp, r1
+#ifdef INITIALIZE_STACK
+ movs r2, #0xCC
+ ldr r0, =__stack_start__
+ bl memory_set
+#endif
+1:
+
+ /* Set up process stack if size > 0 */
+ ldr r1, =__stack_process_end__
+ ldr r0, =__stack_process_start__
+ subs r2, r1, r0
+ beq 1f
+#ifdef __ARM_EABI__
+ movs r2, #0x7
+ bics r1, r2
+#endif
+ msr psp, r1
+ movs r2, #2
+ msr control, r2
+#ifdef INITIALIZE_STACK
+ movs r2, #0xCC
+ bl memory_set
+#endif
+1:
+
+ /* Copy initialized memory sections into RAM (if necessary). */
+ ldr r0, =__data_load_start__
+ ldr r1, =__data_start__
+ ldr r2, =__data_end__
+ bl memory_copy
+ ldr r0, =__text_load_start__
+ ldr r1, =__text_start__
+ ldr r2, =__text_end__
+ bl memory_copy
+ ldr r0, =__fast_load_start__
+ ldr r1, =__fast_start__
+ ldr r2, =__fast_end__
+ bl memory_copy
+ ldr r0, =__ctors_load_start__
+ ldr r1, =__ctors_start__
+ ldr r2, =__ctors_end__
+ bl memory_copy
+ ldr r0, =__dtors_load_start__
+ ldr r1, =__dtors_start__
+ ldr r2, =__dtors_end__
+ bl memory_copy
+ ldr r0, =__rodata_load_start__
+ ldr r1, =__rodata_start__
+ ldr r2, =__rodata_end__
+ bl memory_copy
+ ldr r0, =__tdata_load_start__
+ ldr r1, =__tdata_start__
+ ldr r2, =__tdata_end__
+ bl memory_copy
+#ifdef INITIALIZE_SECONDARY_SECTIONS
+ ldr r0, =__data2_load_start__
+ ldr r1, =__data2_start__
+ ldr r2, =__data2_end__
+ bl memory_copy
+ ldr r0, =__text2_load_start__
+ ldr r1, =__text2_start__
+ ldr r2, =__text2_end__
+ bl memory_copy
+ ldr r0, =__rodata2_load_start__
+ ldr r1, =__rodata2_start__
+ ldr r2, =__rodata2_end__
+ bl memory_copy
+#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
+#ifdef INITIALIZE_TCM_SECTIONS
+ ldr r0, =__data_tcm_load_start__
+ ldr r1, =__data_tcm_start__
+ ldr r2, =__data_tcm_end__
+ bl memory_copy
+ ldr r0, =__text_tcm_load_start__
+ ldr r1, =__text_tcm_start__
+ ldr r2, =__text_tcm_end__
+ bl memory_copy
+ ldr r0, =__rodata_tcm_load_start__
+ ldr r1, =__rodata_tcm_start__
+ ldr r2, =__rodata_tcm_end__
+ bl memory_copy
+#endif /* #ifdef INITIALIZE_TCM_SECTIONS */
+
+ /* Zero the bss. */
+ ldr r0, =__bss_start__
+ ldr r1, =__bss_end__
+ movs r2, #0
+ bl memory_set
+ ldr r0, =__tbss_start__
+ ldr r1, =__tbss_end__
+ movs r2, #0
+ bl memory_set
+#ifdef INITIALIZE_SECONDARY_SECTIONS
+ ldr r0, =__bss2_start__
+ ldr r1, =__bss2_end__
+ mov r2, #0
+ bl memory_set
+#endif /* #ifdef INITIALIZE_SECONDARY_SECTIONS */
+#ifdef INITIALIZE_TCM_SECTIONS
+ ldr r0, =__bss_tcm_start__
+ ldr r1, =__bss_tcm_end__
+ mov r2, #0
+ bl memory_set
+#endif /* #ifdef INITIALIZE_TCM_SECTIONS */
+
+ /* Initialize the heap */
+ ldr r0, = __heap_start__
+ ldr r1, = __heap_end__
+ subs r1, r1, r0
+ cmp r1, #8
+ blt 1f
+ movs r2, #0
+ str r2, [r0]
+ adds r0, r0, #4
+ str r1, [r0]
+1:
+
+#ifdef INITIALIZE_USER_SECTIONS
+ ldr r2, =InitializeUserMemorySections
+ blx r2
+#endif
+
+ /* Call constructors */
+ ldr r0, =__ctors_start__
+ ldr r1, =__ctors_end__
+ctor_loop:
+ cmp r0, r1
+ beq ctor_end
+ ldr r2, [r0]
+ adds r0, #4
+ push {r0-r1}
+ blx r2
+ pop {r0-r1}
+ b ctor_loop
+ctor_end:
+
+ /* Setup initial call frame */
+ movs r0, #0
+ mov lr, r0
+ mov r12, sp
+
+ .type start, function
+start:
+ /* Jump to application entry point */
+#ifdef FULL_LIBRARY
+ movs r0, #ARGSSPACE
+ ldr r1, =args
+ ldr r2, =debug_getargs
+ blx r2
+ ldr r1, =args
+#else
+ movs r0, #0
+ movs r1, #0
+#endif
+ ldr r2, =APP_ENTRY_POINT
+ blx r2
+
+ .thumb_func
+exit:
+#ifdef FULL_LIBRARY
+ mov r5, r0 // save the exit parameter/return result
+
+ /* Call destructors */
+ ldr r0, =__dtors_start__
+ ldr r1, =__dtors_end__
+dtor_loop:
+ cmp r0, r1
+ beq dtor_end
+ ldr r2, [r0]
+ add r0, #4
+ push {r0-r1}
+ blx r2
+ pop {r0-r1}
+ b dtor_loop
+dtor_end:
+
+ /* Call atexit functions */
+ ldr r2, =_execute_at_exit_fns
+ blx r2
+
+ /* Call debug_exit with return result/exit parameter */
+ mov r0, r5
+ ldr r2, =debug_exit
+ blx r2
+#endif
+
+ /* Returned from application entry point, loop forever. */
+exit_loop:
+ b exit_loop
+
+ .thumb_func
+memory_copy:
+ cmp r0, r1
+ beq 2f
+ subs r2, r2, r1
+ beq 2f
+1:
+ ldrb r3, [r0]
+ adds r0, r0, #1
+ strb r3, [r1]
+ adds r1, r1, #1
+ subs r2, r2, #1
+ bne 1b
+2:
+ bx lr
+
+ .thumb_func
+memory_set:
+ cmp r0, r1
+ beq 1f
+ strb r2, [r0]
+ adds r0, r0, #1
+ b memory_set
+1:
+ bx lr
+
+ // default C/C++ library helpers
+
+.macro HELPER helper_name
+ .section .text.\helper_name, "ax", %progbits
+ .balign 2
+ .global \helper_name
+ .weak \helper_name
+\helper_name:
+ .thumb_func
+.endm
+
+.macro JUMPTO name
+#if defined(__thumb__) && !defined(__thumb2__)
+ mov r12, r0
+ ldr r0, =\name
+ push {r0}
+ mov r0, r12
+ pop {pc}
+#else
+ b \name
+#endif
+.endm
+
+HELPER __aeabi_read_tp
+ ldr r0, =__tbss_start__-8
+ bx lr
+HELPER abort
+ b .
+HELPER __assert
+ b .
+HELPER __aeabi_assert
+ b .
+HELPER __sync_synchronize
+ bx lr
+HELPER __getchar
+ JUMPTO debug_getchar
+HELPER __putchar
+ JUMPTO debug_putchar
+HELPER __open
+ JUMPTO debug_fopen
+HELPER __close
+ JUMPTO debug_fclose
+HELPER __write
+ mov r3, r0
+ mov r0, r1
+ movs r1, #1
+ JUMPTO debug_fwrite
+HELPER __read
+ mov r3, r0
+ mov r0, r1
+ movs r1, #1
+ JUMPTO debug_fread
+HELPER __seek
+ push {r4, lr}
+ mov r4, r0
+ bl debug_fseek
+ cmp r0, #0
+ bne 1f
+ mov r0, r4
+ bl debug_ftell
+ pop {r4, pc}
+1:
+ ldr r0, =-1
+ pop {r4, pc}
+ // char __user_locale_name_buffer[];
+ .section .bss.__user_locale_name_buffer, "aw", %nobits
+ .global __user_locale_name_buffer
+ .weak __user_locale_name_buffer
+ __user_locale_name_buffer:
+ .word 0x0
+
+#ifdef FULL_LIBRARY
+ .bss
+args:
+ .space ARGSSPACE
+#endif
+
+ /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */
+ .section .stack, "wa", %nobits
+ .section .stack_process, "wa", %nobits
+ .section .heap, "wa", %nobits
+
diff --git a/hw/bsp/board.h b/hw/bsp/board.h
index fc835d31..2a946025 100644
--- a/hw/bsp/board.h
+++ b/hw/bsp/board.h
@@ -87,7 +87,7 @@
#elif defined BOARD_METRO_M4_EXPRESS
#include "metro_m4_express/board_metro_m4_express.h"
#elif defined BOARD_METRO_M0_EXPRESS
- #include "metro_m4_express/board_metro_m0_express.h"
+ #include "metro_m0_express/board_metro_m0_express.h"
#else
#error BOARD is not defined or supported yet
#endif