Adds support for Microchip SAM E54 Xplained Pro
This commit is contained in:
Jean Gressmann
parent
1bba2c0fc3
commit
16c8f75637
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@ -41,6 +41,7 @@ This code base already had supported for a handful of following boards (sorted a
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- [Adafruit PyPortal](https://www.adafruit.com/product/4116)
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- [Adafruit Metro M4 Express](https://www.adafruit.com/product/3382)
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- [D5035-01](https://github.com/RudolphRiedel/USB_CAN-FD)
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- [Microchip SAME54 Xplained Pro](https://www.microchip.com/developmenttools/productdetails/atsame54-xpro)
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### MicroChip SAMG
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@ -0,0 +1,50 @@
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CONF_CPU_FREQUENCY ?= 120000000
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CFLAGS += \
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-mthumb \
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-mabi=aapcs \
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-mlong-calls \
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-mcpu=cortex-m4 \
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-mfloat-abi=hard \
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-mfpu=fpv4-sp-d16 \
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-nostdlib -nostartfiles \
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-D__SAME54P20A__ \
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-DCONF_CPU_FREQUENCY=$(CONF_CPU_FREQUENCY) \
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-DCFG_TUSB_MCU=OPT_MCU_SAME5X \
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# -DSVC_Handler=SVCall_Handler
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# All source paths should be relative to the top level.
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LD_FILE = hw/bsp/$(BOARD)/same54p20a_flash.ld
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SRC_C += \
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hw/mcu/microchip/asf4/same54/gcc/gcc/startup_same54.c \
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hw/mcu/microchip/asf4/same54/gcc/system_same54.c \
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hw/mcu/microchip/asf4/same54/hal/utils/src/utils_syscalls.c
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INC += \
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$(TOP)/hw/mcu/microchip/asf4/same54/ \
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$(TOP)/hw/mcu/microchip/asf4/same54/config \
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$(TOP)/hw/mcu/microchip/asf4/same54/include \
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$(TOP)/hw/mcu/microchip/asf4/same54/hal/include \
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$(TOP)/hw/mcu/microchip/asf4/same54/hal/utils/include \
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$(TOP)/hw/mcu/microchip/asf4/same54/hpl/port \
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$(TOP)/hw/mcu/microchip/asf4/same54/hri \
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$(TOP)/hw/mcu/microchip/asf4/same54/CMSIS/Include
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# For TinyUSB port source
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VENDOR = microchip
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CHIP_FAMILY = samd
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# For freeRTOS port source
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FREERTOS_PORT = ARM_CM4F
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# For flash-jlink target
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JLINK_DEVICE = ATSAME54P20
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# flash using edbg from https://github.com/ataradov/edbg
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flash: $(BUILD)/$(PROJECT).bin
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edbg --verbose -t same54 -pv -f $<
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@ -0,0 +1,163 @@
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/**
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* \file
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*
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* \brief Linker script for running in internal FLASH on the SAME54P20A
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*
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* Copyright (c) 2019 Microchip Technology Inc.
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*
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* \asf_license_start
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*
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* \page License
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the Licence at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \asf_license_stop
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*
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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SEARCH_DIR(.)
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/* Memory Spaces Definitions */
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MEMORY
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{
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rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00100000
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000
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bkupram (rwx) : ORIGIN = 0x47000000, LENGTH = 0x00002000
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qspi (rwx) : ORIGIN = 0x04000000, LENGTH = 0x01000000
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}
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/* The stack size used by the application. NOTE: you need to adjust according to your application. */
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STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x10000;
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/* Section Definitions */
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SECTIONS
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{
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.text :
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{
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. = ALIGN(4);
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_sfixed = .;
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KEEP(*(.vectors .vectors.*))
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*(.text .text.* .gnu.linkonce.t.*)
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*(.glue_7t) *(.glue_7)
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*(.rodata .rodata* .gnu.linkonce.r.*)
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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/* Support C constructors, and C destructors in both user code
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and the C library. This also provides support for C++ code. */
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. = ALIGN(4);
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KEEP(*(.init))
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. = ALIGN(4);
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__preinit_array_start = .;
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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. = ALIGN(4);
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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. = ALIGN(4);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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. = ALIGN(4);
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KEEP(*(.fini))
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. = ALIGN(4);
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__fini_array_start = .;
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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__fini_array_end = .;
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*crtend.o(.dtors))
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. = ALIGN(4);
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_efixed = .; /* End of text section */
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} > rom
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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PROVIDE_HIDDEN (__exidx_start = .);
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > rom
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PROVIDE_HIDDEN (__exidx_end = .);
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. = ALIGN(4);
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_etext = .;
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.relocate : AT (_etext)
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{
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. = ALIGN(4);
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_srelocate = .;
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*(.ramfunc .ramfunc.*);
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*(.data .data.*);
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. = ALIGN(4);
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_erelocate = .;
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} > ram
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.bkupram (NOLOAD):
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{
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. = ALIGN(8);
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_sbkupram = .;
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*(.bkupram .bkupram.*);
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. = ALIGN(8);
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_ebkupram = .;
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} > bkupram
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.qspi (NOLOAD):
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{
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. = ALIGN(8);
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_sqspi = .;
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*(.qspi .qspi.*);
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. = ALIGN(8);
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_eqspi = .;
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} > qspi
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/* .bss section which is used for uninitialized data */
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.bss (NOLOAD) :
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{
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. = ALIGN(4);
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_sbss = . ;
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_szero = .;
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*(.bss .bss.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = . ;
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_ezero = .;
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} > ram
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/* stack section */
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.stack (NOLOAD):
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{
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. = ALIGN(8);
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_sstack = .;
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. = . + STACK_SIZE;
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. = ALIGN(8);
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_estack = .;
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} > ram
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. = ALIGN(4);
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_end = . ;
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}
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@ -0,0 +1,162 @@
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/**
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* \file
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*
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* \brief Linker script for running in internal SRAM on the SAME54P20A
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*
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* Copyright (c) 2019 Microchip Technology Inc.
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*
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* \asf_license_start
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*
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* \page License
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the Licence at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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* \asf_license_stop
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*
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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SEARCH_DIR(.)
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/* Memory Spaces Definitions */
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MEMORY
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{
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000
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bkupram (rwx) : ORIGIN = 0x47000000, LENGTH = 0x00002000
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qspi (rwx) : ORIGIN = 0x04000000, LENGTH = 0x01000000
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}
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/* The stack size used by the application. NOTE: you need to adjust according to your application. */
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STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x10000;
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/* Section Definitions */
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SECTIONS
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{
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.text :
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{
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. = ALIGN(4);
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_sfixed = .;
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KEEP(*(.vectors .vectors.*))
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*(.text .text.* .gnu.linkonce.t.*)
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*(.glue_7t) *(.glue_7)
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*(.rodata .rodata* .gnu.linkonce.r.*)
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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/* Support C constructors, and C destructors in both user code
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and the C library. This also provides support for C++ code. */
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. = ALIGN(4);
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KEEP(*(.init))
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. = ALIGN(4);
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__preinit_array_start = .;
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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. = ALIGN(4);
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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. = ALIGN(4);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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. = ALIGN(4);
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KEEP(*(.fini))
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. = ALIGN(4);
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__fini_array_start = .;
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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__fini_array_end = .;
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*crtend.o(.dtors))
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. = ALIGN(4);
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_efixed = .; /* End of text section */
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} > ram
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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PROVIDE_HIDDEN (__exidx_start = .);
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > ram
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PROVIDE_HIDDEN (__exidx_end = .);
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. = ALIGN(4);
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_etext = .;
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.relocate : AT (_etext)
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{
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. = ALIGN(4);
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_srelocate = .;
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*(.ramfunc .ramfunc.*);
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*(.data .data.*);
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. = ALIGN(4);
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_erelocate = .;
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} > ram
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.bkupram (NOLOAD):
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{
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. = ALIGN(8);
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_sbkupram = .;
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*(.bkupram .bkupram.*);
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. = ALIGN(8);
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_ebkupram = .;
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} > bkupram
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.qspi (NOLOAD):
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{
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. = ALIGN(8);
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_sqspi = .;
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*(.qspi .qspi.*);
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. = ALIGN(8);
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_eqspi = .;
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} > qspi
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/* .bss section which is used for uninitialized data */
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.bss (NOLOAD) :
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{
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. = ALIGN(4);
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_sbss = . ;
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_szero = .;
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*(.bss .bss.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = . ;
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_ezero = .;
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} > ram
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/* stack section */
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.stack (NOLOAD):
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{
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. = ALIGN(8);
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_sstack = .;
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. = . + STACK_SIZE;
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. = ALIGN(8);
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_estack = .;
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} > ram
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. = ALIGN(4);
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_end = . ;
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}
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@ -0,0 +1,274 @@
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/*
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* The MIT License (MIT)
|
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*
|
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* Copyright (c) 2021 Jean Gressmann <jean@0x42.de>
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*
|
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* Permission is hereby granted, free of charge, to any person obtaining a copy
|
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* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
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* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
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* THE SOFTWARE.
|
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*
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*/
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#include <sam.h>
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#include "bsp/board.h"
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#include <hal/include/hal_gpio.h>
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//--------------------------------------------------------------------+
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// Forward USB interrupt events to TinyUSB IRQ Handler
|
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//--------------------------------------------------------------------+
|
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void USB_0_Handler(void)
|
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{
|
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tud_int_handler(0);
|
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}
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void USB_1_Handler(void)
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{
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tud_int_handler(0);
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}
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void USB_2_Handler(void)
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{
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tud_int_handler(0);
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}
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void USB_3_Handler(void)
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{
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tud_int_handler(0);
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}
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//--------------------------------------------------------------------+
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// MACRO TYPEDEF CONSTANT ENUM DECLARATION
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//--------------------------------------------------------------------+
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#define LED_PIN PIN_PC18
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#define BUTTON_PIN PIN_PB31
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#define BOARD_SERCOM SERCOM2
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#define BOARD_NAME "Microchip SAM E54 Xplained Pro"
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static inline void init_clock(void)
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{
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/* configure for a 12MHz crystal connected to XIN1/XOUT1 */
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OSCCTRL->XOSCCTRL[1].reg =
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OSCCTRL_XOSCCTRL_STARTUP(6) | // 1.953 ms
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OSCCTRL_XOSCCTRL_RUNSTDBY |
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OSCCTRL_XOSCCTRL_ENALC |
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OSCCTRL_XOSCCTRL_IMULT(4) | OSCCTRL_XOSCCTRL_IPTAT(3) | // 8MHz to 16MHz
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OSCCTRL_XOSCCTRL_XTALEN |
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OSCCTRL_XOSCCTRL_ENABLE;
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while(0 == OSCCTRL->STATUS.bit.XOSCRDY1);
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OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(5) | OSCCTRL_DPLLCTRLB_REFCLK_XOSC1; /* 12MHz / 12 = 1Mhz, input = XOSC1 */
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OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR((CONF_CPU_FREQUENCY / 1000000)-1); /* multiply to get CONF_CPU_FREQUENCY (default = 120MHz) */
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OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
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while(0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */
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OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(5) | OSCCTRL_DPLLCTRLB_REFCLK_XOSC1; /* 12MHz / 12 = 1Mhz, input = XOSC1 */
|
||||
OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(47); /* multiply by 48 -> 48 MHz */
|
||||
OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE;
|
||||
while(0 == OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL1 to be ready */
|
||||
|
||||
/* configure clock-generator 0 to use DPLL0 as source -> GCLK0 is used for the core */
|
||||
GCLK->GENCTRL[0].reg =
|
||||
GCLK_GENCTRL_DIV(0) |
|
||||
GCLK_GENCTRL_RUNSTDBY |
|
||||
GCLK_GENCTRL_GENEN |
|
||||
GCLK_GENCTRL_SRC_DPLL0 |
|
||||
GCLK_GENCTRL_IDC;
|
||||
while(1 == GCLK->SYNCBUSY.bit.GENCTRL0); /* wait for the synchronization between clock domains to be complete */
|
||||
|
||||
/* configure clock-generator 1 to use DPLL1 as source -> for use with some peripheral */
|
||||
GCLK->GENCTRL[1].reg =
|
||||
GCLK_GENCTRL_DIV(0) |
|
||||
GCLK_GENCTRL_RUNSTDBY |
|
||||
GCLK_GENCTRL_GENEN |
|
||||
GCLK_GENCTRL_SRC_DPLL1 |
|
||||
GCLK_GENCTRL_IDC ;
|
||||
while(1 == GCLK->SYNCBUSY.bit.GENCTRL1); /* wait for the synchronization between clock domains to be complete */
|
||||
}
|
||||
|
||||
static inline void uart_init(void)
|
||||
{
|
||||
gpio_set_pin_function(PIN_PB24, PINMUX_PB24D_SERCOM2_PAD1);
|
||||
gpio_set_pin_function(PIN_PB25, PINMUX_PB25D_SERCOM2_PAD0);
|
||||
|
||||
MCLK->APBBMASK.bit.SERCOM2_ = 1;
|
||||
GCLK->PCHCTRL[SERCOM2_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK1 | GCLK_PCHCTRL_CHEN; /* setup SERCOM to use GLCK1 -> 48MHz */
|
||||
|
||||
BOARD_SERCOM->USART.CTRLA.bit.SWRST = 1; /* reset and disable SERCOM -> enable configuration */
|
||||
while (BOARD_SERCOM->USART.SYNCBUSY.bit.SWRST);
|
||||
|
||||
BOARD_SERCOM->USART.CTRLA.reg =
|
||||
SERCOM_USART_CTRLA_SAMPR(0) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
|
||||
SERCOM_USART_CTRLA_SAMPA(0) | /* 16x over sampling */
|
||||
SERCOM_USART_CTRLA_FORM(0) | /* 0x0 USART frame, 0x1 USART frame with parity, ... */
|
||||
SERCOM_USART_CTRLA_DORD | /* LSB first */
|
||||
SERCOM_USART_CTRLA_MODE(1) | /* 0x0 USART with external clock, 0x1 USART with internal clock */
|
||||
SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */
|
||||
SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */
|
||||
|
||||
BOARD_SERCOM->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */
|
||||
SERCOM_USART_CTRLB_TXEN | /* transmitter enabled */
|
||||
SERCOM_USART_CTRLB_RXEN; /* receiver enabled */
|
||||
// BOARD_SERCOM->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(0) | SERCOM_USART_BAUD_FRAC_BAUD(26); /* 48000000/(16*115200) = 26.041666667 */
|
||||
BOARD_SERCOM->USART.BAUD.reg = SERCOM_USART_BAUD_BAUD(63019); /* 65536*(1−16*115200/48000000) */
|
||||
|
||||
BOARD_SERCOM->SPI.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
|
||||
while (BOARD_SERCOM->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
|
||||
}
|
||||
|
||||
static inline void uart_send_buffer(uint8_t const *text, size_t len)
|
||||
{
|
||||
for (size_t i = 0; i < len; ++i) {
|
||||
BOARD_SERCOM->USART.DATA.reg = text[i];
|
||||
while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) == 0);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void uart_send_str(const char* text)
|
||||
{
|
||||
while (*text) {
|
||||
BOARD_SERCOM->USART.DATA.reg = *text++;
|
||||
while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) == 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void board_init(void)
|
||||
{
|
||||
init_clock();
|
||||
|
||||
SystemCoreClock = CONF_CPU_FREQUENCY;
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
SysTick_Config(CONF_CPU_FREQUENCY / 1000);
|
||||
#endif
|
||||
|
||||
uart_init();
|
||||
|
||||
#if CFG_TUSB_DEBUG >= 2
|
||||
uart_send_str(BOARD_NAME " UART initialized\n");
|
||||
tu_printf(BOARD_NAME " reset cause %#02x\n", RSTC->RCAUSE.reg);
|
||||
#endif
|
||||
|
||||
// LED0 init
|
||||
gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
|
||||
gpio_set_pin_level(LED_PIN, 0);
|
||||
|
||||
#if CFG_TUSB_DEBUG >= 2
|
||||
uart_send_str(BOARD_NAME " LED pin configured\n");
|
||||
#endif
|
||||
|
||||
// BTN0 init
|
||||
gpio_set_pin_function(BUTTON_PIN, GPIO_DIRECTION_IN);
|
||||
gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
|
||||
gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
|
||||
|
||||
#if CFG_TUSB_DEBUG >= 2
|
||||
uart_send_str(BOARD_NAME " Button pin configured\n");
|
||||
#endif
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
NVIC_SetPriority(USB_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
NVIC_SetPriority(USB_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
NVIC_SetPriority(USB_2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
NVIC_SetPriority(USB_3_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
#endif
|
||||
|
||||
|
||||
#if TUSB_OPT_DEVICE_ENABLED
|
||||
#if CFG_TUSB_DEBUG >= 2
|
||||
uart_send_str(BOARD_NAME " USB device enabled\n");
|
||||
#endif
|
||||
|
||||
/* USB clock init
|
||||
* The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
|
||||
* for low speed and full speed operation.
|
||||
*/
|
||||
hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
|
||||
hri_mclk_set_AHBMASK_USB_bit(MCLK);
|
||||
hri_mclk_set_APBBMASK_USB_bit(MCLK);
|
||||
|
||||
// USB pin init
|
||||
gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT);
|
||||
gpio_set_pin_level(PIN_PA24, false);
|
||||
gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF);
|
||||
gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT);
|
||||
gpio_set_pin_level(PIN_PA25, false);
|
||||
gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF);
|
||||
|
||||
gpio_set_pin_function(PIN_PA24, PINMUX_PA24H_USB_DM);
|
||||
gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP);
|
||||
|
||||
|
||||
#if CFG_TUSB_DEBUG >= 2
|
||||
uart_send_str(BOARD_NAME " USB device configured\n");
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state)
|
||||
{
|
||||
gpio_set_pin_level(LED_PIN, state);
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void)
|
||||
{
|
||||
return (PORT->Group[1].IN.reg & 0x80000000) != 0x80000000;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len)
|
||||
{
|
||||
(void) buf; (void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const * buf, int len)
|
||||
{
|
||||
if (len < 0) {
|
||||
uart_send_str(buf);
|
||||
} else {
|
||||
uart_send_buffer(buf, len);
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void)
|
||||
{
|
||||
return system_ticks;
|
||||
}
|
||||
#endif
|
||||
|
||||
// Required by __libc_init_array in startup code if we are compiling using
|
||||
// -nostdlib/-nostartfiles.
|
||||
void _init(void)
|
||||
{
|
||||
|
||||
}
|
||||
Loading…
Reference in New Issue