d4bf777c94
try to get synopsys work with OTG HS + external PHY
2020-05-27 11:01:33 +07:00
947c3eb10d
multiple port support for global otg base
2020-05-26 16:07:48 +07:00
b7ab60aa44
suporting multiple port (OTG FS + HS) for stm32
2020-05-26 15:52:02 +07:00
42edbc0006
Allow EP0 to use xfer sizes larger than one packet
2020-05-15 22:26:14 +02:00
28696de390
Interrupt time improvements
2020-05-15 18:21:44 +02:00
3401e0f6ff
Synopsys OUT EP improvements:
...
- Use register based XFRSIZ to determine transfer complete
(xfer->queued_len and xfer->short_packet were deleted)
- Pop out as many RxFIFO data entries as available within a IRQ call
- less application interruption due to XFRC calls
2020-05-08 18:10:48 +02:00
fd69cc3dcc
clean up
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renaming function and variables
changing indent size
2020-05-04 07:59:13 +02:00
59ff208c65
Changed switch into if statements
2020-04-29 12:37:29 +02:00
3e6feb7f6d
Redesign of Synopsys device transmission
...
Changes:
- checking if tx buffer empty interrupt is masked
- process more than one packet in isr
- mask tx buffer empty just after all bytes were written
- use of transmit_fifo_packet instead of transmit_packet
2020-04-29 11:32:22 +02:00
958b5510cb
added comment for hw clearing TXFE
2020-04-27 13:17:47 +07:00
e785b09118
TXFE is read only bit
2020-04-27 12:06:14 +07:00
8d18d6077b
turn off TX FIFO Empty for EPIN if all bytes are written
...
fix dcd synopsys issue with usbnet #289
2020-04-26 22:14:59 +07:00
b949ae596f
synopsys: Reduce interrupt time for IN ZLP
...
For IN endpoints output FIFO is filled in interrupt, therefor before
endpoint is enabled, DIEPTSIZ is set with correct size of packet.
Then endpoint is enabled and FIFO empty interrupt is enabled.
This works fine except for the ZLP. Enabling FIFO empty interrupt
results in interrupt handler being called all the time because
there is nothing to put in the FIFO.
Eventually it ends when IN token is received and empty
packed is transmitted out.
This change does not enable FIFO empty interrupt for ZLP reducing
CPU load.
2020-04-24 17:38:30 +02:00
551724498a
Added support for STM32F1 Connectivity Line MCU
...
STM32F105 and STM32F107 are using the Synopsys IP
2020-04-22 17:39:53 +02:00
1f442c0a9a
also add wakeup event
2020-04-18 23:48:36 +07:00
fa71402e17
implement disconnection detection for stm32 synopsys
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- disconnection is OTG INT session end bit
- add USE_SOF to disable 1ms interrupt on mcu which isn't used now by
the stack
- add suspend detection
2020-04-18 23:40:27 +07:00
6f9c256ad0
complete remove dcd_set_config(), fix unit test
2020-04-17 13:52:34 +07:00
50be9d7c3a
mass rename tud/dcd_irq_handler to tud/dcd_init_handler
2020-04-17 12:27:53 +07:00
4c74140b31
stm32 sysnopsys disconnect/connect
2020-04-16 20:20:20 +07:00
8f17945b67
move irq for stm32 synopsys
2020-04-08 16:37:09 +07:00
94e70f9b01
Merge branch 'master' into port-samg55
2019-12-21 23:53:48 +07:00
96a9eca6a0
move VBUS sense out of dcd_synosys to bsp
2019-12-11 14:03:36 +07:00
d7558e8a0f
use dcd_edpt0_status_complete() to set address without blocking for samd21/samd51/stm32_fsdev
2019-11-28 13:39:29 +07:00
6183dbd0ce
add -Wextra for more warnings to example
...
non-stack warning (probably mcu driver) should be suppressed in the
board.mk
2019-09-27 00:15:43 +07:00
108f756e22
dcd_synopsys: Fix off-by-one error in FIFO allocation.
2019-09-21 23:01:06 -04:00
4ea212a432
This demonstrates that I don't pre-build things before committing them... oops.
2019-09-13 23:52:43 -04:00
c831311a12
Off-by-one error in Synopsys assertions. (and move some braces to their own lines.
2019-09-13 23:38:58 -04:00
986beda9eb
adding stm32l4 support, board test run with stm32l476disco, usb doens't work yet
2019-09-13 11:22:44 +07:00
ff7261600c
ported stm32f2, added board stm32f207zg nucleo
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close #127
2019-09-12 10:41:03 +07:00
7f166d860d
stm32f7 work with dcd synopsis
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close #124
2019-09-11 22:48:07 +07:00
1385d7c494
stm32: Refactor so F4 and H7 use a single Synopsys IP source file.
2019-09-09 10:48:14 -04:00
hathach