Commit Graph

189 Commits

Author SHA1 Message Date
William D. Jones f5d9e7e560 stm32f4: Implement dcd_edpt_open. 2019-01-30 09:27:27 -05:00
William D. Jones 7aadaa3ef2 stm32f4: Handle only one setup packet at a time as a workaround. Device
enumerates.
2019-01-30 05:28:48 -05:00
William D. Jones a9e188a3d2 stm32f4: Implement dcd_set_address. 2019-01-30 02:48:49 -05:00
William D. Jones fcabc717d1 Small cleanups (remove inaccurate comment, set EP0 max size based on speed). 2019-01-30 02:03:19 -05:00
William D. Jones 8629f0c108 Properly schedule OUT xfers on a packet basis. 2019-01-30 02:01:09 -05:00
William D. Jones 6918db3639 stm32f4: Add receive packet function. 2019-01-30 01:42:17 -05:00
William D. Jones 9ce29f5ee6 stm32f4: Refactor packet transmit into subroutine. 2019-01-30 00:49:00 -05:00
hathach 1a84f5da54
nrf5x Let application decide USBD_IRQn priority 2019-01-29 19:42:31 +07:00
hathach 777f41a066
clean up 2019-01-29 18:47:29 +07:00
William D. Jones 9e76635465 stm32f4: Clarify required FIFO sizes and observed behavior. 2019-01-24 04:18:53 -05:00
William D. Jones fe7f304ad4 stm32f4: Start adding OUT interrupt handling, fix buffer sizes; RXFIFO
too low for some reason, TXFIFO EP0 used wrong bitmask.
2019-01-24 03:06:57 -05:00
hathach bd53256126
fix #32 2019-01-23 19:06:37 +07:00
William D. Jones 01117fb965 stm32f4: Finish dcd_edpt_xfer implementation (OUT xfers not functional yet). 2019-01-23 03:31:44 -05:00
William D. Jones b41f610514 stm32f4: Remember to turn off TXFE when IN xfer is done; it not
automatically cleared like EPENA.
2019-01-23 02:24:29 -05:00
William D. Jones 836d13fc4b stm32f4: Fix FIFO write logic (requires 32 bit writes). 2019-01-23 02:06:07 -05:00
William D. Jones aa9a7e882c stm32f4: Properly set control endpoint max packet size. 2019-01-23 00:55:45 -05:00
William D. Jones 17e418bce4 stm32f4: Fix incorrect xfer length for short packet IN xfers. 2019-01-23 00:44:55 -05:00
William D. Jones d1150432fe stm32f4: Remove assumption that EP 0 is only control endpoint. 2019-01-23 00:12:33 -05:00
William D. Jones 51c0ce3f6b stm32f4: Implement interrupt handling for IN packets (first signs of life). 2019-01-22 23:51:58 -05:00
William D. Jones 43c890615a stm32f4: Start implementing dcd_edpt_xfer. 2019-01-22 00:42:43 -05:00
William D. Jones 69f5f18fd6 stm32f4: Remove some template commented code. 2019-01-21 23:45:40 -05:00
William D. Jones 71e1b9d045 stm32f4: Setup packet events in tinyusb now functional. 2019-01-19 21:12:20 -05:00
William D. Jones 5720aef7bb stm32f4: Implement setup packing receive, fix typo in FIFO receive size. 2019-01-19 20:03:18 -05:00
William D. Jones 06c15bf913 stm32f4: Complete initialization for EP0 (packet handling not implemented). 2019-01-19 17:56:53 -05:00
William D. Jones 657d3e2983 stm32f4: Enable USB peripheral, fix typos in register writes. 2019-01-13 18:36:18 -05:00
William D. Jones 03cbd406cb dcd_stm32f4: Add USB init skeleton based on manual (does not enumerate). 2019-01-11 19:53:24 -05:00
William D. Jones 0f9fa5956f bsp.board_stm32f407g_disc1: Switch to external oscillator (more precise). 2019-01-11 13:47:44 -05:00
William D. Jones 75fda7d638 cdc_msc_hid: Ensure example compiles again- add missing prototypes,
fix incorrect prototypes, clean up.
2019-01-10 10:24:45 -05:00
William D. Jones b367baeaf1 Merge branch 'master' of https://github.com/hathach/tinyusb into stm32f4 2019-01-10 09:58:06 -05:00
hathach 6f17b4e019 change to dcd_get_frame_number 2018-12-21 12:46:20 +07:00
hathach 426064201a fix samd build 2018-12-19 13:16:42 +07:00
hathach 902697ca07 add dcd_get_microframe() 2018-12-17 12:14:11 +07:00
hathach 2a60427bdc rename bit_* helper to tu_bit_*, BIT_* to TU_BIT_* for consistency 2018-12-14 15:30:54 +07:00
hathach 6d86db3977
rename edpt_dir/number/addr to tu_edpt_* 2018-12-12 11:51:31 +07:00
hathach e3514b8054
rename hcd_device_remove to hcd_device_close 2018-12-12 11:34:09 +07:00
hathach 607658d047
rename MODE_HOST_SUPPORTED to TUSB_OPT_HOST_ENABLED 2018-12-07 23:38:52 +07:00
hathach e019916263
clean up ehci, support only 1 controller 2018-12-07 23:35:42 +07:00
hathach 2aa21a14e6
lpc17 ohci failed to execute control transfer !! 2018-12-07 18:49:26 +07:00
hathach d524da0c94
enable all warnings 2018-12-07 14:49:55 +07:00
hathach 2fa32bd949
able to build host lpc18xx 2018-12-05 20:39:52 +07:00
hathach 9f3e91a934
update nrf errata 2018-12-05 14:30:47 +07:00
hathach a73017fdc2
hal clean up
- replace tusb_hal_int_enable/disable to dcd_int_enable/disable,
hcd_int_enable/disable
- remove tusb_hal_init(), this will be part of dcd_init/hcd_init,
anything beyond dcd/hcd should be inited by bsp
2018-12-05 13:20:25 +07:00
hathach 6048a3bff4
remove dcd_connect/disconnect since there is no usage now 2018-12-05 12:22:33 +07:00
hathach c1336dff03
lpc move Chip_USB_Init() out of stack to bsp 2018-12-05 11:53:56 +07:00
hathach 9176b7b1da
renane file 2018-12-05 08:51:11 +07:00
hathach dd9c7b4249
lpc40xx device work, moving Chip_USB_Init out of tinyusb 2018-12-05 08:47:23 +07:00
hathach fe8346e642
move pinmux out of dcd into bsp 2018-12-04 18:38:01 +07:00
hathach 6c2404ca49
adding ea4088 quickstart, able to blink 2018-12-04 16:32:20 +07:00
hathach 261e0f9801
adding lpc40xx support 2018-12-04 16:06:50 +07:00
hathach 7120e12971
add mcb1800, blink led ok 2018-12-04 13:17:12 +07:00
hathach bf5ac608ff
rename dcd 18 43 2018-12-04 12:47:58 +07:00
hathach 1d6bbd9990
clean up dcd 43 2018-12-03 23:18:51 +07:00
hathach 29f721ba2c
dcd lpc43 clean up 2018-12-03 23:06:28 +07:00
hathach 9fec39d893
use lpcopen for lpc43x, work well 2018-12-03 22:58:21 +07:00
hathach bb7123eed1
use lpcopen for ea4357, blinky ok 2018-12-03 21:22:11 +07:00
hathach 7f55bbaf05
clean up 2018-12-03 18:32:06 +07:00
hathach 9e33f19378
clean up 2018-12-03 17:47:37 +07:00
hathach 63faea3929
migrate lpc17 to lpcopen, usb device work ok 2018-12-03 17:43:16 +07:00
hathach 66bd9f0a16 wrap up lpc11u port 2018-12-03 13:15:28 +07:00
hathach f28a15a886 clean up dcd lpc11u 2018-12-03 12:31:03 +07:00
hathach 57f7c18d77 dcd lpc11u6x work with cdc + msc 2018-12-03 00:04:55 +07:00
hathach 5848dd2895
lpc11u use USBSRAM, able to response with 1st request 2018-12-02 02:13:48 +07:00
hathach fb842bb804
lp11u able to receive setup packet 2018-12-01 22:21:54 +07:00
hathach d246cc2e6c
lpc13xx build ok (not work) with lpcopen 2018-11-30 23:39:18 +07:00
hathach 1f076bd945
rename cont 2018-11-30 12:59:23 +07:00
hathach 0ab62e6fa2
more rename 2018-11-30 12:57:44 +07:00
hathach 658c2ff570
rename 2018-11-30 12:56:09 +07:00
hathach 723e02780d
clean up 2018-11-30 12:51:54 +07:00
hathach d96347a0f5
rename OPT_MCU_LPC13UXX to OPT_MCU_LPC13XX 2018-11-30 12:48:06 +07:00
hathach 522b0c11ef move nvic prio in hal/dcd to bsp for portability 2018-11-29 22:59:00 +07:00
hathach 57b85262b2 added & tested lpc17xx freertos device example
- add USB priority check for freeRTOS config
2018-11-29 21:41:09 +07:00
hathach 15e4b97e36 lpc17xx add dcd_edpt_stalled 2018-11-29 20:09:02 +07:00
hathach a76c5bf154 dcd lpc17xx, route control endpoint to EP_FAST 2018-11-29 19:58:17 +07:00
hathach ed65a43977 clean up 2018-11-29 13:09:58 +07:00
hathach 402a5fee90 dcd lpc17xx enable EpIntEn for non-control IN after DMA complete
all transfer work well
2018-11-29 12:56:02 +07:00
hathach c3140af274
correct TUD_OPT_HIGH_SPEED 2018-11-28 17:54:11 +07:00
hathach 772b2b692f
more dcd lpc17xx clean up 2018-11-28 17:31:15 +07:00
hathach 4a521d5085
clean up 2018-11-28 17:02:46 +07:00
hathach 04ad5da820 improve non-control xfer for lpc17xx 2018-11-28 16:53:36 +07:00
Scott Shawcroft b4103eef06
needs to be filled out. blinks though 2018-11-27 18:11:03 -08:00
hathach a3cc52829b clean up 2018-11-27 23:55:10 +07:00
hathach 16b3f11d9f
clean up 2018-11-27 21:53:36 +07:00
hathach 15f704b623
improve dcd control lpc17xx 2018-11-27 21:51:02 +07:00
hathach 038851c362
enhance dcd lpc17xx. Able to pass enumeration 2018-11-27 20:48:46 +07:00
hathach 80ecf1fd54
add OPT_MODE_HIGH_SPEED 2018-11-26 14:56:07 +07:00
hathach 064eec5dd8
clean up warnings 2018-11-26 12:29:55 +07:00
Scott Shawcroft bf70f89240
Introduce a Makefile for the OS_NONE device example
It currently supports the SAMD21 and SAMD51 only. More will be
added later.
2018-11-25 11:46:06 -08:00
Scott Shawcroft bf8c4612dc
Make sure OUT endpoint 0 on the SAMDs always has a valid buffer to store
a SETUP token into.
2018-11-23 11:20:23 -08:00
Scott Shawcroft 6aa0146c72
Reset USB peripheral and wait for startup 2018-11-23 11:15:39 -08:00
hathach f196b24dce
rename DCD_XFER_SUCCESS to XFER_RESULT_SUCCESS 2018-11-23 15:22:46 +07:00
hathach e61e9d8b1b
nrf5x add DCD_EVENT_UNPLUGGED event 2018-11-23 15:05:40 +07:00
hathach 4e8400e6fb
more clean up 2018-11-22 21:58:06 +07:00
hathach a1faf5c9cb
clean up dcd lpc43xx 2018-11-22 21:37:23 +07:00
hathach 569e85a0c0
cdc work ok with lpc43xx 2018-11-22 17:40:20 +07:00
hathach 60d8cde695
rename CFG_TUSB_MEM_SECTION to CFG_TUSB_MEM_SECTION 2018-11-22 17:21:07 +07:00
hathach 1d6fc49fa9
clean up 2018-11-21 17:03:39 +07:00
hathach 3cad1d1134
samd21 work well with cdc 2018-11-21 15:00:36 +07:00
hathach a30dfa3324
clean up 2018-11-21 13:11:19 +07:00
hathach a0ce92bcfd
update dcd samd21 2018-11-21 13:01:39 +07:00
hathach 155edc7b00
fix ses irq vector 2018-11-21 12:36:28 +07:00