doc: put development instructions in seperate file
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requirements
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============
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to be able to generate the outputs you need following software:
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- rake: the central script taking care of generating the output files (Makefile is too cumbersome to parse files)
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- [QEDA](http://qeda.org/): to generate footprints for the parts
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- [Lepton EDA](https://github.com/lepton-eda/lepton-eda): for the schematic capture
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- [pcb-rnd](http://repo.hu/projects/pcb-rnd/): for the board layout
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the output generation is automatized.
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schematic
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=========
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library
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-------
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almost all of the symbols and footprints used in the schematic and board layout are defined in the [QEDA](http://qeda.org/) format and generated for the CAD software.
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the `library` folder contains the QEDA parts definitions.
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to install QEDA using NPM from the official repository:
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~~~
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sudo npm install -g qeda
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~~~
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to install QEDA from the sources:
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~~~
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git clone https://github.com/qeda/qeda
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cd qeda
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npm install
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sudo npm install --global
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~~~
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to generate the parts:
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~~~
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rake library
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~~~
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this will use the parts definition (.yaml files) in the `library` to generate [gEDA gschem](http://wiki.geda-project.org/geda:gaf)/[Lepton EDA](https://github.com/lepton-eda/lepton-eda) symbols (.sym files) in the `geda/symbols` folder, and [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/) footprints (.lht files) in the `coraleda/subc` folder.
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only the QEDA parts in subfolders within `library` come from the [QEDA library](https://doc.qeda.org/library/), but the files are included in this project for simplicity and archiving purposes.
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all other parts are custom and written for this project.
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schematic
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---------
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the `.sch` file is the schematic source file.
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it has been drawn using [Lepton EDA](https://github.com/lepton-eda/lepton-eda).
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it uses standard symbols, and the ones in the `geda/symbols/` folder.
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most symbols are generated by QEDA as described above.
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to export the netlist (in tEDAx format):
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~~~
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rake netlist
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~~~
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to export as pdf:
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~~~
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rake print
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~~~
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BOM
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---
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to export the bill of material (as CSV):
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~~~
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rake bom
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~~~
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board
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=====
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the `.lht` file is the board layout source file.
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it has been drawn using [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/).
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it uses the symbols from the `coraleda/subc/` folder.
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most symbols are generated by QEDA as described above.
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`oshw_logo.lht` is just the Open Source Hardware Logo.
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it been generated from https://oshwlogo.cuvoodoo.info/.
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to export gerber files for PCB manufacturer (and photo preview + overview document):
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~~~
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rake fabrication
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~~~
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88
README.md
88
README.md
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@ -37,7 +37,7 @@ only populate it to debug the board.
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the READY LED will we on when the BUGGED LED isn't.
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the READY LED will we on when the BUGGED LED isn't.
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this allows to always check if the battery is empty, but this also drains the battery even when not testing because an LED is always on.
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this allows to always check if the battery is empty, but this also drains the battery even when not testing because an LED is always on.
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the first prototype of the board (v0.3) offer three populating options, depending on the available NOR gate part:
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the first prototype of the board (v0) offers three populating options, depending on the available NOR gate part:
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- 1x SOIC-14 package: U1+C1
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- 1x SOIC-14 package: U1+C1
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- 2x SOT23-5 pachgae: U2+C2, U3+C3
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- 2x SOT23-5 pachgae: U2+C2, U3+C3
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@ -68,89 +68,3 @@ the TEST circuit simulates an integrated circuit by putting a 100 nF capacitor a
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because of the 1 k Ohm inline resistor, and limited 3.3 V provided by the battery, a maximum of 3.3 mA can be drawn by the USB plug.
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because of the 1 k Ohm inline resistor, and limited 3.3 V provided by the battery, a maximum of 3.3 mA can be drawn by the USB plug.
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this is often not enough to power up integrated circuit properly, particularly if they use a radio interface.
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this is often not enough to power up integrated circuit properly, particularly if they use a radio interface.
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thus it is safe to use the USB bug detector on bugs, without activating it.
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thus it is safe to use the USB bug detector on bugs, without activating it.
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requirements
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============
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to be able to generate the outputs you need following software:
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- rake: the central script taking care of generating the output files (Makefile is too cumbersome to parse files)
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- [QEDA](http://qeda.org/): to generate footprints for the parts
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- [Lepton EDA](https://github.com/lepton-eda/lepton-eda): for the schematic capture
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- [pcb-rnd](http://repo.hu/projects/pcb-rnd/): for the board layout
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the output generation is automatized.
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schematic
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=========
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library
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-------
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almost all of the symbols and footprints used in the schematic and board layout are defined in the [QEDA](http://qeda.org/) format and generated for the CAD software.
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the `library` folder contains the QEDA parts definitions.
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to install QEDA using NPM from the official repository:
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~~~
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sudo npm install -g qeda
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~~~
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to install QEDA from the sources:
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~~~
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git clone https://github.com/qeda/qeda
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cd qeda
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npm install
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sudo npm install --global
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~~~
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to generate the parts:
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~~~
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rake library
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~~~
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this will use the parts definition (.yaml files) in the `library` to generate [gEDA gschem](http://wiki.geda-project.org/geda:gaf)/[Lepton EDA](https://github.com/lepton-eda/lepton-eda) symbols (.sym files) in the `geda/symbols` folder, and [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/) footprints (.lht files) in the `coraleda/subc` folder.
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only the QEDA parts in subfolders within `library` come from the [QEDA library](https://doc.qeda.org/library/), but the files are included in this project for simplicity and archiving purposes.
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all other parts are custom and written for this project.
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schematic
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---------
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the `.sch` file is the schematic source file.
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it has been drawn using [Lepton EDA](https://github.com/lepton-eda/lepton-eda).
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it uses standard symbols, and the ones in the `geda/symbols/` folder.
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most symbols are generated by QEDA as described above.
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to export the netlist (in tEDAx format):
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~~~
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rake netlist
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~~~
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to export as pdf:
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~~~
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rake print
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~~~
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BOM
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---
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to export the bill of material (as CSV):
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~~~
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rake bom
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~~~
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board
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=====
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the `.lht` file is the board layout source file.
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it has been drawn using [coralEDA pcb-rnd](http://repo.hu/projects/pcb-rnd/).
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it uses the symbols from the `coraleda/subc/` folder.
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most symbols are generated by QEDA as described above.
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`oshw_logo.lht` is just the Open Source Hardware Logo.
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it been generated from https://oshwlogo.cuvoodoo.info/.
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to export gerber files for PCB manufacturer (and photo preview + overview document):
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~~~
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rake fabrication
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~~~
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