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application: add fake STM32 detection in version action

This commit is contained in:
King Kévin 2020-03-16 20:55:50 +01:00
parent 8b4f98d79a
commit 25c0ae0271
1 changed files with 39 additions and 32 deletions
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71
application.c
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@ -192,51 +192,31 @@ static void command_help(void* argument)
static void command_version(void* argument)
{
(void)argument; // we won't use the argument
bool fake = false; // if details indicate it's not an STM32
printf("firmware date: %04u-%02u-%02u\n", BUILD_YEAR, BUILD_MONTH, BUILD_DAY); // show firmware build date
puts("chip family: ");
switch (DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK) {
const uint16_t dev_id = DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK;
switch (dev_id) {
case 0: // DBGMCU_IDCODE is only accessible in debug mode (this is a known issue documented in STM32F10xxC/D/E Errata sheet, without workaround)
if ((*(uint32_t*)0x1FFFF000 & 0xFFFE0000) == 0x20000000) { // non-connectivity system memory start detected (MSP address pointing to SRAM
switch (DESIG_FLASH_SIZE) {
case 16:
case 32:
puts("low-density");
break;
case 64:
case 128:
puts("medium-density");
break;
case 256:
case 512:
puts("high-density");
break;
case 768:
case 1024:
puts("XL-density");
break;
default:
printf("unknown");
break;
}
} else { // connectivity system memory start is at 0x1FFFB000
puts("connectivity");
}
puts("not readable, retry with debug attached");
break;
// from RM0008 STM32F101xx, STM32F102xx, STM32F103xx, STM32F105xx and STM32F107xx
case 0x412:
puts("low-density");
puts("STM32F10x low-density");
break;
case 0x410:
puts("medium-density");
puts("STM32F10x medium-density");
break;
case 0x414:
puts("high-density");
puts("STM32F10x high-density");
break;
case 0x430:
puts("XL-density");
puts("STM32F10x XL-density");
break;
case 0x418:
puts("connectivity");
puts("STM32F10xconnectivity");
break;
// from RM0091 STM32F0x8
case 0x444:
puts("STM32F03x");
break;
@ -252,11 +232,19 @@ static void command_version(void* argument)
case 0x442:
puts("STM32F09x");
break;
// from RM0444
case 0x460:
puts("STM32G071xx/STM32G081xx");
break;
case 0x466:
puts("STM32G031xx/STM32G041xx");
break;
default:
puts("unknown");
fake = true;
break;
}
printf(" (DEV_ID=0x%04x)\n", DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK);
printf(" (DEV_ID=0x%03x)\n", dev_id);
puts("chip revision: ");
const uint16_t rev_id = DBGMCU_IDCODE >> 16;
switch (DBGMCU_IDCODE & DBGMCU_IDCODE_DEV_ID_MASK) {
@ -340,6 +328,7 @@ static void command_version(void* argument)
puts("ARMv7-M");
break;
default:
fake = true;
puts("unknown");
}
printf(" (0x%x)\n", cpuid_architecture);
@ -362,6 +351,7 @@ static void command_version(void* argument)
puts("Cortex‑M7");
break;
default:
fake = true;
puts("unknown");
}
printf(" (0x%03x)\n", cpuid_partno);
@ -390,12 +380,29 @@ static void command_version(void* argument)
puts("STM32");
} else if (2 == cpuid_variant && 1 == cpuid_revision && 7 == jep106_continuation && 0x51 == jep106_identification) { // GD32 uses Cortex-M3 r2p1 and the right JEP106 ID
puts("GD32");
fake = true;
} else if (2 == cpuid_variant && 1 == cpuid_revision && 4 == jep106_continuation && 0x3b == jep106_identification) { // GD32 uses Cortex-M3 r2p1 and ARM JEP106 ID
puts("CS32");
fake = true;
} else {
puts("unknown");
fake = true;
}
putc('\n');
// detect fake STM32
if (0x412 == dev_id || 0x410 == dev_id || 0x414 == dev_id || 0x430 == dev_id || 0x418 == dev_id) { // STM32F10x
// the original STM32F10x uses a Cortex-M3 r1p1
if (0xC23 != cpuid_partno) { // Cortex-M3
fake = true;
}
if (1 != cpuid_variant) { // r1
fake = true;
}
if (1 != cpuid_revision) { // p1
fake = true;
}
}
printf("this %s to be a genuine STM32\n", fake ? "does not seem" : "seems");
}
static void command_uptime(void* argument)