2216704db8
rename GCC_CFLAGS to CFLAGS_GCC, GCC_SRC_S to SRC_S_GCC etc ..
2023-06-24 19:31:33 +07:00
dbf7534cd4
update all stm32 to use new enhance make
2023-06-24 18:09:05 +07:00
ffdffc7e06
rename FREERTOS_PORT to FREERTOS_PORTABLE_SRC
...
also fix trailing spaces
2023-03-16 23:11:11 +07:00
05e0205ad0
Merge branch 'master' into renesas-ra
2023-03-08 21:05:06 +07:00
9930863b41
fix iar ci
2023-03-06 12:45:47 +07:00
df2ebe5d1a
add iar --fpu option
2023-01-24 12:57:07 +07:00
0a4e611e37
update stm32f7 to build with iar
2023-01-22 12:11:01 +07:00
db36075721
update f4 to build with iar
2023-01-22 11:56:50 +07:00
2a17a7e8f8
rework make freertos port handling
...
this allows ports to specify a freertos port outside the FreeRTOS-Kernel lib directory, which would otherwise not be possible
Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
2022-06-02 09:35:30 +01:00
06de6b725c
adding generalized dwc2 driver
2021-10-24 23:24:46 +07:00
253430a765
add example specific DEPS_SUBMODULES
2021-03-18 16:28:44 +07:00
b221cedf80
spaces
2021-03-17 21:36:52 +07:00
ed8f117dd1
explicitly add dcd source file without vendor/family
2021-03-17 16:52:07 +07:00
7d877e286a
update DEPS_SUBMODULES to optimize ci
2021-03-05 22:24:03 +07:00
590d8d4d5c
rename FAMILY_SUBMODULES to DEPS_SUBMODULES
2021-03-04 22:53:02 +07:00
16f501a14e
clean up
2021-03-03 20:25:44 +07:00
9bc921b342
update family submodule
...
temporarily disable other orphaned and esp32s2 build
2021-03-01 20:48:30 +07:00
2e42858537
move lpc55 into its own family
2021-03-01 00:39:48 +07:00
e230d683ca
add copy-artifact target, and add uf2 for all family board
2021-01-26 21:19:14 +07:00
0dd78aa916
group all stm32f4 boards
2020-11-29 22:48:21 +07:00
hathach