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update f4 to build with iar

This commit is contained in:
hathach 2023-01-22 11:56:50 +07:00
parent f4c3f0800d
commit db36075721
11 changed files with 71 additions and 23 deletions
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8
hw/bsp/stm32f4/boards/feather_stm32f405/board.mk
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@ -1,8 +1,12 @@
CFLAGS += -DSTM32F405xx
LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
# GCC
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
GCC_LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f405rg

8
hw/bsp/stm32f4/boards/pyboardv11/board.mk
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@ -1,8 +1,12 @@
CFLAGS += -DSTM32F405xx
LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
# GCC
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
GCC_LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f405rg

8
hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk
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@ -1,8 +1,12 @@
CFLAGS += -DSTM32F401xC
LD_FILE = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld
# GCC
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
GCC_LD_FILE = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f401xc.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f401xc_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f401cc

9
hw/bsp/stm32f4/boards/stm32f407disco/board.mk
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@ -1,8 +1,13 @@
CFLAGS += -DSTM32F407xx
LD_FILE = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
# GCC
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
GCC_LD_FILE = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
# For flash-jlink target
JLINK_DEVICE = stm32f407vg

8
hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk
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@ -1,8 +1,12 @@
CFLAGS += -DSTM32F411xE
LD_FILE = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld
# GCC
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
GCC_LD_FILE = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f411ce

8
hw/bsp/stm32f4/boards/stm32f411disco/board.mk
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@ -1,8 +1,12 @@
CFLAGS += -DSTM32F411xE
LD_FILE = $(BOARD_PATH)/STM32F411VETx_FLASH.ld
# GCC
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
GCC_LD_FILE = $(BOARD_PATH)/STM32F411VETx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f411ve

8
hw/bsp/stm32f4/boards/stm32f412disco/board.mk
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@ -1,8 +1,12 @@
CFLAGS += -DSTM32F412Zx
LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
# GCC
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
GCC_LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f412zg

8
hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk
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@ -1,8 +1,12 @@
CFLAGS += -DSTM32F412Zx
LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
# GCC
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
GCC_LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f412zg

8
hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk
View File

@ -1,8 +1,12 @@
CFLAGS += -DSTM32F439xx
LD_FILE = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld
# GCC
GCC_SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s
GCC_LD_FILE = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s
# IAR
IAR_SRC_S += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f439xx.s
IAR_LD_FILE = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f439xx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f439zi

5
hw/bsp/stm32f4/family.c
View File

@ -150,7 +150,8 @@ void board_init(void)
void board_led_write(bool state)
{
HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1-LED_STATE_ON));
HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
}
uint32_t board_button_read(void)
@ -190,7 +191,7 @@ uint32_t board_millis(void)
void HardFault_Handler (void)
{
asm("bkpt");
__asm("BKPT #0\n");
}
// Required by __libc_init_array in startup code if we are compiling using

16
hw/bsp/stm32f4/family.mk
View File

@ -7,18 +7,28 @@ ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
include $(TOP)/$(BOARD_PATH)/board.mk
# --------------
# Compiler Flags
# --------------
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_STM32F4
# GCC Flags
GCC_CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_STM32F4
-nostdlib -nostartfiles
# suppress warning caused by vendor mcu driver
CFLAGS += -Wno-error=cast-align
GCC_CFLAGS += -Wno-error=cast-align
# IAR Flags
IAR_CFLAGS += --cpu cortex-m4
IAR_ASFLAGS += --cpu cortex-m4
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \