82880eecbd
make nanolib linking explicitly by each family/board
2023-11-23 12:43:13 +07:00
eb7fcf1b74
add CPU_CORE for all family
2023-06-24 18:38:41 +07:00
ffdffc7e06
rename FREERTOS_PORT to FREERTOS_PORTABLE_SRC
...
also fix trailing spaces
2023-03-16 23:11:11 +07:00
2a17a7e8f8
rework make freertos port handling
...
this allows ports to specify a freertos port outside the FreeRTOS-Kernel lib directory, which would otherwise not be possible
Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
2022-06-02 09:35:30 +01:00
0612433eef
add chipidea highspeed controller
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add warning to transdimension for the rename
2021-12-01 12:14:44 +07:00
a5f516893b
more with -Wcast-qual
2021-10-17 16:36:53 +07:00
e115e08728
add nxp_lpcopen as submodule
2021-04-28 18:11:49 +07:00
253430a765
add example specific DEPS_SUBMODULES
2021-03-18 16:28:44 +07:00
ed8f117dd1
explicitly add dcd source file without vendor/family
2021-03-17 16:52:07 +07:00
590d8d4d5c
rename FAMILY_SUBMODULES to DEPS_SUBMODULES
2021-03-04 22:53:02 +07:00
e1966f8d91
mcb1800 and lpc18s37 work well with both device and host demo
2021-03-03 17:29:30 +07:00
0dc1a3d3af
add lpc18 family
2021-03-03 16:03:21 +07:00
hathach