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passkey_fw
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add CPU_CORE for all family

This commit is contained in:
hathach 2023-06-24 18:38:41 +07:00
parent b59b65d2ed
commit eb7fcf1b74
No known key found for this signature in database
GPG Key ID: F5D50C6D51D17CBA
22 changed files with 24 additions and 135 deletions
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7
hw/bsp/lpc11/family.mk
View File

@ -2,12 +2,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
MCU_DIR = hw/mcu/nxp/lpcopen/lpc$(MCU)/lpc_chip_$(MCU)
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m0plus
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m0plus \
-nostdlib \
-D__USE_LPCOPEN \
-DCFG_TUSB_MCU=OPT_MCU_LPC11UXX \
@ -36,8 +34,5 @@ endif
INC += \
$(TOP)/$(MCU_DIR)/inc
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
# For flash-jlink target
JLINK_DEVICE = LPC11U68

7
hw/bsp/lpc13/family.mk
View File

@ -2,12 +2,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
MCU_DIR = hw/mcu/nxp/lpcopen/lpc13xx/lpc_chip_13xx
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m3
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m3 \
-nostdlib \
-DCORE_M3 \
-D__USE_LPCOPEN \
@ -34,6 +32,3 @@ SRC_C += \
INC += \
$(TOP)/$(MCU_DIR)/inc
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3

7
hw/bsp/lpc15/family.mk
View File

@ -1,12 +1,10 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m3
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m3 \
-nostdlib \
-DCORE_M3 \
-D__USE_LPCOPEN \
@ -34,6 +32,3 @@ SRC_C += \
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MCU_DIR)/inc
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3

7
hw/bsp/lpc17/family.mk
View File

@ -2,12 +2,10 @@ DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
MCU_DIR = hw/mcu/nxp/lpcopen/lpc175x_6x/lpc_chip_175x_6x
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m3
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m3 \
-nostdlib \
-DCORE_M3 \
-D__USE_LPCOPEN \
@ -35,6 +33,3 @@ SRC_C += \
INC += \
$(TOP)/$(MCU_DIR)/inc
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3

7
hw/bsp/lpc18/family.mk
View File

@ -1,12 +1,10 @@
DEPS_SUBMODULES += hw/mcu/nxp/lpcopen
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m3
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m3 \
-nostdlib \
-DCORE_M3 \
-D__USE_LPCOPEN \
@ -32,6 +30,3 @@ INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(MCU_DIR)/inc \
$(TOP)/$(MCU_DIR)/inc/config_18xx
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3

7
hw/bsp/lpc51/family.mk
View File

@ -3,12 +3,10 @@ DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
MCU_DIR = $(SDK_DIR)/devices/$(MCU)
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m0plus
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m0plus \
-DCFG_TUSB_MCU=OPT_MCU_LPC51UXX \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
@ -40,6 +38,3 @@ INC += \
SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0

9
hw/bsp/lpc54/family.mk
View File

@ -2,14 +2,10 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk
DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-DCFG_TUSB_MCU=OPT_MCU_LPC54XXX \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
@ -49,6 +45,3 @@ INC += \
$(TOP)/$(SDK_DIR)/drivers/lpc_gpio
SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F

9
hw/bsp/lpc55/family.mk
View File

@ -3,17 +3,13 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk
DEPS_SUBMODULES += lib/CMSIS_5 lib/sct_neopixel $(SDK_DIR)
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m33
# Default to Highspeed PORT1
PORT ?= 1
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m33 \
-mfloat-abi=hard \
-mfpu=fpv5-sp-d16 \
-DCFG_TUSB_MCU=OPT_MCU_LPC55XX \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \
-DBOARD_TUD_RHPORT=$(PORT)
@ -63,6 +59,3 @@ INC += \
SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM33_NTZ/non_secure

2
hw/bsp/mcx/family.mk
View File

@ -4,9 +4,7 @@ SDK_DIR = hw/mcu/nxp/mcux-sdk
DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m33
include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
# Default to Highspeed PORT1
PORT ?= 1

8
hw/bsp/mm32/family.mk
View File

@ -3,13 +3,10 @@ SDK_DIR = hw/mcu/mindmotion/mm32sdk
DEPS_SUBMODULES += lib/CMSIS_5 $(SDK_DIR)
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m3
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m3 \
-mfloat-abi=soft \
-nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_MM32F327X
@ -29,8 +26,5 @@ INC += \
$(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/Include \
$(TOP)/$(SDK_DIR)/mm32f327x/MM32F327x/HAL_Lib/Inc
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM3
# flash target using on-board
flash: flash-jlink

11
hw/bsp/msp432e4/family.mk
View File

@ -1,13 +1,11 @@
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/ti
#include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS += \
-flto \
-mthumb \
-mslow-flash-data \
-mabi=aapcs \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-D__MSP432E401Y__ \
-DCFG_TUSB_MCU=OPT_MCU_MSP432E4
@ -33,9 +31,6 @@ INC += \
SRC_S += $(MCU_DIR)/Source/startup_msp432e411y_gcc.S
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
# For flash-jlink target
JLINK_DEVICE = MSP432E401Y
JLINK_IF = SWD

1
hw/bsp/nrf/family.mk
View File

@ -5,7 +5,6 @@ include $(TOP)/$(BOARD_PATH)/board.mk
# nRF52 is cortex-m4, nRF53 is cortex-m33
CPU_CORE ?= cortex-m4
include $(TOP)/tools/make/cpu/$(CPU_CORE).mk
CFLAGS += \
-flto \

6
hw/bsp/ra/boards/ra4m1_ek/board.mk
View File

@ -1,8 +1,4 @@
CFLAGS += \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-DCFG_TUSB_MCU=OPT_MCU_RAXXX
CPU_CORE = cortex-m4
FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m1
FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m1_ek

6
hw/bsp/ra/boards/ra4m3_ek/board.mk
View File

@ -1,8 +1,4 @@
CFLAGS += \
-mcpu=cortex-m33 \
-mfloat-abi=hard \
-mfpu=fpv5-sp-d16 \
-DCFG_TUSB_MCU=OPT_MCU_RAXXX
CPU_CORE = cortex-m33
FSP_MCU_DIR = hw/mcu/renesas/fsp/ra/fsp/src/bsp/mcu/ra4m3
FSP_BOARD_DIR = hw/mcu/renesas/fsp/ra/board/ra4m3_ek

4
hw/bsp/ra/family.mk
View File

@ -1,11 +1,9 @@
DEPS_SUBMODULES += hw/mcu/renesas/fsp lib/CMSIS_5
# Cross Compiler for RA
CROSS_COMPILE = arm-none-eabi-
include $(TOP)/$(BOARD_PATH)/board.mk
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_RAXXX \
-Wno-error=undef \
-Wno-error=strict-prototypes \
-Wno-error=cast-align \

6
hw/bsp/samd11/family.mk
View File

@ -1,11 +1,10 @@
DEPS_SUBMODULES += hw/mcu/microchip
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m0plus
CFLAGS += \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m0plus \
-nostdlib -nostartfiles \
-DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
-DOSC32K_OVERWRITE_CALIBRATION=0 \
@ -40,6 +39,3 @@ INC += \
$(TOP)/hw/mcu/microchip/samd11/hri \
$(TOP)/hw/mcu/microchip/samd11/CMSIS/Include \
$(TOP)/hw/mcu/microchip/samd11/CMSIS/Core/Include
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0

7
hw/bsp/samd21/family.mk
View File

@ -2,12 +2,10 @@ UF2_FAMILY_ID = 0x68ed2b88
DEPS_SUBMODULES += hw/mcu/microchip
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m0plus
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m0plus \
-nostdlib -nostartfiles \
-DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
-DCFG_TUSB_MCU=OPT_MCU_SAMD21
@ -39,9 +37,6 @@ INC += \
$(TOP)/hw/mcu/microchip/samd21/hri \
$(TOP)/hw/mcu/microchip/samd21/CMSIS/Include
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
# flash using bossac at least version 1.8
# can be found in arduino15/packages/arduino/tools/bossac/
# Add it to your PATH or change BOSSAC variable to match your installation

9
hw/bsp/samd51/family.mk
View File

@ -2,14 +2,10 @@ UF2_FAMILY_ID = 0x55114460
DEPS_SUBMODULES += hw/mcu/microchip
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_SAMD51
@ -37,9 +33,6 @@ INC += \
$(TOP)/hw/mcu/microchip/samd51/hri \
$(TOP)/hw/mcu/microchip/samd51/CMSIS/Include
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
# flash using bossac at least version 1.8
# can be found in arduino15/packages/arduino/tools/bossac/
# Add it to your PATH or change BOSSAC variable to match your installation

8
hw/bsp/same5x/family.mk
View File

@ -2,14 +2,11 @@ DEPS_SUBMODULES += hw/mcu/microchip
SDK_DIR = hw/mcu/microchip/$(MCU)
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS += \
-mthumb \
-mabi=aapcs \
-mlong-calls \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_SAME5X
@ -32,9 +29,6 @@ INC += \
$(TOP)/$(SDK_DIR)/hri \
$(TOP)/$(SDK_DIR)/CMSIS/Include
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
# flash using edbg from https://github.com/ataradov/edbg
flash-edbg: $(BUILD)/$(PROJECT).bin
edbg --verbose -t $(MCU) -pv -f $<

12
hw/bsp/saml2x/family.mk
View File

@ -1,14 +1,11 @@
UF2_FAMILY_ID = 0x68ed2b88
DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/microchip
include $(TOP)/$(BOARD_PATH)/board.mk
MCU_DIR = hw/mcu/microchip/$(SAML_VARIANT)
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m0plus
CFLAGS += \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m0plus \
-nostdlib -nostartfiles \
-DCONF_OSC32K_CALIB_ENABLE=0 \
-DCFG_TUSB_MCU=OPT_MCU_SAML22
@ -41,9 +38,6 @@ INC += \
$(TOP)/$(MCU_DIR)/hri \
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
# flash using bossac at least version 1.8
# can be found in arduino15/packages/arduino/tools/bossac/
# Add it to your PATH or change BOSSAC variable to match your installation

9
hw/bsp/tm4c123/family.mk
View File

@ -1,14 +1,10 @@
DEPS_SUBMODULES += hw/mcu/ti
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-DCFG_TUSB_MCU=OPT_MCU_TM4C123 \
-uvectors \
-DTM4C123GH6PM
@ -31,6 +27,3 @@ SRC_C += \
src/portable/mentor/musb/hcd_musb.c \
$(MCU_DIR)/Source/system_TM4C123.c \
$(MCU_DIR)/Source/GCC/tm4c123_startup.c
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F

10
hw/bsp/xmc4000/family.mk
View File

@ -4,14 +4,10 @@ MCU_DIR = hw/mcu/infineon/mtb-xmclib-cat3
DEPS_SUBMODULES += $(MCU_DIR)
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS += \
-flto \
-mthumb \
-mabi=aapcs \
-mcpu=cortex-m4 \
-mfloat-abi=hard \
-mfpu=fpv4-sp-d16 \
-nostdlib -nostartfiles \
-DCFG_TUSB_MCU=OPT_MCU_XMC4000
@ -27,7 +23,6 @@ SRC_C += \
$(MCU_DIR)/XMCLib/src/xmc4_gpio.c \
$(MCU_DIR)/XMCLib/src/xmc4_scu.c
SRC_S += $(MCU_DIR)/CMSIS/Infineon/COMPONENT_$(MCU_VARIANT)/Source/TOOLCHAIN_GCC_ARM/startup_$(MCU_VARIANT).S
INC += \
@ -35,6 +30,3 @@ INC += \
$(TOP)/$(MCU_DIR)/CMSIS/Core/Include \
$(TOP)/$(MCU_DIR)/CMSIS/Infineon/COMPONENT_$(MCU_VARIANT)/Include \
$(TOP)/$(MCU_DIR)/XMCLib/inc
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F