Commit Graph

7446 Commits

Author SHA1 Message Date
Jerry Palacios 73122cd5f9 mcx family renamed as mcxn
MCXN and MCXA have different ARM Cortex M33 core, can't be on the same family
2024-02-09 09:36:58 -06:00
Jerry Palacios 8dc581247a Merge branch 'frdmmcxn947' into frdmmcxa153 2024-02-09 09:31:08 -06:00
Jerry Palacios 7369d1f36e Update family.c 2024-02-09 08:51:37 -06:00
Jerry Palacios 5b762e189c uart rx disabled 2024-02-08 16:25:41 -06:00
Jerry Palacios 2c766c4daf Update family.c 2024-02-08 12:43:13 -06:00
Jerry Palacios fa4314e0ce button commented 2024-02-08 11:55:01 -06:00
Jerry Palacios b9c6b22165 cortex m33+nodsp+nofpu make file created 2024-02-08 11:10:10 -06:00
Jerry Palacios 45454c53f1 frdmmcxa153 files added 2024-02-07 18:33:19 -06:00
Jerry Palacios bab25c2d56 nxp-sdk pointing to Wavenumber repo 2024-02-07 17:26:43 -06:00
Jerry Palacios 31c9176b2b frdmmcxn947 board added 2024-02-07 17:10:47 -06:00
Jerry Palacios 6c4a5292a6 Back to original 2024-02-07 17:03:13 -06:00
Jerry Palacios 17cd5e0952 Bunny brain board created, but not modified yet
Bunny brain board created, but not modified yet
2024-01-23 17:55:19 -06:00
Jerry Palacios 2fadc06412 BOARD_InitPins pinlist modification
BOARD_InitPins pinlist modification
2024-01-23 17:53:09 -06:00
Jerry Palacios fca0b44fa1 Update pin_mux.c 2024-01-23 17:10:21 -06:00
Jerry Palacios b3ce3e25eb Led pin configurations changed from P3_4 to P0_10 2024-01-23 17:09:19 -06:00
Jerry Palacios e819a28a8b frdm-mcxn947 folder created
frdm-mcxn947 folder created.
Led and button pin modified compared to mcxn947brk board
2024-01-23 16:49:44 -06:00
Ha Thach 938cae818f
Merge pull request #2417 from hathach/serialhost-change-ftdi-cp210x-pid-list
change serila host FTDI/CP210X pid list to vid/pid list
2024-01-16 01:45:41 +07:00
hathach aa58cdcfa6
change CFG_TUH_CDC_FTDI/CP210X_PID_LIST to CFG_TUH_CDC_FTDI/CP210X_VID_PID_LIST which contains both vid and pid. 2024-01-16 01:28:29 +07:00
Ha Thach 4b3b401ce3
Merge pull request #2401 from Ryzee119/ohci_more_dev
[OHCI] Allow more than 16 devices
2024-01-12 17:48:01 +07:00
Ha Thach 39f397e25c
Merge pull request #2412 from hathach/change-weak-event-hook-style
change tuh_event_hook_cb, tud_event_hook_cb to weak default implementation
2024-01-12 16:22:09 +07:00
hathach 8eca596fa6
style changes 2024-01-12 16:05:35 +07:00
hathach 290f4bea91
- change tuh_event_hook_cb, tud_event_hook_cb to weak default implementation
- change code style
2024-01-12 15:47:08 +07:00
Ha Thach 858077483d
Merge pull request #2239 from XelaRellum/bugfix_stm32_fsdev_keil
Fixes #1018 the weak dcd_edpt0_status_complete for Keil Compiler
2024-01-12 15:26:02 +07:00
Ha Thach 71ce4b8be6
Merge pull request #2402 from Okarss/master
[STM32 FSDEV] Fix ISR race conditions
2024-01-12 10:26:52 +07:00
Okarss 2d3d148912 [STM32 FSDEV] Align names for consistency 2024-01-11 21:02:14 +02:00
Ha Thach 5002ce8798
Merge pull request #2382 from YixingShen/master
fixed device/video_capture/src/images.h,main.c CFG_EXAMPLE_VIDEO_DISA…
2024-01-12 00:58:32 +07:00
hathach ab7538d93a
fix build with f1 without uart 2024-01-11 23:56:04 +07:00
Ha Thach 7db9119ef3
Merge pull request #2411 from IngHK/cdch_vendor_class
[cdch] replaced vendor specific bInterfaceClass number by define
2024-01-11 22:53:21 +07:00
hathach e68c6658c9 move gtd extra out of control struct to save sram
also rename gtd_data to gtd_extra
2024-01-11 17:35:05 +07:00
hathach 3349e40276 add cmake support for lpc17 2024-01-11 17:32:21 +07:00
IngHK c619a86141 bInterfaceClass number replaced by define 2024-01-11 08:53:47 +01:00
Ha Thach f2f40c0965
Merge pull request #2400 from Ryzee119/hub_fix
[HUB] Fix double status xfer
2024-01-11 12:39:18 +07:00
Ha Thach b7581f0995
Merge pull request #2404 from Ryzee119/patch-2
[HUB] Prevent status request to invalid ep_num
2024-01-11 12:34:54 +07:00
Ha Thach b5d5ae9b18
Merge pull request #2408 from leptun/fix_tickless_ulpi_gating
Disable ULPI clock during sleep on stm32f7 when using internal phy
2024-01-11 11:40:44 +07:00
Okarss 545821399b [STM32 FSDEV] Introduce a typedef for bus access width 2024-01-11 00:59:39 +02:00
Alex Voinea 3bf6826451
Disable ULPI clock during sleep on stm32f7 when using internal phy 2024-01-10 10:27:21 +01:00
Ryzee119 e7e19f5627 [OHCI] Allow more than 16 devices 2024-01-10 16:03:43 +10:30
Okarss 0d4b24e56c [STM32 FSDEV] Fix ISR race conditions 2024-01-10 05:43:20 +02:00
Ha Thach cf306ed913
Merge pull request #2406 from IngHK/move_acm_open
[CDC] host: moved acm_open to other acm prototypes
2024-01-09 18:30:44 +07:00
IngHK 91f65a36bf [CDC] host: moved acm_open to other acm prototypes 2024-01-09 09:53:54 +01:00
Ryzee119 d39d06e6d9 [HUB] Prevent status request to invalid ep_num 2024-01-09 16:36:32 +10:30
Ryzee119 a4aa454a7a [HUB] Fix double status xfer 2024-01-07 08:34:18 +10:30
沈玴興 149b50a2fa
Merge branch 'hathach:master' into master 2023-12-28 00:29:41 +08:00
YixingShen 9a1559a356 add __ARM_ARCH_8_1M_MAIN__ for M55 2023-12-28 00:28:24 +08:00
Ha Thach ae364b1460
Merge pull request #2390 from hathach/max3421e-support-rp2040
support max3421e for rp2040
2023-12-26 23:10:32 +07:00
hathach 551e47a464
allow rp2040 to use max3421e as host controller
- fix warnings build hcd max3421 with rp2040
- add tinyusb_host_max3421 target for rp2040 cmake, -DMAX3421_HOST=1
will enable this
- add max3421 driver implementation for rp2040 family
- update tusb_config for host to allow easy enable host selection for
rp2040 (default/pio-usb/max3421)
2023-12-26 22:50:01 +07:00
hathach a01d6d8b31
tested other ports with featherwing max3421, change cs, intr pin to D10, D9 2023-12-26 21:13:43 +07:00
YixingShen 1117880411 add high speed into examples\device\video_capture 2023-12-24 00:27:36 +08:00
Ha Thach 804f6718ed
Merge pull request #2385 from kasjer/kasjer/nrf5x-fix-dcd_edpt_open-for-iso
dcd_nrf5x: Fix dcd_edpt_open for iso endpoint
2023-12-21 15:53:11 +07:00
Jerzy Kasenberg 7f84fe9bda dcd_nrf5x: Fix dcd_edpt_open for iso endpoint
When ISO endpoint handling was introduced two lines that
clear stall and data toggle bit were left unchanged and they
were effective for ISO enadpoint as well.
This is incorrect behavior since EPSTALL and DTOGGLE registers
have only 3 bits for address.
Leaving code that clears toggle bit results in endpoint 0 toggle bit
being reset when iso endpoint (8) is opened.

Now code that clears stall and toggle bit is applied to non-iso endpoint only
as it was done before iso handling was introduced.
2023-12-21 08:48:59 +01:00