Commit Graph

13 Commits

Author SHA1 Message Date
hathach eb7fcf1b74
add CPU_CORE for all family 2023-06-24 18:38:41 +07:00
hathach 1ed04ad05d
update mm32sdk with idndef for SYSCLK_FREQ_XXMHz and SYSCLK_HSI_XXMHz
add HSE_VALUE define for each board with 8mhz, 12mhz accordingly
2023-03-17 19:46:22 +07:00
hathach b3ecf82196
whitespace 2023-03-17 19:31:45 +07:00
Koen De Vleeschauwer 899e7cc4f9 add board: DshanMCU Pitaya Lite 2023-03-17 19:31:06 +07:00
hathach 3623ba1884
fix trailing space and new line
temporarily disable codespell
2023-03-17 16:12:49 +07:00
hathach ffdffc7e06
rename FREERTOS_PORT to FREERTOS_PORTABLE_SRC
also fix trailing spaces
2023-03-16 23:11:11 +07:00
hathach 05e0205ad0
Merge branch 'master' into renesas-ra 2023-03-08 21:05:06 +07:00
Bastien Nocera 6a2cf67289 Fix typos 2022-12-04 19:43:23 +07:00
hathach 4f6e770eda
add more warning option, also fix -Wconversion with rp2040
-Wuninitialized, -Wunused,  -Wredundant-decls
2022-06-24 19:46:19 +07:00
Rafael Silva 2a17a7e8f8 rework make freertos port handling
this allows ports to specify a freertos port outside the FreeRTOS-Kernel lib directory, which would otherwise not be possible

Signed-off-by: Rafael Silva <rafaelsilva@ajtec.pt>
2022-06-02 09:35:30 +01:00
hathach a5f516893b more with -Wcast-qual 2021-10-17 16:36:53 +07:00
hathach 82618d2d5f fix build with mm32 board 2021-06-18 17:18:11 +07:00
zhangslice 0ae83458d5 dsp updata
Signed-off-by: zhangslice <1304224508@qq.com>
2021-06-18 12:46:27 +07:00