prototype produced
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@ -64,7 +64,7 @@ version
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working version
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A:
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first prototype built using CircuitPro + ProtoMat S63
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first scrape prototype built using CircuitPro + ProtoMat S63
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bugs:
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- the hole for the USB and header pins are too wide. I hope it would create some through hole plating thanks to capillarity, but it didn't
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- wider vias annulus would be a good idea
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@ -73,3 +73,8 @@ bugs:
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- the 3.3 V on DTR can not drive the pMOS because it's switching 5.0 V, but V_GS < 1.1 V
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- decoupling capacitors on the serial lines should improve the quality
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- try if with less feritte beads and decoupling capacaitors PLL still works
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B:
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first cape prototype built using CircuitPro + ProtoMat S63
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bugs:
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- I used nMOS instead of pMOS, which won't work because the power connection on the phone shares ground with UART
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@ -1 +1 @@
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0
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B
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