5516 lines
686 KiB
XML
5516 lines
686 KiB
XML
<!DOCTYPE Register_Definition_File>
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<Processor name="LPC13Uxx" description="LPC1315/16/17/35/36/37 Cortex-M3 MCU; up to 64 kB flash; up to 12 kB SRAM; USB device; USART; EEPROM">
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<RegisterGroup name="I2C" start="0x40000000" description="I2C">
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<Register start="+0x000" size="4" name="CONSET" access="Read/Write" description="I2C Control Set Register. When a one is written to a bit of this register, the corresponding bit in the I2C control register is set. Writing a zero has no effect on the corresponding bit in the I2C control register." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="2" name="RESERVED" description="Reserved. User software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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<BitField start="2" size="1" name="AA" description="Assert acknowledge flag." />
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<BitField start="3" size="1" name="SI" description="I2C interrupt flag." />
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<BitField start="4" size="1" name="STO" description="STOP flag." />
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<BitField start="5" size="1" name="STA" description="START flag." />
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<BitField start="6" size="1" name="I2EN" description="I2C interface enable." />
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<BitField start="7" size="25" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x004" size="4" name="STAT" access="ReadOnly" description="I2C Status Register. During I2C operation, this register provides detailed status codes that allow software to determine the next action needed." reset_value="0xF8" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="3" name="RESERVED" description="These bits are unused and are always 0." />
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<BitField start="3" size="5" name="Status" description="These bits give the actual status information about the I2C interface." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x008" size="4" name="DAT" access="Read/Write" description="I2C Data Register. During master or slave transmit mode, data to be transmitted is written to this register. During master or slave receive mode, data that has been received may be read from this register." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="8" name="Data" description="This register holds data values that have been received or are to be transmitted." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x00C" size="4" name="ADR0" access="Read/Write" description="I2C Slave Address Register 0. Contains the 7-bit slave address for operation of the I2C interface in slave mode, and is not used in master mode. The least significant bit determines whether a slave responds to the General Call address." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="GC" description="General Call enable bit." />
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<BitField start="1" size="7" name="Address" description="The I2C device address for slave mode." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x010" size="4" name="SCLH" access="Read/Write" description="SCH Duty Cycle Register High Half Word. Determines the high time of the I2C clock." reset_value="0x04" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="16" name="SCLH" description="Count for SCL HIGH time period selection." />
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<BitField start="16" size="16" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x014" size="4" name="SCLL" access="Read/Write" description="SCL Duty Cycle Register Low Half Word. Determines the low time of the I2C clock. I2nSCLL and I2nSCLH together determine the clock frequency generated by an I2C master and certain times used in slave mode." reset_value="0x04" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="16" name="SCLL" description="Count for SCL low time period selection." />
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<BitField start="16" size="16" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x018" size="4" name="CONCLR" access="WriteOnly" description="I2C Control Clear Register. When a one is written to a bit of this register, the corresponding bit in the I2C control register is cleared. Writing a zero has no effect on the corresponding bit in the I2C control register." reset_value="0" reset_mask="0x00000000">
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<BitField start="0" size="2" name="RESERVED" description="Reserved. User software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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<BitField start="2" size="1" name="AAC" description="Assert acknowledge Clear bit." />
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<BitField start="3" size="1" name="SIC" description="I2C interrupt Clear bit." />
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<BitField start="4" size="1" name="RESERVED" description="Reserved. User software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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<BitField start="5" size="1" name="STAC" description="START flag Clear bit." />
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<BitField start="6" size="1" name="I2ENC" description="I2C interface Disable bit." />
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<BitField start="7" size="1" name="RESERVED" description="Reserved. User software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x01C" size="4" name="MMCTRL" access="Read/Write" description="Monitor mode control register." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="MM_ENA" description="Monitor mode enable.">
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<Enum name="MONITOR_MODE_DISABLE" start="0" description="Monitor mode disabled." />
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<Enum name="THE_I2C_MODULE_WILL_" start="1" description="The I2C module will enter monitor mode. In this mode the SDA output will be forced high. This will prevent the I2C module from outputting data of any kind (including ACK) onto the I 2C data bus. Depending on the state of the ENA_SCL bit, the output may be also forced high, preventing the module from having control over the I2C clock line." />
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</BitField>
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<BitField start="1" size="1" name="ENA_SCL" description="SCL output enable.">
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<Enum name="HIGH" start="0" description="When this bit is cleared to 0, the SCL output will be forced high when the module is in monitor mode. As described above, this will prevent the module from having any control over the I2C clock line." />
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<Enum name="NORMAL" start="1" description="When this bit is set, the I2C module may exercise the same control over the clock line that it would in normal operation. This means that, acting as a slave peripheral, the I2C module can stretch the clock line (hold it low) until it has had time to respond to an I2C interrupt.[1]" />
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</BitField>
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<BitField start="2" size="1" name="MATCH_ALL" description="Select interrupt register match.">
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<Enum name="MATCH" start="0" description="When this bit is cleared, an interrupt will only be generated when a match occurs to one of the (up-to) four address registers described above. That is, the module will respond as a normal slave as far as address-recognition is concerned." />
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<Enum name="ANYADDRESS" start="1" description="When this bit is set to 1 and the I2C is in monitor mode, an interrupt will be generated on ANY address received. This will enable the part to monitor all traffic on the bus." />
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</BitField>
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<BitField start="3" size="29" name="RESERVED" description="Reserved. The value read from reserved bits is not defined." />
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</Register>
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<Register start="+0x020+0" size="4" name="ADR1" access="Read/Write" description="I2C Slave Address Register. Contains the 7-bit slave address for operation of the I2C interface in slave mode, and is not used in master mode. The least significant bit determines whether a slave responds to the General Call address." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="GC" description="General Call enable bit." />
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<BitField start="1" size="7" name="Address" description="The I2C device address for slave mode." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x020+4" size="4" name="ADR2" access="Read/Write" description="I2C Slave Address Register. Contains the 7-bit slave address for operation of the I2C interface in slave mode, and is not used in master mode. The least significant bit determines whether a slave responds to the General Call address." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="GC" description="General Call enable bit." />
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<BitField start="1" size="7" name="Address" description="The I2C device address for slave mode." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x020+8" size="4" name="ADR3" access="Read/Write" description="I2C Slave Address Register. Contains the 7-bit slave address for operation of the I2C interface in slave mode, and is not used in master mode. The least significant bit determines whether a slave responds to the General Call address." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="GC" description="General Call enable bit." />
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<BitField start="1" size="7" name="Address" description="The I2C device address for slave mode." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x02C" size="4" name="DATA_BUFFER" access="ReadOnly" description="Data buffer register. The contents of the 8 MSBs of the I2DAT shift register will be transferred to the DATA_BUFFER automatically after every nine bits (8 bits of data plus ACK or NACK) has been received on the bus." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="8" name="Data" description="This register holds contents of the 8 MSBs of the DAT shift register." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x030+0" size="4" name="MASK0" access="Read/Write" description="I2C Slave address mask register. This mask register is associated with I2ADR0 to determine an address match. The mask register has no effect when comparing to the General Call address (0000000)." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="RESERVED" description="Reserved. User software should not write ones to reserved bits. This bit reads always back as 0." />
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<BitField start="1" size="7" name="MASK" description="Mask bits." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from reserved bits is undefined." />
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</Register>
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<Register start="+0x030+4" size="4" name="MASK1" access="Read/Write" description="I2C Slave address mask register. This mask register is associated with I2ADR0 to determine an address match. The mask register has no effect when comparing to the General Call address (0000000)." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="RESERVED" description="Reserved. User software should not write ones to reserved bits. This bit reads always back as 0." />
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<BitField start="1" size="7" name="MASK" description="Mask bits." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from reserved bits is undefined." />
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</Register>
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<Register start="+0x030+8" size="4" name="MASK2" access="Read/Write" description="I2C Slave address mask register. This mask register is associated with I2ADR0 to determine an address match. The mask register has no effect when comparing to the General Call address (0000000)." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="RESERVED" description="Reserved. User software should not write ones to reserved bits. This bit reads always back as 0." />
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<BitField start="1" size="7" name="MASK" description="Mask bits." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from reserved bits is undefined." />
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</Register>
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<Register start="+0x030+12" size="4" name="MASK3" access="Read/Write" description="I2C Slave address mask register. This mask register is associated with I2ADR0 to determine an address match. The mask register has no effect when comparing to the General Call address (0000000)." reset_value="0x00" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="RESERVED" description="Reserved. User software should not write ones to reserved bits. This bit reads always back as 0." />
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<BitField start="1" size="7" name="MASK" description="Mask bits." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved. The value read from reserved bits is undefined." />
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</Register>
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</RegisterGroup>
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<RegisterGroup name="WWDT" start="0x40004000" description="Windowed Watchdog Timer (WWDT) ">
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<Register start="+0x000" size="4" name="MOD" access="Read/Write" description="Watchdog mode register. This register contains the basic mode and status of the Watchdog Timer." reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="WDEN" description="Watchdog enable bit. Once this bit has been written with a 1 it cannot be rewritten with a 0.">
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<Enum name="STOPPED" start="0" description="The watchdog timer is stopped." />
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<Enum name="RUNNING" start="1" description="The watchdog timer is running." />
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</BitField>
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<BitField start="1" size="1" name="WDRESET" description="Watchdog reset enable bit. Once this bit has been written with a 1 it cannot be rewritten with a 0.">
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<Enum name="INTERRUPT" start="0" description="A watchdog timeout will not cause a chip reset." />
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<Enum name="RESET" start="1" description="A watchdog timeout will cause a chip reset." />
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</BitField>
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<BitField start="2" size="1" name="WDTOF" description="Watchdog time-out flag. Set when the watchdog timer times out, by a feed error, or by events associated with WDPROTECT. Cleared by software. Causes a chip reset if WDRESET = 1." />
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<BitField start="3" size="1" name="WDINT" description="Warning interrupt flag. Set when the timer reaches the value in WDWARNINT. Cleared by software." />
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<BitField start="4" size="1" name="WDPROTECT" description="Watchdog update mode. This bit can be set once by software and is only cleared by a reset.">
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<Enum name="NOT_LOCKED" start="0" description="The watchdog time-out value (TC) can be changed at any time." />
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<Enum name="LOCKED" start="1" description="The watchdog time-out value (TC) can be changed only after the counter is below the value of WDWARNINT and WDWINDOW." />
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</BitField>
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<BitField start="5" size="1" name="LOCK" description="A 1 in this bit prevents disabling or powering down the clock source selected by bit 0 of the WDCLKSRC register and also prevents switching to a clock source that is disabled or powered down. This bit can be set once by software and is only cleared by any reset. If this bit is one and the WWDT clock source is the IRC when Deep-sleep or Power-down modes are entered, the IRC remains running thereby increasing power consumption in Deep-sleep mode and potentially preventing the part of entering Power-down mode correctly (see Section 15.7)." />
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<BitField start="6" size="26" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x004" size="4" name="TC" access="Read/Write" description="Watchdog timer constant register. This 24-bit register determines the time-out value." reset_value="0xFF" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="24" name="COUNT" description="Watchdog time-out value." />
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<BitField start="24" size="8" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x008" size="4" name="FEED" access="WriteOnly" description="Watchdog feed sequence register. Writing 0xAA followed by 0x55 to this register reloads the Watchdog timer with the value contained in WDTC." reset_value="0" reset_mask="0x00000000">
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<BitField start="0" size="8" name="FEED" description="Feed value should be 0xAA followed by 0x55." />
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<BitField start="8" size="24" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x00C" size="4" name="TV" access="ReadOnly" description="Watchdog timer value register. This 24-bit register reads out the current value of the Watchdog timer." reset_value="0xFF" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="24" name="COUNT" description="Counter timer value." />
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<BitField start="24" size="8" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x010" size="4" name="CLKSEL" access="Read/Write" description="Watchdog clock select register." reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="CLKSEL" description="Selects source of WDT clock">
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<Enum name="IRC" start="0" description="IRC" />
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<Enum name="WATCHDOG_OSCILLATOR_" start="1" description="Watchdog oscillator (WDOSC)" />
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</BitField>
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<BitField start="1" size="30" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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<BitField start="31" size="1" name="LOCK" description="If this bit is set to one writing to this register does not affect bit 0. The clock source can only be changed by first clearing this bit, then writing the new value of bit 0." />
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</Register>
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<Register start="+0x014" size="4" name="WARNINT" access="Read/Write" description="Watchdog Warning Interrupt compare value." reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="10" name="WARNINT" description="Watchdog warning interrupt compare value." />
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<BitField start="10" size="22" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x018" size="4" name="WINDOW" access="Read/Write" description="Watchdog Window compare value." reset_value="0xFFFFFF" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="24" name="WINDOW" description="Watchdog window value." />
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<BitField start="24" size="8" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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</Register>
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</RegisterGroup>
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<RegisterGroup name="CT16B0" start="0x4000C000" description="16-bit counter/timers CT16B0">
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<Register start="+0x000" size="4" name="IR" access="Read/Write" description="Interrupt Register. The IR can be written to clear interrupts. The IR can be read to identify which of eight possible interrupt sources are pending." reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="MR0INT" description="Interrupt flag for match channel 0." />
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<BitField start="1" size="1" name="MR1INT" description="Interrupt flag for match channel 1." />
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<BitField start="2" size="1" name="MR2INT" description="Interrupt flag for match channel 2." />
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<BitField start="3" size="1" name="MR3INT" description="Interrupt flag for match channel 3." />
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<BitField start="4" size="1" name="CR0INT" description="Interrupt flag for capture channel 0 event." />
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<BitField start="5" size="1" name="RESERVED" description="Reserved." />
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<BitField start="6" size="1" name="CR1INT" description="Interrupt flag for capture channel 1 event." />
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<BitField start="7" size="25" name="RESERVED" description="Reserved" />
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</Register>
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<Register start="+0x004" size="4" name="TCR" access="Read/Write" description="Timer Control Register. The TCR is used to control the Timer Counter functions. The Timer Counter can be disabled or reset through the TCR." reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="CEN" description="Counter enable.">
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<Enum name="THE_COUNTERS_ARE_DIS" start="0" description="The counters are disabled." />
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<Enum name="THE_TIMER_COUNTER_AN" start="1" description="The Timer Counter and Prescale Counter are enabled for counting." />
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</BitField>
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<BitField start="1" size="1" name="CRST" description="Counter reset.">
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<Enum name="DO_NOTHING_" start="0" description="Do nothing." />
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<Enum name="THE_TIMER_COUNTER_AN" start="1" description="The Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR[1] is returned to zero." />
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</BitField>
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<BitField start="2" size="30" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
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</Register>
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<Register start="+0x008" size="4" name="TC" access="Read/Write" description="Timer Counter. The 16-bit TC is incremented every PR+1 cycles of PCLK. The TC is controlled through the TCR." reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="16" name="TC" description="Timer counter value." />
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<BitField start="16" size="16" name="RESERVED" description="Reserved." />
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</Register>
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<Register start="+0x00C" size="4" name="PR" access="Read/Write" description="Prescale Register. When the Prescale Counter (below) is equal to this value, the next clock increments the TC and clears the PC." reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="16" name="PCVAL" description="Prescale value." />
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<BitField start="16" size="16" name="RESERVED" description="Reserved." />
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</Register>
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<Register start="+0x010" size="4" name="PC" access="Read/Write" description="Prescale Counter. The 16-bit PC is a counter which is incremented to the value stored in PR. When the value in PR is reached, the TC is incremented and the PC is cleared. The PC is observable and controllable through the bus interface." reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="16" name="PC" description="Prescale counter value." />
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<BitField start="16" size="16" name="RESERVED" description="Reserved." />
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</Register>
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<Register start="+0x014" size="4" name="MCR" access="Read/Write" description="Match Control Register. The MCR is used to control if an interrupt is generated and if the TC is reset when a Match occurs." reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="MR0I" description="Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC.">
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<Enum name="ENABLED" start="1" description="Enabled" />
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<Enum name="DISABLED" start="0" description="Disabled" />
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</BitField>
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<BitField start="1" size="1" name="MR0R" description="Reset on MR0: the TC will be reset if MR0 matches it.">
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<Enum name="ENABLED" start="1" description="Enabled" />
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<Enum name="DISABLED" start="0" description="Disabled" />
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</BitField>
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<BitField start="2" size="1" name="MR0S" description="Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches the TC.">
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<Enum name="ENABLED" start="1" description="Enabled" />
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<Enum name="DISABLED" start="0" description="Disabled" />
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</BitField>
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<BitField start="3" size="1" name="MR1I" description="Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC.">
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<Enum name="ENABLED" start="1" description="Enabled" />
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<Enum name="DISABLED" start="0" description="Disabled" />
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</BitField>
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<BitField start="4" size="1" name="MR1R" description="Reset on MR1: the TC will be reset if MR1 matches it.">
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<Enum name="ENABLED" start="1" description="Enabled" />
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<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="MR1S" description="Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="MR2I" description="Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="MR2R" description="Reset on MR2: the TC will be reset if MR2 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="MR2S" description="Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="MR3I" description="Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="10" size="1" name="MR3R" description="Reset on MR3: the TC will be reset if MR3 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="11" size="1" name="MR3S" description="Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="12" size="20" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x018+0" size="4" name="MR0" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="MATCH" description="Timer counter match value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x018+4" size="4" name="MR1" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="MATCH" description="Timer counter match value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x018+8" size="4" name="MR2" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="MATCH" description="Timer counter match value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x018+12" size="4" name="MR3" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="MATCH" description="Timer counter match value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x028" size="4" name="CCR" access="Read/Write" description="Capture Control Register. The CCR controls which edges of the capture inputs are used to load the Capture Registers and whether or not an interrupt is generated when a capture takes place." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="CAP0RE" description="Capture on CT16B0_CAP0 rising edge: a sequence of 0 then 1 on CT16B0_CAP0 will cause CR0 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="CAP0FE" description="Capture on CT16B0_CAP0 falling edge: a sequence of 1 then 0 on CT16B0_CAP0 will cause CR0 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="CAP0I" description="Interrupt on CT16B0_CAP0 event: a CR0 load due to a CT16B0_CAP0 event will generate an interrupt.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="4" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="5" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="6" size="1" name="CAP1RE" description="Capture on CT16B0_CAP1 rising edge: a sequence of 0 then 1 on CT16B0_CAP1 will cause CR1 to be loaded with the contents of TC. This bit is reserved for 16-bit timer1 CT16B1.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="CAP1FE" description="Capture on CT16B0_CAP1 falling edge: a sequence of 1 then 0 on CT16B0_CAP1 will cause CR1 to be loaded with the contents of TC. This bit is reserved for 16-bit timer1 CT16B1.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="CAP1I" description="Interrupt on CT16B0_CAP1 event: a CR1 load due to a CT16B0_CAP1 event will generate an interrupt. This bit is reserved for 16-bit timer1 CT16B1.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="9" size="23" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x02C" size="4" name="CR0" access="ReadOnly" description="Capture Register 0. CR0 is loaded with the value of TC when there is an event on the CT16B0_CAP0 input." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="CAP" description="Timer counter capture value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x034" size="4" name="CR1" access="ReadOnly" description="Capture Register 1. CR1 is loaded with the value of TC when there is an event on the CT16B0_CAP1 input." reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="16" name="CAP" description="Timer counter capture value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x03C" size="4" name="EMR" access="Read/Write" description="External Match Register. The EMR controls the match function and the external match pins CT16B0_MAT[1:0] and CT16B1_MAT[1:0]." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="EM0" description="External Match 0. This bit reflects the state of output CT16B0_MAT0/CT16B1_MAT0, whether or not this output is connected to its pin. When a match occurs between the TC and MR0, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[5:4] control the functionality of this output. This bit is driven to the CT16B0_MAT0/CT16B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="1" size="1" name="EM1" description="External Match 1. This bit reflects the state of output CT16B0_MAT1/CT16B1_MAT1, whether or not this output is connected to its pin. When a match occurs between the TC and MR1, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[7:6] control the functionality of this output. This bit is driven to the CT16B0_MAT0/CT16B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="2" size="1" name="EM2" description="External Match 2. This bit reflects the state of match channel 2. When a match occurs between the TC and MR2, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[9:8] control the functionality of this output." />
|
|
<BitField start="3" size="1" name="EM3" description="External Match 3. This bit reflects the state of output of match channel 3. When a match occurs between the TC and MR3, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[11:10] control the functionality of this output." />
|
|
<BitField start="4" size="2" name="EMC0" description="External Match Control 0. Determines the functionality of External Match 0. Table 296 shows the encoding of these bits.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT0 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT16Bn_MAT0 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="6" size="2" name="EMC1" description="External Match Control 1. Determines the functionality of External Match 1.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT1 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT16Bn_MAT1 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="8" size="2" name="EMC2" description="External Match Control 2. Determines the functionality of External Match 2.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT2 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT16Bn_MAT2 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="10" size="2" name="EMC3" description="External Match Control 3. Determines the functionality of External Match 3.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT3 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT16Bn_MAT3 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="12" size="20" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x070" size="4" name="CTCR" access="Read/Write" description="Count Control Register. The CTCR selects between Timer and Counter mode, and in Counter mode selects the signal and edge(s) for counting." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="CTM" description="Counter/Timer Mode. This field selects which rising PCLK edges can increment Timer's Prescale Counter (PC), or clear PC and increment Timer Counter (TC). If Counter mode is selected in the CTCR, bits 2:0 in the Capture Control Register (CCR) must be programmed as 000.">
|
|
<Enum name="TIMER_MODE_EVERY_RI" start="0x0" description="Timer Mode: every rising PCLK edge" />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x1" description="Counter Mode: TC is incremented on rising edges on the CAP input selected by bits 3:2." />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x2" description="Counter Mode: TC is incremented on falling edges on the CAP input selected by bits 3:2." />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x3" description="Counter Mode: TC is incremented on both edges on the CAP input selected by bits 3:2." />
|
|
</BitField>
|
|
<BitField start="2" size="2" name="CIS" description="Count Input Select. In counter mode (when bits 1:0 in this register are not 00), these bits select which CAP pin or comparator output is sampled for clocking. Values 0x1 and 0x3 are reserved.">
|
|
<Enum name="CT16B0_CAP0_" start="0x0" description="CT16B0_CAP0." />
|
|
<Enum name="RESERVED_" start="0x1" description="Reserved." />
|
|
<Enum name="CT16B0_CAP1_" start="0x2" description="CT16B0_CAP1." />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="ENCC" description="Setting this bit to 1 enables clearing of the timer and the prescaler when the capture-edge event specified in bits 7:5 occurs." />
|
|
<BitField start="5" size="3" name="SELCC" description="Edge select. When bit 4 is 1, these bits select which capture input edge will cause the timer and prescaler to be cleared. These bits have no effect when bit 4 is low. Values 0x2 to 0x3 and 0x6 to 0x7 are reserved.">
|
|
<Enum name="RISING_EDGE_OF_CT16B" start="0x0" description="Rising Edge of CT16B0_CAP0 clears the timer (if bit 4 is set)." />
|
|
<Enum name="FALLING_EDGE_OF_CT16" start="0x1" description="Falling Edge of CT16B0_CCAP0 clears the timer (if bit 4 is set)." />
|
|
<Enum name="RESERVED_" start="0x2" description="Reserved." />
|
|
<Enum name="RESERVED_" start="0x3" description="Reserved." />
|
|
<Enum name="RISING_EDGE_OF_CT16B" start="0x4" description="Rising Edge of CT16B0_CAP1 clears the timer (if bit 4 is set)." />
|
|
<Enum name="FALLING_EDGE_OF_CT16" start="0x5" description="Falling Edge of CT16B0_CAP1 clears the timer (if bit 4 is set)." />
|
|
</BitField>
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x074" size="4" name="PWMC" access="Read/Write" description="PWM Control Register. The PWMCON enables PWM mode for the external match pins CT16B0_MAT[1:0] and CT16B1_MAT[1:0]." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="PWMEN0" description="PWM mode enable for channel0.">
|
|
<Enum name="CT16BN_MAT0_IS_CONTR" start="0" description="CT16Bn_MAT0 is controlled by EM0." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT16Bn_MAT0." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="PWMEN1" description="PWM mode enable for channel1.">
|
|
<Enum name="CT16BN_MAT01_IS_CONT" start="0" description="CT16Bn_MAT01 is controlled by EM1." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT16Bn_MAT1." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="PWMEN2" description="PWM mode enable for channel2.">
|
|
<Enum name="CT16BN_MAT2_IS_CONTR" start="0" description="CT16Bn_MAT2 is controlled by EM2." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT16Bn_MAT2." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="PWMEN3" description="PWM mode enable for channel3.">
|
|
<Enum name="CT16BN_MAT3_IS_CONTR" start="0" description="CT16Bn_MAT3 is controlled by EM3." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT16Bn_MAT3." />
|
|
</BitField>
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="CT16B1" start="0x40010000" description="16-bit counter/timers CT16B1">
|
|
<Register start="+0x000" size="4" name="IR" access="Read/Write" description="Interrupt Register. The IR can be written to clear interrupts. The IR can be read to identify which of eight possible interrupt sources are pending." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="MR0INT" description="Interrupt flag for match channel 0." />
|
|
<BitField start="1" size="1" name="MR1INT" description="Interrupt flag for match channel 1." />
|
|
<BitField start="2" size="1" name="MR2INT" description="Interrupt flag for match channel 2." />
|
|
<BitField start="3" size="1" name="MR3INT" description="Interrupt flag for match channel 3." />
|
|
<BitField start="4" size="1" name="CR0INT" description="Interrupt flag for capture channel 0 event." />
|
|
<BitField start="5" size="1" name="CR1INT" description="Interrupt flag for capture channel 1 event." />
|
|
<BitField start="6" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="7" size="25" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="TCR" access="Read/Write" description="Timer Control Register. The TCR is used to control the Timer Counter functions. The Timer Counter can be disabled or reset through the TCR." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="CEN" description="Counter enable.">
|
|
<Enum name="THE_COUNTERS_ARE_DIS" start="0" description="The counters are disabled." />
|
|
<Enum name="THE_TIMER_COUNTER_AN" start="1" description="The Timer Counter and Prescale Counter are enabled for counting." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="CRST" description="Counter reset.">
|
|
<Enum name="DO_NOTHING_" start="0" description="Do nothing." />
|
|
<Enum name="THE_TIMER_COUNTER_AN" start="1" description="The Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR[1] is returned to zero." />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="TC" access="Read/Write" description="Timer Counter. The 16-bit TC is incremented every PR+1 cycles of PCLK. The TC is controlled through the TCR." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="TC" description="Timer counter value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="PR" access="Read/Write" description="Prescale Register. When the Prescale Counter (below) is equal to this value, the next clock increments the TC and clears the PC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="PCVAL" description="Prescale value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="PC" access="Read/Write" description="Prescale Counter. The 16-bit PC is a counter which is incremented to the value stored in PR. When the value in PR is reached, the TC is incremented and the PC is cleared. The PC is observable and controllable through the bus interface." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="PC" description="Prescale counter value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="MCR" access="Read/Write" description="Match Control Register. The MCR is used to control if an interrupt is generated and if the TC is reset when a Match occurs." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="MR0I" description="Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="MR0R" description="Reset on MR0: the TC will be reset if MR0 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="MR0S" description="Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="MR1I" description="Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="MR1R" description="Reset on MR1: the TC will be reset if MR1 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="MR1S" description="Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="MR2I" description="Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="MR2R" description="Reset on MR2: the TC will be reset if MR2 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="MR2S" description="Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="MR3I" description="Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="10" size="1" name="MR3R" description="Reset on MR3: the TC will be reset if MR3 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="11" size="1" name="MR3S" description="Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="12" size="20" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x018+0" size="4" name="MR0" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="MATCH" description="Timer counter match value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x018+4" size="4" name="MR1" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="MATCH" description="Timer counter match value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x018+8" size="4" name="MR2" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="MATCH" description="Timer counter match value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x018+12" size="4" name="MR3" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="MATCH" description="Timer counter match value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x028" size="4" name="CCR" access="Read/Write" description="Capture Control Register. The CCR controls which edges of the capture inputs are used to load the Capture Registers and whether or not an interrupt is generated when a capture takes place." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="CAP0RE" description="Capture on CT16B1_CAP0 rising edge: a sequence of 0 then 1 on CT16B1_CAP0 will cause CR0 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="CAP0FE" description="Capture on CT16B11_CAP0 falling edge: a sequence of 1 then 0 on CT16B1_CAP0 will cause CR0 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="CAP0I" description="Interrupt on CT16B1_CAP0 event: a CR0 load due to a CT16B1_CAP0 event will generate an interrupt.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="CAP1RE" description="Capture on CT16B1_CAP1 rising edge: a sequence of 0 then 1 on CT16B1_CAP1 will cause CR1 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="CAP1FE" description="Capture on CT16B1_CAP1 falling edge: a sequence of 1 then 0 on CT16B1_CAP1 will cause CR1 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="CAP1I" description="Interrupt on CT16B1_CAP1 event: a CR1 load due to a CT16B0_CAP1 event will generate an interrupt.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x02C" size="4" name="CR0" access="ReadOnly" description="Capture Register 0. CR0 is loaded with the value of TC when there is an event on the CT16B0_CAP0 input." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="CAP" description="Timer counter capture value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x030" size="4" name="CR1" access="ReadOnly" description="Capture Register 1. CR1 is loaded with the value of TC when there is an event on the CT16B1_CAP1 input." reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="16" name="CAP" description="Timer counter capture value." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x03C" size="4" name="EMR" access="Read/Write" description="External Match Register. The EMR controls the match function and the external match pins CT16B0_MAT[1:0] and CT16B1_MAT[1:0]." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="EM0" description="External Match 0. This bit reflects the state of output CT16B0_MAT0/CT16B1_MAT0, whether or not this output is connected to its pin. When a match occurs between the TC and MR0, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[5:4] control the functionality of this output. This bit is driven to the CT16B0_MAT0/CT16B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="1" size="1" name="EM1" description="External Match 1. This bit reflects the state of output CT16B0_MAT1/CT16B1_MAT1, whether or not this output is connected to its pin. When a match occurs between the TC and MR1, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[7:6] control the functionality of this output. This bit is driven to the CT16B0_MAT0/CT16B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="2" size="1" name="EM2" description="External Match 2. This bit reflects the state of match channel 2. When a match occurs between the TC and MR2, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[9:8] control the functionality of this output." />
|
|
<BitField start="3" size="1" name="EM3" description="External Match 3. This bit reflects the state of output of match channel 3. When a match occurs between the TC and MR3, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[11:10] control the functionality of this output." />
|
|
<BitField start="4" size="2" name="EMC0" description="External Match Control 0. Determines the functionality of External Match 0. Table 296 shows the encoding of these bits.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT0 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT16Bn_MAT0 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="6" size="2" name="EMC1" description="External Match Control 1. Determines the functionality of External Match 1.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT1 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT16Bn_MAT1 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="8" size="2" name="EMC2" description="External Match Control 2. Determines the functionality of External Match 2.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT2 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT16Bn_MAT2 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="10" size="2" name="EMC3" description="External Match Control 3. Determines the functionality of External Match 3.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT16Bn_MAT3 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT16Bn_MAT3 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="12" size="20" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x070" size="4" name="CTCR" access="Read/Write" description="Count Control Register. The CTCR selects between Timer and Counter mode, and in Counter mode selects the signal and edge(s) for counting." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="CTM" description="Counter/Timer Mode. This field selects which rising PCLK edges can increment Timer's Prescale Counter (PC), or clear PC and increment Timer Counter (TC). If Counter mode is selected in the CTCR, bits 2:0 in the Capture Control Register (CCR) must be programmed as 000.">
|
|
<Enum name="TIMER_MODE_EVERY_RI" start="0x0" description="Timer Mode: every rising PCLK edge" />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x1" description="Counter Mode: TC is incremented on rising edges on the CAP input selected by bits 3:2." />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x2" description="Counter Mode: TC is incremented on falling edges on the CAP input selected by bits 3:2." />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x3" description="Counter Mode: TC is incremented on both edges on the CAP input selected by bits 3:2." />
|
|
</BitField>
|
|
<BitField start="2" size="2" name="CIS" description="Count Input Select. In counter mode (when bits 1:0 in this register are not 00), these bits select which CAP pin or comparator output is sampled for clocking. Values 0x2 to 0x3 are reserved.">
|
|
<Enum name="CT16B1_CAP0_" start="0x0" description="CT16B1_CAP0." />
|
|
<Enum name="CT16B1_CAP1_" start="0x1" description="CT16B1_CAP1." />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="ENCC" description="Setting this bit to 1 enables clearing of the timer and the prescaler when the capture-edge event specified in bits 7:5 occurs." />
|
|
<BitField start="5" size="3" name="SELCC" description="When bit 4 is a 1, these bits select which capture input edge will cause the timer and prescaler to be cleared. These bits have no effect when bit 4 is low. Values 0x6 to 0x7 are reserved.">
|
|
<Enum name="RISING_EDGE_OF_CT16B" start="0x0" description="Rising Edge of CT16B1_CAP0 clears the timer (if bit 4 is set)." />
|
|
<Enum name="FALLING_EDGE_OF_CT16" start="0x1" description="Falling Edge of CT16B1_CAP0 clears the timer (if bit 4 is set)." />
|
|
<Enum name="RISING_EDGE_OF_CT16B" start="0x2" description="Rising Edge of CT16B1_CAP1 clears the timer (if bit 4 is set)." />
|
|
<Enum name="FALLING_EDGE_OF_CT16" start="0x3" description="Falling Edge of CT16B1_CAP1 clears the timer (if bit 4 is set)." />
|
|
<Enum name="RESERVED_" start="0x4" description="Reserved." />
|
|
<Enum name="RESERVED_" start="0x5" description="Reserved." />
|
|
</BitField>
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x074" size="4" name="PWMC" access="Read/Write" description="PWM Control Register. The PWMCON enables PWM mode for the external match pins CT16B0_MAT[1:0] and CT16B1_MAT[1:0]." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="PWMEN0" description="PWM mode enable for channel0.">
|
|
<Enum name="CT16BN_MAT0_IS_CONTR" start="0" description="CT16Bn_MAT0 is controlled by EM0." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT16Bn_MAT0." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="PWMEN1" description="PWM mode enable for channel1.">
|
|
<Enum name="CT16BN_MAT01_IS_CONT" start="0" description="CT16Bn_MAT01 is controlled by EM1." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT16Bn_MAT1." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="PWMEN2" description="PWM mode enable for channel2.">
|
|
<Enum name="CT16BN_MAT2_IS_CONTR" start="0" description="CT16Bn_MAT2 is controlled by EM2." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT16Bn_MAT2." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="PWMEN3" description="PWM mode enable for channel3.">
|
|
<Enum name="CT16BN_MAT3_IS_CONTR" start="0" description="CT16Bn_MAT3 is controlled by EM3." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT16Bn_MAT3." />
|
|
</BitField>
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="CT32B0" start="0x40014000" description="32-bit counter/timers CT32B0">
|
|
<Register start="+0x000" size="4" name="IR" access="Read/Write" description="Interrupt Register. The IR can be written to clear interrupts. The IR can be read to identify which of eight possible interrupt sources are pending." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="MR0INT" description="Interrupt flag for match channel 0." />
|
|
<BitField start="1" size="1" name="MR1INT" description="Interrupt flag for match channel 1." />
|
|
<BitField start="2" size="1" name="MR2INT" description="Interrupt flag for match channel 2." />
|
|
<BitField start="3" size="1" name="MR3INT" description="Interrupt flag for match channel 3." />
|
|
<BitField start="4" size="1" name="CR0INT" description="Interrupt flag for capture channel 0 event." />
|
|
<BitField start="5" size="1" name="RESERVED" description="Reserved," />
|
|
<BitField start="6" size="1" name="CR1INT" description="Interrupt flag for capture channel 1 event." />
|
|
<BitField start="7" size="25" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="TCR" access="Read/Write" description="Timer Control Register. The TCR is used to control the Timer Counter functions. The Timer Counter can be disabled or reset through the TCR." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="CEN" description="Counter enable.">
|
|
<Enum name="THE_COUNTERS_ARE_DIS" start="0" description="The counters are disabled." />
|
|
<Enum name="THE_TIMER_COUNTER_AN" start="1" description="The Timer Counter and Prescale Counter are enabled for counting." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="CRST" description="Counter reset.">
|
|
<Enum name="DO_NOTHING_" start="0" description="Do nothing." />
|
|
<Enum name="THE_TIMER_COUNTER_AN" start="1" description="The Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR[1] is returned to zero." />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="TC" access="Read/Write" description="Timer Counter. The 32-bit TC is incremented every PR+1 cycles of PCLK. The TC is controlled through the TCR." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="TC" description="Timer counter value." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="PR" access="Read/Write" description="Prescale Register. When the Prescale Counter (below) is equal to this value, the next clock increments the TC and clears the PC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PCVAL" description="Prescaler value." />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="PC" access="Read/Write" description="Prescale Counter. The 32-bit PC is a counter which is incremented to the value stored in PR. When the value in PR is reached, the TC is incremented and the PC is cleared. The PC is observable and controllable through the bus interface." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PC" description="Prescale counter value." />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="MCR" access="Read/Write" description="Match Control Register. The MCR is used to control if an interrupt is generated and if the TC is reset when a Match occurs." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="MR0I" description="Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="MR0R" description="Reset on MR0: the TC will be reset if MR0 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="MR0S" description="Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="MR1I" description="Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="MR1R" description="Reset on MR1: the TC will be reset if MR1 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="MR1S" description="Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="MR2I" description="Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="MR2R" description="Reset on MR2: the TC will be reset if MR2 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="MR2S" description="Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="MR3I" description="Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="10" size="1" name="MR3R" description="Reset on MR3: the TC will be reset if MR3 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="11" size="1" name="MR3S" description="Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="12" size="20" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x018+0" size="4" name="MR0" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="MATCH" description="Timer counter match value." />
|
|
</Register>
|
|
<Register start="+0x018+4" size="4" name="MR1" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="MATCH" description="Timer counter match value." />
|
|
</Register>
|
|
<Register start="+0x018+8" size="4" name="MR2" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="MATCH" description="Timer counter match value." />
|
|
</Register>
|
|
<Register start="+0x018+12" size="4" name="MR3" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="MATCH" description="Timer counter match value." />
|
|
</Register>
|
|
<Register start="+0x028" size="4" name="CCR" access="Read/Write" description="Capture Control Register. The CCR controls which edges of the capture inputs are used to load the Capture Registers and whether or not an interrupt is generated when a capture takes place." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="CAP0RE" description="Capture on CT32B0_CAP0 rising edge: a sequence of 0 then 1 on CT32B0_CAP0 will cause CR0 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="CAP0FE" description="Capture on CT32B0_CAP0 falling edge: a sequence of 1 then 0 on CT32B0_CAP0 will cause CR0 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="CAP0I" description="Interrupt on CT32B0_CAP0 event: a CR0 load due to a CT32B0_CAP0 event will generate an interrupt.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="3" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="6" size="1" name="CAP1RE" description="Capture on CT32B0_CAP1 rising edge: a sequence of 0 then 1 on CT32B0_CAP1 will cause CR1 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="CAP1FE" description="Capture on CT32B0_CAP1 falling edge: a sequence of 1 then 0 on CT32B0_CAP1 will cause CR1 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="CAP1I" description="Interrupt on CT32B0_CAP1 event: a CR1 load due to a CT32B0_CAP1 event will generate an interrupt.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="9" size="23" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x02C" size="4" name="CR0" access="ReadOnly" description="Capture Register 0. CR0 is loaded with the value of TC when there is an event on the CT32B0_CAP0 input." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="CAP" description="Timer counter capture value." />
|
|
</Register>
|
|
<Register start="+0x034" size="4" name="CR1" access="Read/Write" description="Capture Register 1. CR1 is loaded with the value of TC when there is an event on the CT32B0_CAP1 input." reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="32" name="CAP" description="Timer counter capture value." />
|
|
</Register>
|
|
<Register start="+0x03C" size="4" name="EMR" access="Read/Write" description="External Match Register. The EMR controls the match function and the external match pins CT32Bn_MAT[3:0]." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="EM0" description="External Match 0. This bit reflects the state of output CT32Bn_MAT0, whether or not this output is connected to its pin. When a match occurs between the TC and MR0, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[5:4] control the functionality of this output. This bit is driven to the CT32B0_MAT0/CT32B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="1" size="1" name="EM1" description="External Match 1. This bit reflects the state of output CT32Bn_MAT1, whether or not this output is connected to its pin. When a match occurs between the TC and MR1, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[7:6] control the functionality of this output. This bit is driven to the CT32B0_MAT1/CT32B1_MAT1 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="2" size="1" name="EM2" description="External Match 2. This bit reflects the state of output CT32Bn_MAT2, whether or not this output is connected to its pin. When a match occurs between the TC and MR2, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[9:8] control the functionality of this output. This bit is driven to the CT32B0_MAT2/CT32B1_MAT2 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="3" size="1" name="EM3" description="External Match 3. This bit reflects the state of output CT32Bn_MAT3, whether or not this output is connected to its pin. When a match occurs between the TC and MR3, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[11:10] control the functionality of this output. This bit is driven to the CT32B3_MAT0/CT32B1_MAT3 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="4" size="2" name="EMC0" description="External Match Control 0. Determines the functionality of External Match 0.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT32Bi_MAT0 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT32Bi_MAT0 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="6" size="2" name="EMC1" description="External Match Control 1. Determines the functionality of External Match 1.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT32Bi_MAT1 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT32Bi_MAT1 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="8" size="2" name="EMC2" description="External Match Control 2. Determines the functionality of External Match 2.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT32Bi_MAT2 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT32Bi_MAT2 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="10" size="2" name="EMC3" description="External Match Control 3. Determines the functionality of External Match 3.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT32Bi_MAT3 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT32Bi_MAT3 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="12" size="20" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x070" size="4" name="CTCR" access="Read/Write" description="Count Control Register. The CTCR selects between Timer and Counter mode, and in Counter mode selects the signal and edge(s) for counting." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="CTM" description="Counter/Timer Mode. This field selects which rising PCLK edges can increment Timer's Prescale Counter (PC), or clear PC and increment Timer Counter (TC). If Counter mode is selected in the CTCR, bits 2:0 in the Capture Control Register (CCR) must be programmed as 000.">
|
|
<Enum name="TIMER_MODE_EVERY_RI" start="0x0" description="Timer Mode: every rising PCLK edge" />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x1" description="Counter Mode: TC is incremented on rising edges on the CAP input selected by bits 3:2." />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x2" description="Counter Mode: TC is incremented on falling edges on the CAP input selected by bits 3:2." />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x3" description="Counter Mode: TC is incremented on both edges on the CAP input selected by bits 3:2." />
|
|
</BitField>
|
|
<BitField start="2" size="2" name="CIS" description="Count Input Select. In counter mode (when bits 1:0 in this register are not 00), these bits select which CAP pin or comparator output is sampled for clocking. If Counter mode is selected in the CTCR, the 3 bits for that input in the Capture Control Register (CCR) must be programmed as 000. Values 0x1 and0x3 are reserved.">
|
|
<Enum name="CT32B0_CAP0" start="0x0" description="CT32B0_CAP0" />
|
|
<Enum name="RESERVED_" start="0x1" description="Reserved." />
|
|
<Enum name="CT32B0_CAP1" start="0x2" description="CT32B0_CAP1" />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="ENCC" description="Setting this bit to 1 enables clearing of the timer and the prescaler when the capture-edge event specified in bits 7:5 occurs." />
|
|
<BitField start="5" size="3" name="SElCC" description="When bit 4 is a 1, these bits select which capture input edge will cause the timer and prescaler to be cleared. These bits have no effect when bit 4 is low. Values 0x2 to 0x3 and 0x6 to 0x7 are reserved.">
|
|
<Enum name="RISING_EDGE_OF_CT32B" start="0x0" description="Rising Edge of CT32B0_CAP0 clears the timer (if bit 4 is set)" />
|
|
<Enum name="FALLING_EDGE_OF_CT32" start="0x1" description="Falling Edge of CT32B0_CAP0 clears the timer (if bit 4 is set)" />
|
|
<Enum name="RESERVED" start="0x2" description="Reserved," />
|
|
<Enum name="RESERVED_" start="0x3" description="Reserved." />
|
|
<Enum name="RISING_EDGE_OF_CT32B" start="0x4" description="Rising Edge of CT32B0_CAP1 clears the timer (if bit 4 is set)" />
|
|
<Enum name="FALLING_EDGE_OF_CT32" start="0x5" description="Falling Edge of CT32B0_CAP1 clears the timer (if bit 4 is set)" />
|
|
</BitField>
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x074" size="4" name="PWMC" access="Read/Write" description="PWM Control Register. The PWMCON enables PWM mode for the external match pins CT32Bn_MAT[3:0]." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="PWMEN0" description="PWM mode enable for channel0.">
|
|
<Enum name="CT32BN_MAT0_IS_CONTR" start="0" description="CT32Bn_MAT0 is controlled by EM0." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT32Bn_MAT0." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="PWMEN1" description="PWM mode enable for channel1.">
|
|
<Enum name="CT32BN_MAT01_IS_CONT" start="0" description="CT32Bn_MAT01 is controlled by EM1." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT32Bn_MAT1." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="PWMEN2" description="PWM mode enable for channel2.">
|
|
<Enum name="CT32BN_MAT2_IS_CONTR" start="0" description="CT32Bn_MAT2 is controlled by EM2." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT32Bn_MAT2." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="PWMEN3" description="PWM mode enable for channel3. Note: It is recommended to use match channel 3 to set the PWM cycle.">
|
|
<Enum name="CT32BN_MAT3_IS_CONTR" start="0" description="CT32Bn_MAT3 is controlled by EM3." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT132Bn_MAT3." />
|
|
</BitField>
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="CT32B1" start="0x40018000" description="32-bit counter/timers CT32B1">
|
|
<Register start="+0x000" size="4" name="IR" access="Read/Write" description="Interrupt Register. The IR can be written to clear interrupts. The IR can be read to identify which of eight possible interrupt sources are pending." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="MR0INT" description="Interrupt flag for match channel 0." />
|
|
<BitField start="1" size="1" name="MR1INT" description="Interrupt flag for match channel 1." />
|
|
<BitField start="2" size="1" name="MR2INT" description="Interrupt flag for match channel 2." />
|
|
<BitField start="3" size="1" name="MR3INT" description="Interrupt flag for match channel 3." />
|
|
<BitField start="4" size="1" name="CR0INT" description="Interrupt flag for capture channel 0 event." />
|
|
<BitField start="5" size="1" name="CR1INT" description="Interrupt flag for capture channel 1 event." />
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="TCR" access="Read/Write" description="Timer Control Register. The TCR is used to control the Timer Counter functions. The Timer Counter can be disabled or reset through the TCR." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="CEN" description="Counter enable.">
|
|
<Enum name="THE_COUNTERS_ARE_DIS" start="0" description="The counters are disabled." />
|
|
<Enum name="THE_TIMER_COUNTER_AN" start="1" description="The Timer Counter and Prescale Counter are enabled for counting." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="CRST" description="Counter reset.">
|
|
<Enum name="DO_NOTHING_" start="0" description="Do nothing." />
|
|
<Enum name="THE_TIMER_COUNTER_AN" start="1" description="The Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR[1] is returned to zero." />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="TC" access="Read/Write" description="Timer Counter. The 32-bit TC is incremented every PR+1 cycles of PCLK. The TC is controlled through the TCR." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="TC" description="Timer counter value." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="PR" access="Read/Write" description="Prescale Register. When the Prescale Counter (below) is equal to this value, the next clock increments the TC and clears the PC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PCVAL" description="Prescaler value." />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="PC" access="Read/Write" description="Prescale Counter. The 32-bit PC is a counter which is incremented to the value stored in PR. When the value in PR is reached, the TC is incremented and the PC is cleared. The PC is observable and controllable through the bus interface." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PC" description="Prescale counter value." />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="MCR" access="Read/Write" description="Match Control Register. The MCR is used to control if an interrupt is generated and if the TC is reset when a Match occurs." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="MR0I" description="Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="MR0R" description="Reset on MR0: the TC will be reset if MR0 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="MR0S" description="Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="MR1I" description="Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="MR1R" description="Reset on MR1: the TC will be reset if MR1 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="MR1S" description="Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="MR2I" description="Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="MR2R" description="Reset on MR2: the TC will be reset if MR2 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="MR2S" description="Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="MR3I" description="Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="10" size="1" name="MR3R" description="Reset on MR3: the TC will be reset if MR3 matches it.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="11" size="1" name="MR3S" description="Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches the TC.">
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
</BitField>
|
|
<BitField start="12" size="20" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x018+0" size="4" name="MR0" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="MATCH" description="Timer counter match value." />
|
|
</Register>
|
|
<Register start="+0x018+4" size="4" name="MR1" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="MATCH" description="Timer counter match value." />
|
|
</Register>
|
|
<Register start="+0x018+8" size="4" name="MR2" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="MATCH" description="Timer counter match value." />
|
|
</Register>
|
|
<Register start="+0x018+12" size="4" name="MR3" access="Read/Write" description="Match Register 0. MR0 can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR0 matches the TC." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="MATCH" description="Timer counter match value." />
|
|
</Register>
|
|
<Register start="+0x028" size="4" name="CCR" access="Read/Write" description="Capture Control Register. The CCR controls which edges of the capture inputs are used to load the Capture Registers and whether or not an interrupt is generated when a capture takes place." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="CAP0RE" description="Capture on CT32B1_CAP0 rising edge: a sequence of 0 then 1 on CT32B1_CAP0 will cause CR0 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="CAP0FE" description="Capture on CT32B1_CAP0 falling edge: a sequence of 1 then 0 on CT32B1_CAP0 will cause CR0 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="CAP0I" description="Interrupt on CT32B1_CAP0 event: a CR0 load due to a CT32B1_CAP0 event will generate an interrupt.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="CAP1RE" description="Capture on CT32B1_CAP1 rising edge: a sequence of 0 then 1 on CT32B1_CAP1 will cause CR1 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="CAP1FE" description="Capture on CT32B1_CAP1 falling edge: a sequence of 1 then 0 on CT32B1_CAP1 will cause CR1 to be loaded with the contents of TC.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="CAP1I" description="Interrupt on CT32B1_CAP1 event: a CR1 load due to a CT32B1_CAP1 event will generate an interrupt.">
|
|
<Enum name="ENABLED_" start="1" description="Enabled." />
|
|
<Enum name="DISABLED_" start="0" description="Disabled." />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x02C" size="4" name="CR0" access="ReadOnly" description="Capture Register 0. CR0 is loaded with the value of TC when there is an event on the CT32B0_CAP0 input." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="CAP" description="Timer counter capture value." />
|
|
</Register>
|
|
<Register start="+0x030" size="4" name="CR1" access="Read/Write" description="Capture Register 1. CR1 is loaded with the value of TC when there is an event on the CT32B1_CAP1 input." reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="32" name="CAP" description="Timer counter capture value." />
|
|
</Register>
|
|
<Register start="+0x03C" size="4" name="EMR" access="Read/Write" description="External Match Register. The EMR controls the match function and the external match pins CT32Bn_MAT[3:0]." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="EM0" description="External Match 0. This bit reflects the state of output CT32Bn_MAT0, whether or not this output is connected to its pin. When a match occurs between the TC and MR0, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[5:4] control the functionality of this output. This bit is driven to the CT32B0_MAT0/CT32B1_MAT0 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="1" size="1" name="EM1" description="External Match 1. This bit reflects the state of output CT32Bn_MAT1, whether or not this output is connected to its pin. When a match occurs between the TC and MR1, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[7:6] control the functionality of this output. This bit is driven to the CT32B0_MAT1/CT32B1_MAT1 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="2" size="1" name="EM2" description="External Match 2. This bit reflects the state of output CT32Bn_MAT2, whether or not this output is connected to its pin. When a match occurs between the TC and MR2, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[9:8] control the functionality of this output. This bit is driven to the CT32B0_MAT2/CT32B1_MAT2 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="3" size="1" name="EM3" description="External Match 3. This bit reflects the state of output CT32Bn_MAT3, whether or not this output is connected to its pin. When a match occurs between the TC and MR3, this bit can either toggle, go LOW, go HIGH, or do nothing. Bits EMR[11:10] control the functionality of this output. This bit is driven to the CT32B3_MAT0/CT32B1_MAT3 pins if the match function is selected in the IOCON registers (0 = LOW, 1 = HIGH)." />
|
|
<BitField start="4" size="2" name="EMC0" description="External Match Control 0. Determines the functionality of External Match 0.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT32Bi_MAT0 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT32Bi_MAT0 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="6" size="2" name="EMC1" description="External Match Control 1. Determines the functionality of External Match 1.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT32Bi_MAT1 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT32Bi_MAT1 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="8" size="2" name="EMC2" description="External Match Control 2. Determines the functionality of External Match 2.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT32Bi_MAT2 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT32Bi_MAT2 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="10" size="2" name="EMC3" description="External Match Control 3. Determines the functionality of External Match 3.">
|
|
<Enum name="DO_NOTHING_" start="0x0" description="Do Nothing." />
|
|
<Enum name="CLEAR_THE_CORRESPOND" start="0x1" description="Clear the corresponding External Match bit/output to 0 (CT32Bi_MAT3 pin is LOW if pinned out)." />
|
|
<Enum name="SET_THE_CORRESPONDIN" start="0x2" description="Set the corresponding External Match bit/output to 1 (CT32Bi_MAT3 pin is HIGH if pinned out)." />
|
|
<Enum name="TOGGLE_THE_CORRESPON" start="0x3" description="Toggle the corresponding External Match bit/output." />
|
|
</BitField>
|
|
<BitField start="12" size="20" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x070" size="4" name="CTCR" access="Read/Write" description="Count Control Register. The CTCR selects between Timer and Counter mode, and in Counter mode selects the signal and edge(s) for counting." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="CTM" description="Counter/Timer Mode. This field selects which rising PCLK edges can increment Timer's Prescale Counter (PC), or clear PC and increment Timer Counter (TC). If Counter mode is selected in the CTCR, bits 2:0 in the Capture Control Register (CCR) must be programmed as 000.">
|
|
<Enum name="TIMER_MODE_EVERY_RI" start="0x0" description="Timer Mode: every rising PCLK edge" />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x1" description="Counter Mode: TC is incremented on rising edges on the CAP input selected by bits 3:2." />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x2" description="Counter Mode: TC is incremented on falling edges on the CAP input selected by bits 3:2." />
|
|
<Enum name="COUNTER_MODE_TC_IS_" start="0x3" description="Counter Mode: TC is incremented on both edges on the CAP input selected by bits 3:2." />
|
|
</BitField>
|
|
<BitField start="2" size="2" name="CIS" description="Count Input Select. In counter mode (when bits 1:0 in this register are not 00), these bits select which CAP pin or comparator output is sampled for clocking. If Counter mode is selected in the CTCR, the 3 bits for that input in the Capture Control Register (CCR) must be programmed as 000. Values 0x2 to 0x3 are reserved.">
|
|
<Enum name="CT32B1_CAP0" start="0x0" description="CT32B1_CAP0" />
|
|
<Enum name="CT32B1_CAP1" start="0x1" description="CT32B1_CAP1" />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="ENCC" description="Setting this bit to 1 enables clearing of the timer and the prescaler when the capture-edge event specified in bits 7:5 occurs." />
|
|
<BitField start="5" size="3" name="SElCC" description="When bit 4 is a 1, these bits select which capture input edge will cause the timer and prescaler to be cleared. These bits have no effect when bit 4 is low. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="RISING_EDGE_OF_CT32B" start="0x0" description="Rising Edge of CT32B1_CAP0 clears the timer (if bit 4 is set)" />
|
|
<Enum name="FALLING_EDGE_OF_CT32" start="0x1" description="Falling Edge of CT32B1_CAP0 clears the timer (if bit 4 is set)" />
|
|
<Enum name="RISING_EDGE_OF_CT32B" start="0x2" description="Rising Edge of CT32B1_CAP1 clears the timer (if bit 4 is set)" />
|
|
<Enum name="FALLING_EDGE_OF_CT32" start="0x3" description="Falling Edge of CT32B1_CAP1 clears the timer (if bit 4 is set)" />
|
|
</BitField>
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x074" size="4" name="PWMC" access="Read/Write" description="PWM Control Register. The PWMCON enables PWM mode for the external match pins CT32Bn_MAT[3:0]." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="PWMEN0" description="PWM mode enable for channel0.">
|
|
<Enum name="CT32BN_MAT0_IS_CONTR" start="0" description="CT32Bn_MAT0 is controlled by EM0." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT32Bn_MAT0." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="PWMEN1" description="PWM mode enable for channel1.">
|
|
<Enum name="CT32BN_MAT01_IS_CONT" start="0" description="CT32Bn_MAT01 is controlled by EM1." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT32Bn_MAT1." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="PWMEN2" description="PWM mode enable for channel2.">
|
|
<Enum name="CT32BN_MAT2_IS_CONTR" start="0" description="CT32Bn_MAT2 is controlled by EM2." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT32Bn_MAT2." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="PWMEN3" description="PWM mode enable for channel3. Note: It is recommended to use match channel 3 to set the PWM cycle.">
|
|
<Enum name="CT32BN_MAT3_IS_CONTR" start="0" description="CT32Bn_MAT3 is controlled by EM3." />
|
|
<Enum name="PWM_MODE_IS_ENABLED_" start="1" description="PWM mode is enabled for CT132Bn_MAT3." />
|
|
</BitField>
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="USART" start="0x40008000" description="USART">
|
|
<Register start="+0x000" size="4" name="RBR" access="None" description="Receiver Buffer Register. Contains the next received character to be read. (DLAB=0)" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="8" name="RBR" description="The USART Receiver Buffer Register contains the oldest received byte in the USART RX FIFO." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x000" size="4" name="THR" access="None" description="Transmit Holding Register. The next character to be transmitted is written here. (DLAB=0)" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="8" name="THR" description="Writing to the USART Transmit Holding Register causes the data to be stored in the USART transmit FIFO. The byte will be sent when it is the oldest byte in the FIFO and the transmitter is available." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x000" size="4" name="DLL" access="Read/Write" description="Divisor Latch LSB. Least significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. (DLAB=1)" reset_value="0x01" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DLLSB" description="The USART Divisor Latch LSB Register, along with the DLM register, determines the baud rate of the USART." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="DLM" access="Read/Write" description="Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider. (DLAB=1)" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DLMSB" description="The USART Divisor Latch MSB Register, along with the DLL register, determines the baud rate of the USART." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="IER" access="Read/Write" description="Interrupt Enable Register. Contains individual interrupt enable bits for the 7 potential USART interrupts. (DLAB=0)" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RBRINTEN" description="RBR Interrupt Enable. Enables the Receive Data Available interrupt. It also controls the Character Receive Time-out interrupt.">
|
|
<Enum name="DISABLE_THE_RDA_INTE" start="0" description="Disable the RDA interrupt." />
|
|
<Enum name="ENABLE_THE_RDA_INTER" start="1" description="Enable the RDA interrupt." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="THREINTEN" description="THRE Interrupt Enable. Enables the THRE interrupt. The status of this interrupt can be read from LSR[5].">
|
|
<Enum name="DISABLE_THE_THRE_INT" start="0" description="Disable the THRE interrupt." />
|
|
<Enum name="ENABLE_THE_THRE_INTE" start="1" description="Enable the THRE interrupt." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="RLSINTEN" description="Enables the Receive Line Status interrupt. The status of this interrupt can be read from LSR[4:1].">
|
|
<Enum name="DISABLE_THE_RLS_INTE" start="0" description="Disable the RLS interrupt." />
|
|
<Enum name="ENABLE_THE_RLS_INTER" start="1" description="Enable the RLS interrupt." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="MSINTEN" description="Enables the Modem Status interrupt. The components of this interrupt can be read from the MSR.">
|
|
<Enum name="DISABLE_THE_MS_INTER" start="0" description="Disable the MS interrupt." />
|
|
<Enum name="ENABLE_THE_MS_INTERR" start="1" description="Enable the MS interrupt." />
|
|
</BitField>
|
|
<BitField start="4" size="4" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="8" size="1" name="ABEOINTEN" description="Enables the end of auto-baud interrupt.">
|
|
<Enum name="DISABLE_END_OF_AUTO_" start="0" description="Disable end of auto-baud Interrupt." />
|
|
<Enum name="ENABLE_END_OF_AUTO_B" start="1" description="Enable end of auto-baud Interrupt." />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="ABTOINTEN" description="Enables the auto-baud time-out interrupt.">
|
|
<Enum name="DISABLE_AUTO_BAUD_TI" start="0" description="Disable auto-baud time-out Interrupt." />
|
|
<Enum name="ENABLE_AUTO_BAUD_TIM" start="1" description="Enable auto-baud time-out Interrupt." />
|
|
</BitField>
|
|
<BitField start="10" size="22" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="IIR" access="ReadOnly" description="Interrupt ID Register. Identifies which interrupt(s) are pending." reset_value="0x01" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="INTSTATUS" description="Interrupt status. Note that IIR[0] is active low. The pending interrupt can be determined by evaluating IIR[3:1].">
|
|
<Enum name="AT_LEAST_ONE_INTERRU" start="0" description="At least one interrupt is pending." />
|
|
<Enum name="NO_INTERRUPT_IS_PEND" start="1" description="No interrupt is pending." />
|
|
</BitField>
|
|
<BitField start="1" size="3" name="INTID" description="Interrupt identification. IER[3:1] identifies an interrupt corresponding to the USART Rx FIFO. All other values of IER[3:1] not listed below are reserved.">
|
|
<Enum name="1_RECEIVE_LINE_S" start="0x3" description="1 - Receive Line Status (RLS)." />
|
|
<Enum name="2A__RECEIVE_DATA_AV" start="0x2" description="2a - Receive Data Available (RDA)." />
|
|
<Enum name="2B__CHARACTER_TIME_" start="0x6" description="2b - Character Time-out Indicator (CTI)." />
|
|
<Enum name="3_THRE_INTERRUPT" start="0x1" description="3 - THRE Interrupt." />
|
|
<Enum name="4_MODEM_STATUS" start="0x0" description="4 - Modem status" />
|
|
</BitField>
|
|
<BitField start="4" size="2" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="6" size="2" name="FIFOEN" description="These bits are equivalent to FCR[0]." />
|
|
<BitField start="8" size="1" name="ABEOINT" description="End of auto-baud interrupt. True if auto-baud has finished successfully and interrupt is enabled." />
|
|
<BitField start="9" size="1" name="ABTOINT" description="Auto-baud time-out interrupt. True if auto-baud has timed out and interrupt is enabled." />
|
|
<BitField start="10" size="22" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="FCR" access="WriteOnly" description="FIFO Control Register. Controls USART FIFO usage and modes." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="FIFOEN" description="FIFO enable">
|
|
<Enum name="DISABLED" start="0" description="USART FIFOs are disabled. Must not be used in the application." />
|
|
<Enum name="ENABLED" start="1" description="Active high enable for both USART Rx and TX FIFOs and FCR[7:1] access. This bit must be set for proper USART operation. Any transition on this bit will automatically clear the USART FIFOs." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="RXFIFORES" description="RX FIFO Reset">
|
|
<Enum name="NO_IMPACT" start="0" description="No impact on either of USART FIFOs." />
|
|
<Enum name="CLEAR" start="1" description="Writing a logic 1 to FCR[1] will clear all bytes in USART Rx FIFO, reset the pointer logic. This bit is self-clearing." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="TXFIFORES" description="TX FIFO Reset">
|
|
<Enum name="NO_IMPACT" start="0" description="No impact on either of USART FIFOs." />
|
|
<Enum name="CLEAR" start="1" description="Writing a logic 1 to FCR[2] will clear all bytes in USART TX FIFO, reset the pointer logic. This bit is self-clearing." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="RESERVED" description="Reserved" />
|
|
<BitField start="4" size="2" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="6" size="2" name="RXTL" description="RX Trigger Level. These two bits determine how many receiver USART FIFO characters must be written before an interrupt is activated.">
|
|
<Enum name="TRIGGER_LEVEL_0_1_C" start="0x0" description="Trigger level 0 (1 character or 0x01)." />
|
|
<Enum name="TRIGGER_LEVEL_1_4_C" start="0x1" description="Trigger level 1 (4 characters or 0x04)." />
|
|
<Enum name="TRIGGER_LEVEL_2_8_C" start="0x2" description="Trigger level 2 (8 characters or 0x08)." />
|
|
<Enum name="TRIGGER_LEVEL_3_14_" start="0x3" description="Trigger level 3 (14 characters or 0x0E)." />
|
|
</BitField>
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="LCR" access="Read/Write" description="Line Control Register. Contains controls for frame formatting and break generation." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="WLS" description="Word Length Select">
|
|
<Enum name="5_BIT_CHARACTER_LENG" start="0x0" description="5-bit character length." />
|
|
<Enum name="6_BIT_CHARACTER_LENG" start="0x1" description="6-bit character length." />
|
|
<Enum name="7_BIT_CHARACTER_LENG" start="0x2" description="7-bit character length." />
|
|
<Enum name="8_BIT_CHARACTER_LENG" start="0x3" description="8-bit character length." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="SBS" description="Stop Bit Select">
|
|
<Enum name="1_STOP_BIT_" start="0" description="1 stop bit." />
|
|
<Enum name="2_STOP_BITS_1_5_IF_" start="1" description="2 stop bits (1.5 if LCR[1:0]=00)." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="PE" description="Parity Enable">
|
|
<Enum name="DISABLE_PARITY_GENER" start="0" description="Disable parity generation and checking." />
|
|
<Enum name="ENABLE_PARITY_GENERA" start="1" description="Enable parity generation and checking." />
|
|
</BitField>
|
|
<BitField start="4" size="2" name="PS" description="Parity Select">
|
|
<Enum name="ODD_PARITY_NUMBER_O" start="0x0" description="Odd parity. Number of 1s in the transmitted character and the attached parity bit will be odd." />
|
|
<Enum name="EVEN_PARITY_NUMBER_" start="0x1" description="Even Parity. Number of 1s in the transmitted character and the attached parity bit will be even." />
|
|
<Enum name="FORCED_1_STICK_PARIT" start="0x2" description="Forced 1 stick parity." />
|
|
<Enum name="FORCED_0_STICK_PARIT" start="0x3" description="Forced 0 stick parity." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="BC" description="Break Control">
|
|
<Enum name="DISABLE_BREAK_TRANSM" start="0" description="Disable break transmission." />
|
|
<Enum name="ENABLE_BREAK_TRANSMI" start="1" description="Enable break transmission. Output pin USART TXD is forced to logic 0 when LCR[6] is active high." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="DLAB" description="Divisor Latch Access Bit">
|
|
<Enum name="DISABLE_ACCESS_TO_DI" start="0" description="Disable access to Divisor Latches." />
|
|
<Enum name="ENABLE_ACCESS_TO_DIV" start="1" description="Enable access to Divisor Latches." />
|
|
</BitField>
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="MCR" access="Read/Write" description="Modem Control Register." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="DTRCTRL" description="Source for modem output pin DTR. This bit reads as 0 when modem loopback mode is active." />
|
|
<BitField start="1" size="1" name="RTSCTRL" description="Source for modem output pin RTS. This bit reads as 0 when modem loopback mode is active." />
|
|
<BitField start="2" size="2" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="4" size="1" name="LMS" description="Loopback Mode Select. The modem loopback mode provides a mechanism to perform diagnostic loopback testing. Serial data from the transmitter is connected internally to serial input of the receiver. Input pin, RXD, has no effect on loopback and output pin, TXD is held in marking state. The DSR, CTS, DCD, and RI pins are ignored. Externally, DTR and RTS are set inactive. Internally, the upper four bits of the MSR are driven by the lower four bits of the MCR. This permits modem status interrupts to be generated in loopback mode by writing the lower four bits of MCR.">
|
|
<Enum name="DISABLE_MODEM_LOOPBA" start="0" description="Disable modem loopback mode." />
|
|
<Enum name="ENABLE_MODEM_LOOPBAC" start="1" description="Enable modem loopback mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="6" size="1" name="RTSEN" description="RTS enable">
|
|
<Enum name="DISABLE_AUTO_RTS_FLO" start="0" description="Disable auto-rts flow control." />
|
|
<Enum name="ENABLE_AUTO_RTS_FLOW" start="1" description="Enable auto-rts flow control." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="CTSEN" description="CTS enable">
|
|
<Enum name="DISABLE_AUTO_CTS_FLO" start="0" description="Disable auto-cts flow control." />
|
|
<Enum name="ENABLE_AUTO_CTS_FLOW" start="1" description="Enable auto-cts flow control." />
|
|
</BitField>
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="LSR" access="None" description="Line Status Register. Contains flags for transmit and receive status, including line errors." reset_value="0x60" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RDR" description="Receiver Data Ready:LSR[0] is set when the RBR holds an unread character and is cleared when the USART RBR FIFO is empty.">
|
|
<Enum name="RBR_IS_EMPTY_" start="0" description="RBR is empty." />
|
|
<Enum name="RBR_CONTAINS_VALID_D" start="1" description="RBR contains valid data." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="OE" description="Overrun Error. The overrun error condition is set as soon as it occurs. A LSR read clears LSR[1]. LSR[1] is set when USART RSR has a new character assembled and the USART RBR FIFO is full. In this case, the USART RBR FIFO will not be overwritten and the character in the USART RSR will be lost.">
|
|
<Enum name="INACTIVE" start="0" description="Overrun error status is inactive." />
|
|
<Enum name="ACTIVE" start="1" description="Overrun error status is active." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="PE" description="Parity Error. When the parity bit of a received character is in the wrong state, a parity error occurs. A LSR read clears LSR[2]. Time of parity error detection is dependent on FCR[0]. Note: A parity error is associated with the character at the top of the USART RBR FIFO.">
|
|
<Enum name="INACTIVE" start="0" description="Parity error status is inactive." />
|
|
<Enum name="ACTIVE" start="1" description="Parity error status is active." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="FE" description="Framing Error. When the stop bit of a received character is a logic 0, a framing error occurs. A LSR read clears LSR[3]. The time of the framing error detection is dependent on FCR0. Upon detection of a framing error, the RX will attempt to re-synchronize to the data and assume that the bad stop bit is actually an early start bit. However, it cannot be assumed that the next received byte will be correct even if there is no Framing Error. Note: A framing error is associated with the character at the top of the USART RBR FIFO.">
|
|
<Enum name="INACTIVE" start="0" description="Framing error status is inactive." />
|
|
<Enum name="ACTIVE" start="1" description="Framing error status is active." />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="BI" description="Break Interrupt. When RXD1 is held in the spacing state (all zeros) for one full character transmission (start, data, parity, stop), a break interrupt occurs. Once the break condition has been detected, the receiver goes idle until RXD1 goes to marking state (all ones). A LSR read clears this status bit. The time of break detection is dependent on FCR[0]. Note: The break interrupt is associated with the character at the top of the USART RBR FIFO.">
|
|
<Enum name="INACTIVE" start="0" description="Break interrupt status is inactive." />
|
|
<Enum name="ACTIVE" start="1" description="Break interrupt status is active." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="THRE" description="Transmitter Holding Register Empty. THRE is set immediately upon detection of an empty USART THR and is cleared on a THR write.">
|
|
<Enum name="THR_CONTAINS_VALID_D" start="0" description="THR contains valid data." />
|
|
<Enum name="THR_IS_EMPTY_" start="1" description="THR is empty." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="TEMT" description="Transmitter Empty. TEMT is set when both THR and TSR are empty; TEMT is cleared when either the TSR or the THR contain valid data.">
|
|
<Enum name="VALID_D" start="0" description="THR and/or the TSR contains valid data." />
|
|
<Enum name="EMPTY" start="1" description="THR and the TSR are empty." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="RXFE" description="Error in RX FIFO. LSR[7] is set when a character with a RX error such as framing error, parity error or break interrupt, is loaded into the RBR. This bit is cleared when the LSR register is read and there are no subsequent errors in the USART FIFO.">
|
|
<Enum name="NO_ERROR" start="0" description="RBR contains no USART RX errors or FCR[0]=0." />
|
|
<Enum name="ERRO" start="1" description="USART RBR contains at least one USART RX error." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="TXERR" description="Tx Error. In smart card T=0 operation, this bit is set when the smart card has NACKed a transmitted character, one more than the number of times indicated by the TXRETRY field." />
|
|
<BitField start="9" size="23" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x018" size="4" name="MSR" access="None" description="Modem Status Register." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="DCTS" description="Delta CTS. Set upon state change of input CTS. Cleared on an MSR read.">
|
|
<Enum name="NO_CHANGE_DETECTED_O" start="0" description="No change detected on modem input, CTS." />
|
|
<Enum name="STATE_CHANGE_DETECTE" start="1" description="State change detected on modem input, CTS." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="DDSR" description="Delta DSR. Set upon state change of input DSR. Cleared on an MSR read.">
|
|
<Enum name="NO_CHANGE_DETECTED_O" start="0" description="No change detected on modem input, DSR." />
|
|
<Enum name="STATE_CHANGE_DETECTE" start="1" description="State change detected on modem input, DSR." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="TERI" description="Trailing Edge RI. Set upon low to high transition of input RI. Cleared on an MSR read.">
|
|
<Enum name="NO_CHANGE_DETECTED_O" start="0" description="No change detected on modem input, RI." />
|
|
<Enum name="LOW_TO_HIGH_TRANSITI" start="1" description="Low-to-high transition detected on RI." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="DDCD" description="Delta DCD. Set upon state change of input DCD. Cleared on an MSR read.">
|
|
<Enum name="NO_CHANGE_DETECTED_O" start="0" description="No change detected on modem input, DCD." />
|
|
<Enum name="STATE_CHANGE_DETECTE" start="1" description="State change detected on modem input, DCD." />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="CTS" description="Clear To Send State. Complement of input signal CTS. This bit is connected to MCR[1] in modem loopback mode." />
|
|
<BitField start="5" size="1" name="DSR" description="Data Set Ready State. Complement of input signal DSR. This bit is connected to MCR[0] in modem loopback mode." />
|
|
<BitField start="6" size="1" name="RI" description="Ring Indicator State. Complement of input RI. This bit is connected to MCR[2] in modem loopback mode." />
|
|
<BitField start="7" size="1" name="DCD" description="Data Carrier Detect State. Complement of input DCD. This bit is connected to MCR[3] in modem loopback mode." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved, the value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x01C" size="4" name="SCR" access="Read/Write" description="Scratch Pad Register. Eight-bit temporary storage for software." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="PAD" description="A readable, writable byte." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x020" size="4" name="ACR" access="Read/Write" description="Auto-baud Control Register. Contains controls for the auto-baud feature." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="START" description="This bit is automatically cleared after auto-baud completion.">
|
|
<Enum name="AUTO_BAUD_STOP_AUTO" start="0" description="Auto-baud stop (auto-baud is not running)." />
|
|
<Enum name="AUTO_BAUD_START_AUT" start="1" description="Auto-baud start (auto-baud is running). Auto-baud run bit. This bit is automatically cleared after auto-baud completion." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="MODE" description="Auto-baud mode select bit.">
|
|
<Enum name="MODE_0_" start="0" description="Mode 0." />
|
|
<Enum name="MODE_1_" start="1" description="Mode 1." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="AUTORESTART" description="Start mode">
|
|
<Enum name="NO_RESTART" start="0" description="No restart" />
|
|
<Enum name="RESTART_IN_CASE_OF_T" start="1" description="Restart in case of time-out (counter restarts at next USART Rx falling edge)" />
|
|
</BitField>
|
|
<BitField start="3" size="5" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="8" size="1" name="ABEOINTCLR" description="End of auto-baud interrupt clear bit (write only accessible).">
|
|
<Enum name="NO_IMPACT" start="0" description="Writing a 0 has no impact." />
|
|
<Enum name="CLEAR" start="1" description="Writing a 1 will clear the corresponding interrupt in the IIR." />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="ABTOINTCLR" description="Auto-baud time-out interrupt clear bit (write only accessible).">
|
|
<Enum name="NO_IMPACT" start="0" description="Writing a 0 has no impact." />
|
|
<Enum name="CLEAR" start="1" description="Writing a 1 will clear the corresponding interrupt in the IIR." />
|
|
</BitField>
|
|
<BitField start="10" size="22" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x024" size="4" name="ICR" access="Read/Write" description="IrDA Control Register. Enables and configures the IrDA (remote control) mode." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="IRDAEN" description="IrDA mode enable">
|
|
<Enum name="IRDA_MODE_IS_DISABLE" start="0" description="IrDA mode is disabled, USARTn acts as a standard USART." />
|
|
<Enum name="IRDA_MODE_IS_ENABLED" start="1" description="IrDA mode is enabled." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="IRDAINV" description="Serial input inverter">
|
|
<Enum name="INVERTED" start="0" description="The serial input is not inverted." />
|
|
<Enum name="NOT_INVERTED" start="1" description="The serial input is inverted. This has no effect on the serial output." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="FIXPULSEEN" description="IrDA fixed pulse width mode.">
|
|
<Enum name="DISABLED" start="0" description="IrDA fixed pulse width mode disabled." />
|
|
<Enum name="ENABLED" start="1" description="IrDA fixed pulse width mode enabled." />
|
|
</BitField>
|
|
<BitField start="3" size="3" name="PULSEDIV" description="Configures the pulse width when FixPulseEn = 1.">
|
|
<Enum name="3_DIV_16_X_BAUD_RATE" start="0x0" description="3 / (16 x baud rate)" />
|
|
<Enum name="2_X_TPCLK" start="0x1" description="2 x TPCLK" />
|
|
<Enum name="4_X_TPCLK" start="0x2" description="4 x TPCLK" />
|
|
<Enum name="8_X_TPCLK" start="0x3" description="8 x TPCLK" />
|
|
<Enum name="16_X_TPCLK" start="0x4" description="16 x TPCLK" />
|
|
<Enum name="32_X_TPCLK" start="0x5" description="32 x TPCLK" />
|
|
<Enum name="64_X_TPCLK" start="0x6" description="64 x TPCLK" />
|
|
<Enum name="128_X_TPCLK" start="0x7" description="128 x TPCLK" />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x028" size="4" name="FDR" access="Read/Write" description="Fractional Divider Register. Generates a clock input for the baud rate divider." reset_value="0x10" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="DIVADDVAL" description="Baud rate generation pre-scaler divisor value. If this field is 0, fractional baud rate generator will not impact the USART baud rate." />
|
|
<BitField start="4" size="4" name="MULVAL" description="Baud rate pre-scaler multiplier value. This field must be greater or equal 1 for USART to operate properly, regardless of whether the fractional baud rate generator is used or not." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x02C" size="4" name="OSR" access="Read/Write" description="Oversampling Register. Controls the degree of oversampling during each bit time." reset_value="0xF0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="1" size="3" name="OSFRAC" description="Fractional part of the oversampling ratio, in units of 1/8th of an input clock period. (001 = 0.125, ..., 111 = 0.875)" />
|
|
<BitField start="4" size="4" name="OSINT" description="Integer part of the oversampling ratio, minus 1. The reset values equate to the normal operating mode of 16 input clocks per bit time." />
|
|
<BitField start="8" size="7" name="FDINT" description="In Smart Card mode, these bits act as a more-significant extension of the OSint field, allowing an oversampling ratio up to 2048 as required by ISO7816-3. In Smart Card mode, bits 14:4 should initially be set to 371, yielding an oversampling ratio of 372." />
|
|
<BitField start="15" size="17" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x030" size="4" name="TER" access="Read/Write" description="Transmit Enable Register. Turns off USART transmitter for use with software flow control." reset_value="0x80" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="7" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="7" size="1" name="TXEN" description="When this bit is 1, as it is after a Reset, data written to the THR is output on the TXD pin as soon as any preceding data has been sent. If this bit cleared to 0 while a character is being sent, the transmission of that character is completed, but no further characters are sent until this bit is set again. In other words, a 0 in this bit blocks the transfer of characters from the THR or TX FIFO into the transmit shift register. Software can clear this bit when it detects that the a hardware-handshaking TX-permit signal (CTS) has gone false, or with software handshaking, when it receives an XOFF character (DC3). Software can set this bit again when it detects that the TX-permit signal has gone true, or when it receives an XON (DC1) character." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x040" size="4" name="HDEN" access="Read/Write" description="Half duplex enable register." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="HDEN" description="Half-duplex mode enable">
|
|
<Enum name="DISABLE_HALF_DUPLEX_" start="0" description="Disable half-duplex mode." />
|
|
<Enum name="ENABLE_HALF_DUPLEX_M" start="1" description="Enable half-duplex mode." />
|
|
</BitField>
|
|
<BitField start="1" size="31" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x048" size="4" name="SCICTRL" access="Read/Write" description="Smart Card Interface Control register. Enables and configures the Smart Card Interface feature." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="SCIEN" description="Smart Card Interface Enable.">
|
|
<Enum name="SMART_CARD_INTERFACE" start="0" description="Smart card interface disabled." />
|
|
<Enum name="ASYNCHRONOUS_HALF_DU" start="1" description="Asynchronous half duplex smart card interface is enabled." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="NACKDIS" description="NACK response disable. Only applicable in T=0.">
|
|
<Enum name="ENABLED" start="0" description="A NACK response is enabled." />
|
|
<Enum name="DISABLED" start="1" description="A NACK response is inhibited." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="PROTSEL" description="Protocol selection as defined in the ISO7816-3 standard.">
|
|
<Enum name="T_EQ_0" start="0" description="T = 0" />
|
|
<Enum name="T_EQ_1" start="1" description="T = 1" />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="RESERVED" description="Reserved." />
|
|
<BitField start="5" size="3" name="TXRETRY" description="When the protocol selection T bit (above) is 0, the field controls the maximum number of retransmissions that the USART will attempt if the remote device signals NACK. When NACK has occurred this number of times plus one, the Tx Error bit in the LSR is set, an interrupt is requested if enabled, and the USART is locked until the FIFO is cleared." />
|
|
<BitField start="8" size="8" name="XTRAGUARD" description="When the protocol selection T bit (above) is 0, this field indicates the number of bit times (ETUs) by which the guard time after a character transmitted by the USART should exceed the nominal 2 bit times. 0xFF in this field may indicate that there is just a single bit after a character and 11 bit times/character" />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x04C" size="4" name="RS485CTRL" access="Read/Write" description="RS-485/EIA-485 Control. Contains controls to configure various aspects of RS-485/EIA-485 modes." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="NMMEN" description="NMM enable.">
|
|
<Enum name="RS_485_EIA_485_NORMA" start="0" description="RS-485/EIA-485 Normal Multidrop Mode (NMM) is disabled." />
|
|
<Enum name="RS_485_EIA_485_NORMA" start="1" description="RS-485/EIA-485 Normal Multidrop Mode (NMM) is enabled. In this mode, an address is detected when a received byte causes the USART to set the parity error and generate an interrupt." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="RXDIS" description="Receiver enable.">
|
|
<Enum name="THE_RECEIVER_IS_ENAB" start="0" description="The receiver is enabled." />
|
|
<Enum name="THE_RECEIVER_IS_DISA" start="1" description="The receiver is disabled." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="AADEN" description="AAD enable.">
|
|
<Enum name="AUTO_ADDRESS_DETECT_" start="0" description="Auto Address Detect (AAD) is disabled." />
|
|
<Enum name="AUTO_ADDRESS_DETECT_" start="1" description="Auto Address Detect (AAD) is enabled." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="SEL" description="Select direction control pin">
|
|
<Enum name="RTS" start="0" description="If direction control is enabled (bit DCTRL = 1), pin RTS is used for direction control." />
|
|
<Enum name="DTR" start="1" description="If direction control is enabled (bit DCTRL = 1), pin DTR is used for direction control." />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="DCTRL" description="Auto direction control enable.">
|
|
<Enum name="DISABLE_AUTO_DIRECTI" start="0" description="Disable Auto Direction Control." />
|
|
<Enum name="ENABLE_AUTO_DIRECTIO" start="1" description="Enable Auto Direction Control." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="OINV" description="Polarity control. This bit reverses the polarity of the direction control signal on the RTS (or DTR) pin.">
|
|
<Enum name="LOW" start="0" description="The direction control pin will be driven to logic 0 when the transmitter has data to be sent. It will be driven to logic 1 after the last bit of data has been transmitted." />
|
|
<Enum name="HIGH" start="1" description="The direction control pin will be driven to logic 1 when the transmitter has data to be sent. It will be driven to logic 0 after the last bit of data has been transmitted." />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x050" size="4" name="RS485ADRMATCH" access="Read/Write" description="RS-485/EIA-485 address match. Contains the address match value for RS-485/EIA-485 mode." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="ADRMATCH" description="Contains the address match value." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x054" size="4" name="RS485DLY" access="Read/Write" description="RS-485/EIA-485 direction control delay." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DLY" description="Contains the direction control (RTS or DTR) delay value. This register works in conjunction with an 8-bit counter." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x058" size="4" name="SYNCCTRL" access="Read/Write" description="Synchronous mode control register." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="SYNC" description="Enables synchronous mode.">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="CSRC" description="Clock source select.">
|
|
<Enum name="SYNCHRONOUS_SLAVE_MO" start="0" description="Synchronous slave mode (SCLK in)" />
|
|
<Enum name="SYNCHRONOUS_MASTER_M" start="1" description="Synchronous master mode (SCLK out)" />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="FES" description="Falling edge sampling.">
|
|
<Enum name="RISING" start="0" description="RxD is sampled on the rising edge of SCLK " />
|
|
<Enum name="FALLING" start="1" description="RxD is sampled on the falling edge of SCLK" />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="TSBYPASS" description="Transmit synchronization bypass in synchronous slave mode.">
|
|
<Enum name="SYNC" start="0" description="The input clock is synchronized prior to being used in clock edge detection logic" />
|
|
<Enum name="NOSYNC" start="1" description="The input clock is not synchronized prior to being used in clock edge detection logic. This allows for a high er input clock rate at the expense of potential metastability." />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="CSCEN" description="Continuous master clock enable (used only when CSRC is 1)">
|
|
<Enum name="SCLK_CYCLES_ONLY_WHE" start="0" description="SCLK cycles only when characters are being sent on TxD" />
|
|
<Enum name="SCLK_RUNS_CONTINUOUS" start="1" description="SCLK runs continuously (characters can be received on RxD independently from transmission on TxD)" />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="SSDIS" description="Start/stop bits">
|
|
<Enum name="SEND_START_STOP" start="0" description="Send start and stop bits as in other modes." />
|
|
<Enum name="NOT_SEND_START_STOP" start="1" description="Do not send start/stop bits." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="CCCLR" description="Continuous clock clear">
|
|
<Enum name="CSCEN_IS_UNDER_SOFTW" start="0" description="CSCEN is under software control." />
|
|
<Enum name="HARDWARE_CLEARS_CSCE" start="1" description="Hardware clears CSCEN after each character is received." />
|
|
</BitField>
|
|
<BitField start="7" size="25" name="RESERVED" description="Reserved. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="ADC" start="0x4001C000" description="ADC">
|
|
<Register start="+0x000" size="4" name="CR" access="Read/Write" description="A/D Control Register. The CR register must be written to select the operating mode before A/D conversion can occur." reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="SEL" description="Selects which of the AD7:0 pins is (are) to be sampled and converted. Bit 0 selects Pin AD0, bit 1 selects pin AD1,..., and bit 7 selects pin AD7. In software-controlled mode (BURST = 0), only one channel can be selected, i.e. only one of these bits should be 1. In hardware scan mode (BURST = 1), any numbers of channels can be selected, i.e any or all bits can be set to 1. If all bits are set to 0, channel 0 is selected automatically (SEL = 0x01)." />
|
|
<BitField start="8" size="8" name="CLKDIV" description="The main clock (PCLK_ADC) is divided by (this value plus one) to produce the clock for the A/D converter. The clock should be less than or equal to 15.5 MHz(12-bit mode) or 31 MHz (10-bit mode) in software-controlled mode (BURST bit = 0).. Typically, software should program the smallest value in this field that yields a clock of 15.5 MHz or slightly less, but in certain cases (such as a high-impedance analog source) a slower clock may be desirable." />
|
|
<BitField start="16" size="1" name="BURST" description="Burst mode If BURST is set to 1, the ADGINTEN bit in the INTEN register (Table 327) must be set to 0.">
|
|
<Enum name="SOFTWARE_CONTROLLED_" start="0" description="Software-controlled mode: Conversions are software-controlled and require 31 clocks." />
|
|
<Enum name="HARDWARE_SCAN_MODE_" start="1" description="Hardware scan mode: The AD converter does repeated conversions at the rate selected by the CLKS field, scanning (if necessary) through the pins selected by ones in the SEL field. The first conversion after the start corresponds to the least-significant bit set to 1 in the SEL field, then the next higher bits (pins) set to one are scanned if applicable. Repeated conversions can be terminated by clearing this bit, but the conversion in progress when this bit is cleared will be completed. Important: START bits must be 000 when BURST = 1, or conversions will not start." />
|
|
</BitField>
|
|
<BitField start="17" size="4" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="21" size="1" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="22" size="1" name="LPWRMODE" description="Low-power mode">
|
|
<Enum name="DISABLE_THE_LOW_POWE" start="0" description="Disable the low-power ADC mode. The analog circuitry remains activated when no conversions are requested." />
|
|
<Enum name="ENABLE_THE_LOW_POWER" start="1" description="Enable the low-power ADC mode. The analog circuitry is automatically powered-down when no conversions are taking place. When any (hardware or software) triggering event is detected, the analog circuitry is enabled. After the required start-up time, the requested conversion will be launched. Once the conversion completes, the analog-circuitry will again be powered-down provided no further conversions are pending. This mode will NOT power-up the A/D if the ADC is powered down (ADC_PD bit in the PDRUNCFG register is HIGH) or if the part is in Deep-sleep, Power-down, or Deep power-down mode." />
|
|
</BitField>
|
|
<BitField start="23" size="1" name="MODE10BIT" description="10-bit conversion rate mode">
|
|
<Enum name="DISABLE_THE_10_BIT_C" start="0" description="Disable the 10-bit conversion rate mode." />
|
|
<Enum name="ENABLE_THE_10_BIT_CO" start="1" description="Enable the 10-bit conversion rate mode with high conversion rate.The A/D resolution is reduced to 10 bits (the two LSB of the conversion result will be forced to 0). The clock rate (set via the CLKDIV field) can be doubled to up to 31 MHz to achieve a conversion rate of up to one million samples per second." />
|
|
</BitField>
|
|
<BitField start="24" size="3" name="START" description="When the BURST bit is 0, these bits control whether and when an A/D conversion is started:">
|
|
<Enum name="NO_START_THIS_VALUE" start="0x0" description="No start (this value should be used when clearing PDN to 0)." />
|
|
<Enum name="START_CONVERSION_NOW" start="0x1" description="Start conversion now." />
|
|
<Enum name="PIO0_2" start="0x2" description="Start conversion when the edge selected by bit 27 occurs on PIO0_2/SSEL/CT16B0_CAP0." />
|
|
<Enum name="PIO1_5" start="0x3" description="Start conversion when the edge selected by bit 27 occurs on PIO1_5/DIR/CT32B0_CAP0." />
|
|
<Enum name="CT32B0_MAT0" start="0x4" description="Start conversion when the edge selected by bit 27 occurs on CT32B0_MAT0[1]." />
|
|
<Enum name="CT32B0_MAT1" start="0x5" description="Start conversion when the edge selected by bit 27 occurs on CT32B0_MAT1[1]." />
|
|
<Enum name="CT16B0_MAT0" start="0x6" description="Start conversion when the edge selected by bit 27 occurs on CT16B0_MAT0[1]." />
|
|
<Enum name="CT16B0_MAT1" start="0x7" description="Start conversion when the edge selected by bit 27 occurs on CT16B0_MAT1[1]." />
|
|
</BitField>
|
|
<BitField start="27" size="1" name="EDGE" description="Edge control. This bit is significant only when the START field contains 010-111.">
|
|
<Enum name="RISING" start="0" description="Start conversion on a rising edge on the selected CAP/MAT signal." />
|
|
<Enum name="FALLING" start="1" description="Start conversion on a falling edge on the selected CAP/MAT signal." />
|
|
</BitField>
|
|
<BitField start="28" size="4" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="GDR" access="Read/Write" description="A/D Global Data Register. Contains the result of the most recent A/D conversion." reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="4" name="RESERVED" description="Reserved. These bits always read as zeros." />
|
|
<BitField start="4" size="12" name="V_VREF" description="When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin selected by the SEL field, divided by the voltage on the VDD pin or as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VSS/VREFN, while 0xFFF indicates that the voltage on ADn was close to, equal to, or greater than that on VDD/VREFP." />
|
|
<BitField start="16" size="8" name="RESERVED" description="Reserved. These bits always read as zeros." />
|
|
<BitField start="24" size="3" name="CHN" description="These bits contain the channel from which the result bits V_VREF were converted." />
|
|
<BitField start="27" size="3" name="RESERVED" description="Reserved. These bits always read as zeros." />
|
|
<BitField start="30" size="1" name="OVERRUN" description="This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits." />
|
|
<BitField start="31" size="1" name="DONE" description="This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read and when the ADCR is written. If the ADCR is written while a conversion is still in progress, this bit is set and a new conversion is started." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="INTEN" access="Read/Write" description="A/D Interrupt Enable Register. This register contains enable bits that allow the DONE flag of each A/D channel to be included or excluded from contributing to the generation of an A/D interrupt." reset_value="0x00000100" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="ADINTEN" description="These bits allow control over which A/D channels generate interrupts for conversion completion. When bit 0 is one, completion of a conversion on A/D channel 0 will generate an interrupt, when bit 1 is one, completion of a conversion on A/D channel 1 will generate an interrupt, etc." />
|
|
<BitField start="8" size="1" name="ADGINTEN" description="When 1, enables the global DONE flag in ADDR to generate an interrupt. When 0, only the individual A/D channels enabled by ADINTEN 7:0 will generate interrupts. This bit must be set to 0 in burst mode (BURST = 1 in the CR register)." />
|
|
<BitField start="9" size="23" name="RESERVED" description="Reserved. Unused, always 0." />
|
|
</Register>
|
|
<Register start="+0x010+0" size="4" name="DR[0]" access="Read/Write" description="A/D Channel N Data
Register. This register contains the result of the most recent conversion
completed on channel n" reset_value="0x00000100" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="RESERVED" description="Reserved." />
|
|
<BitField start="4" size="12" name="V_VREF" description="When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VREFN/VSS, while 0xFFF indicates that the voltage on AD input was close to, equal to, or greater than that on VREFP/VDD." />
|
|
<BitField start="16" size="14" name="RESERVED" description="Reserved." />
|
|
<BitField start="30" size="1" name="OVERRUN" description="This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits.This bit is cleared by reading this register." />
|
|
<BitField start="31" size="1" name="DONE" description="This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read." />
|
|
</Register>
|
|
<Register start="+0x010+4" size="4" name="DR[1]" access="Read/Write" description="A/D Channel N Data
Register. This register contains the result of the most recent conversion
completed on channel n" reset_value="0x00000100" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="RESERVED" description="Reserved." />
|
|
<BitField start="4" size="12" name="V_VREF" description="When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VREFN/VSS, while 0xFFF indicates that the voltage on AD input was close to, equal to, or greater than that on VREFP/VDD." />
|
|
<BitField start="16" size="14" name="RESERVED" description="Reserved." />
|
|
<BitField start="30" size="1" name="OVERRUN" description="This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits.This bit is cleared by reading this register." />
|
|
<BitField start="31" size="1" name="DONE" description="This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read." />
|
|
</Register>
|
|
<Register start="+0x010+8" size="4" name="DR[2]" access="Read/Write" description="A/D Channel N Data
Register. This register contains the result of the most recent conversion
completed on channel n" reset_value="0x00000100" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="RESERVED" description="Reserved." />
|
|
<BitField start="4" size="12" name="V_VREF" description="When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VREFN/VSS, while 0xFFF indicates that the voltage on AD input was close to, equal to, or greater than that on VREFP/VDD." />
|
|
<BitField start="16" size="14" name="RESERVED" description="Reserved." />
|
|
<BitField start="30" size="1" name="OVERRUN" description="This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits.This bit is cleared by reading this register." />
|
|
<BitField start="31" size="1" name="DONE" description="This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read." />
|
|
</Register>
|
|
<Register start="+0x010+12" size="4" name="DR[3]" access="Read/Write" description="A/D Channel N Data
Register. This register contains the result of the most recent conversion
completed on channel n" reset_value="0x00000100" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="RESERVED" description="Reserved." />
|
|
<BitField start="4" size="12" name="V_VREF" description="When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VREFN/VSS, while 0xFFF indicates that the voltage on AD input was close to, equal to, or greater than that on VREFP/VDD." />
|
|
<BitField start="16" size="14" name="RESERVED" description="Reserved." />
|
|
<BitField start="30" size="1" name="OVERRUN" description="This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits.This bit is cleared by reading this register." />
|
|
<BitField start="31" size="1" name="DONE" description="This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read." />
|
|
</Register>
|
|
<Register start="+0x010+16" size="4" name="DR[4]" access="Read/Write" description="A/D Channel N Data
Register. This register contains the result of the most recent conversion
completed on channel n" reset_value="0x00000100" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="RESERVED" description="Reserved." />
|
|
<BitField start="4" size="12" name="V_VREF" description="When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VREFN/VSS, while 0xFFF indicates that the voltage on AD input was close to, equal to, or greater than that on VREFP/VDD." />
|
|
<BitField start="16" size="14" name="RESERVED" description="Reserved." />
|
|
<BitField start="30" size="1" name="OVERRUN" description="This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits.This bit is cleared by reading this register." />
|
|
<BitField start="31" size="1" name="DONE" description="This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read." />
|
|
</Register>
|
|
<Register start="+0x010+20" size="4" name="DR[5]" access="Read/Write" description="A/D Channel N Data
Register. This register contains the result of the most recent conversion
completed on channel n" reset_value="0x00000100" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="RESERVED" description="Reserved." />
|
|
<BitField start="4" size="12" name="V_VREF" description="When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VREFN/VSS, while 0xFFF indicates that the voltage on AD input was close to, equal to, or greater than that on VREFP/VDD." />
|
|
<BitField start="16" size="14" name="RESERVED" description="Reserved." />
|
|
<BitField start="30" size="1" name="OVERRUN" description="This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits.This bit is cleared by reading this register." />
|
|
<BitField start="31" size="1" name="DONE" description="This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read." />
|
|
</Register>
|
|
<Register start="+0x010+24" size="4" name="DR[6]" access="Read/Write" description="A/D Channel N Data
Register. This register contains the result of the most recent conversion
completed on channel n" reset_value="0x00000100" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="RESERVED" description="Reserved." />
|
|
<BitField start="4" size="12" name="V_VREF" description="When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VREFN/VSS, while 0xFFF indicates that the voltage on AD input was close to, equal to, or greater than that on VREFP/VDD." />
|
|
<BitField start="16" size="14" name="RESERVED" description="Reserved." />
|
|
<BitField start="30" size="1" name="OVERRUN" description="This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits.This bit is cleared by reading this register." />
|
|
<BitField start="31" size="1" name="DONE" description="This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read." />
|
|
</Register>
|
|
<Register start="+0x010+28" size="4" name="DR[7]" access="Read/Write" description="A/D Channel N Data
Register. This register contains the result of the most recent conversion
completed on channel n" reset_value="0x00000100" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="RESERVED" description="Reserved." />
|
|
<BitField start="4" size="12" name="V_VREF" description="When DONE is 1, this field contains a binary fraction representing the voltage on the ADn pin as it falls within the range of VREFP to VREFN. Zero in the field indicates that the voltage on the ADn pin was less than, equal to, or close to that on VREFN/VSS, while 0xFFF indicates that the voltage on AD input was close to, equal to, or greater than that on VREFP/VDD." />
|
|
<BitField start="16" size="14" name="RESERVED" description="Reserved." />
|
|
<BitField start="30" size="1" name="OVERRUN" description="This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the V_VREF bits.This bit is cleared by reading this register." />
|
|
<BitField start="31" size="1" name="DONE" description="This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read." />
|
|
</Register>
|
|
<Register start="+0x030" size="4" name="STAT" access="ReadOnly" description="A/D Status Register. This register contains DONE and OVERRUN flags for all of the A/D channels, as well as the A/D interrupt flag." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DONE" description="These bits mirror the DONE status flags that appear in the result register for each A/D channel n." />
|
|
<BitField start="8" size="8" name="OVERRUN" description="These bits mirror the OVERRRUN status flags that appear in the result register for each A/D channel n. Reading ADSTAT allows checking the status of all A/D channels simultaneously." />
|
|
<BitField start="16" size="1" name="ADINT" description="This bit is the A/D interrupt flag. It is one when any of the individual A/D channel Done flags is asserted and enabled to contribute to the A/D interrupt via the ADINTEN register." />
|
|
<BitField start="17" size="15" name="RESERVED" description="Reserved. Unused, always 0." />
|
|
</Register>
|
|
<Register start="+0x034" size="4" name="TRM" access="Read/Write" description="A/D trim register" reset_value="0xF00" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="RESERVED" description="Reserved." />
|
|
<BitField start="4" size="4" name="ADCOFFS" description="Offset trim bits for ADC operation. Initialized by the boot code. Can be overwritten by the user." />
|
|
<BitField start="8" size="4" name="TRIM" description="Written-to by boot code. Can not be overwritten by the user. These bits are locked after boot code write." />
|
|
<BitField start="12" size="20" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="PMU" start="0x40038000" description="Power Management Unit (PMU)">
|
|
<Register start="+0x000" size="4" name="PCON" access="Read/Write" description="Power control register" reset_value="0x0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="PM" description="Power mode">
|
|
<Enum name="DEFAULT" start="0x0" description="Default. The part is in active or sleep mode." />
|
|
<Enum name="DEEPSLEEP" start="0x1" description="ARM WFI will enter Deep-sleep mode." />
|
|
<Enum name="POWERDOWN" start="0x2" description="ARM WFI will enter Power-down mode." />
|
|
<Enum name="DEEPPOWERDOWN" start="0x3" description="ARM WFI will enter Deep-power down mode (ARM Cortex-M0 core powered-down)." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="NODPD" description="A 1 in this bit prevents entry to Deep power-down mode when 0x3 is written to the PM field above, the SLEEPDEEP bit is set, and a WFI is executed. Execution continues after the WFI if this bit is 1. This bit is cleared only by power-on reset, so writing a one to this bit locks the part in a mode in which Deep power-down mode is blocked." />
|
|
<BitField start="4" size="4" name="RESERVED" description="Reserved. Do not write ones to this bit." />
|
|
<BitField start="8" size="1" name="SLEEPFLAG" description="Sleep mode flag">
|
|
<Enum name="NOPOWERDOWN" start="0" description="Read: No power-down mode entered. LPC11U1x is in Active mode. Write: No effect." />
|
|
<Enum name="POWERDOWN" start="1" description="Read: Sleep/Deep-sleep or Deep power-down mode entered. Write: Writing a 1 clears the SLEEPFLAG bit to 0." />
|
|
</BitField>
|
|
<BitField start="9" size="2" name="RESERVED" description="Reserved. Do not write ones to this bit." />
|
|
<BitField start="11" size="1" name="DPDFLAG" description="Deep power-down flag">
|
|
<Enum name="DPNOTENTERED" start="0" description="Read: Deep power-down mode not entered. Write: No effect." />
|
|
<Enum name="DPENTERED" start="1" description="Read: Deep power-down mode entered. Write: Clear the Deep power-down flag." />
|
|
</BitField>
|
|
<BitField start="12" size="20" name="RESERVED" description="Reserved. Do not write ones to this bit." />
|
|
</Register>
|
|
<Register start="+0x004+0" size="4" name="GPREG0" access="Read/Write" description="General purpose register 0" reset_value="0x0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="GPDATA" description="Data retained during Deep power-down mode." />
|
|
</Register>
|
|
<Register start="+0x004+4" size="4" name="GPREG1" access="Read/Write" description="General purpose register 0" reset_value="0x0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="GPDATA" description="Data retained during Deep power-down mode." />
|
|
</Register>
|
|
<Register start="+0x004+8" size="4" name="GPREG2" access="Read/Write" description="General purpose register 0" reset_value="0x0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="GPDATA" description="Data retained during Deep power-down mode." />
|
|
</Register>
|
|
<Register start="+0x004+12" size="4" name="GPREG3" access="Read/Write" description="General purpose register 0" reset_value="0x0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="GPDATA" description="Data retained during Deep power-down mode." />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="GPREG4" access="Read/Write" description="General purpose register 4" reset_value="0x0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="10" name="RESERVED" description="Reserved. Do not write ones to this bit." />
|
|
<BitField start="10" size="1" name="WAKEUPHYS" description="WAKEUP pin hysteresis enable">
|
|
<Enum name="DISABLED" start="0" description="Hysteresis for WAKEUP pin disabled." />
|
|
<Enum name="ENABLED" start="1" description="Hysteresis for WAKEUP pin enabled." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="GPDATA" description="Data retained during Deep power-down mode." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="FLASHCTRL" start="0x4003C000" description="Flash programming firmware ">
|
|
<Register start="+0x09C" size="4" name="EEMSSTART" access="Read/Write" description="EEPROM BIST start address register" reset_value="0x0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="14" name="STARTA" description="BIST start address: Bit 0 is fixed zero since only even addresses are allowed." />
|
|
<BitField start="14" size="18" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x0A0" size="4" name="EEMSSTOP" access="Read/Write" description="EEPROM BIST stop address register" reset_value="0x0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="14" name="STOPA" description="BIST stop address: Bit 0 is fixed zero since only even addresses are allowed." />
|
|
<BitField start="14" size="16" name="RESERVED" description="Reserved" />
|
|
<BitField start="30" size="1" name="DEVSEL" description="BIST device select bit 0: the BIST signature is generated over the total memory space. Singe pages are interleaved over the EEPROM devices when multiple devices are used, the signature is generated over memory of multiple devices. 1: the BIST signature is generated only over a memory range located on a single EEPROM device. Therefore the internal address generation is done such that the address' CS bits are kept stable to select only the same device. The address' MSB and LSB bits are used to step through the memory range specified by the start and stop address fields. Note: if this bit is set the start and stop address fields must be programmed such that they both address the same EEPROM device. Therefore the address' CS bits in both the start and stop address must be the same." />
|
|
<BitField start="31" size="1" name="STRTBIST" description="BIST start bit Setting this bit will start the BIST. This bit is self-clearing." />
|
|
</Register>
|
|
<Register start="+0x0A4" size="4" name="EEMSSIG" access="ReadOnly" description="EEPROM 24-bit BIST signature register" reset_value="0x0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="DATA_SIG" description="BIST 16-bit signature calculated from only the data bytes" />
|
|
<BitField start="16" size="16" name="PARITY_SIG" description="BIST 16-bit signature calculated from only the parity bits of the data bytes" />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="FLASHCFG" access="Read/Write" description="Flash memory access time configuration register" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="2" name="FLASHTIM" description="Flash memory access time. FLASHTIM +1 is equal to the number of system clocks used for flash access.">
|
|
<Enum name="1_SYSTEM_CLOCK_FLASH" start="0x0" description="1 system clock flash access time (for system clock frequencies of up to 20 MHz)." />
|
|
<Enum name="2_SYSTEM_CLOCKS_FLAS" start="0x1" description="2 system clocks flash access time (for system clock frequencies of up to 40 MHz)." />
|
|
<Enum name="3_SYSTEM_CLOCKS_FLAS" start="0x2" description="3 system clocks flash access time (for system clock frequencies of up to 50 MHz)." />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved. User software must not change the value of these bits. Bits 31:2 must be written back exactly as read." />
|
|
</Register>
|
|
<Register start="+0x020" size="4" name="FMSSTART" access="Read/Write" description="Signature start address register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="17" name="START" description="Signature generation start address (corresponds to AHB byte address bits[20:4])." />
|
|
<BitField start="17" size="15" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x024" size="4" name="FMSSTOP" access="Read/Write" description="Signature stop-address register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="17" name="STOP" description="BIST stop address divided by 16 (corresponds to AHB byte address [20:4])." />
|
|
<BitField start="17" size="1" name="SIG_START" description="Start control bit for signature generation.">
|
|
<Enum name="SIGNATURE_GENERATION" start="0" description="Signature generation is stopped" />
|
|
<Enum name="INITIATE_SIGNATURE_G" start="1" description="Initiate signature generation" />
|
|
</BitField>
|
|
<BitField start="18" size="14" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x02C" size="4" name="FMSW0" access="ReadOnly" description="Word 0 [31:0]" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="32" name="SW0_31_0" description="Word 0 of 128-bit signature (bits 31 to 0)." />
|
|
</Register>
|
|
<Register start="+0x030" size="4" name="FMSW1" access="ReadOnly" description="Word 1 [63:32]" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="32" name="SW1_63_32" description="Word 1 of 128-bit signature (bits 63 to 32)." />
|
|
</Register>
|
|
<Register start="+0x034" size="4" name="FMSW2" access="ReadOnly" description="Word 2 [95:64]" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="32" name="SW2_95_64" description="Word 2 of 128-bit signature (bits 95 to 64)." />
|
|
</Register>
|
|
<Register start="+0x038" size="4" name="FMSW3" access="ReadOnly" description="Word 3 [127:96]" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="32" name="SW3_127_96" description="Word 3 of 128-bit signature (bits 127 to 96)." />
|
|
</Register>
|
|
<Register start="+0xFE0" size="4" name="FMSTAT" access="ReadOnly" description="Signature generation status register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="2" size="1" name="SIG_DONE" description="When 1, a previously started signature generation has completed. See FMSTATCLR register description for clearing this flag." />
|
|
<BitField start="3" size="29" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0xFE8" size="4" name="FMSTATCLR" access="WriteOnly" description="Signature generation status clear register" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="2" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
<BitField start="2" size="1" name="SIG_DONE_CLR" description="Writing a 1 to this bits clears the signature generation completion flag (SIG_DONE) in the FMSTAT register." />
|
|
<BitField start="3" size="29" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="SSP0" start="0x40040000" description="SSP/SPI">
|
|
<Register start="+0x000" size="4" name="CR0" access="Read/Write" description="Control Register 0. Selects the serial clock rate, bus type, and data size." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="DSS" description="Data Size Select. This field controls the number of bits transferred in each frame. Values 0000-0010 are not supported and should not be used.">
|
|
<Enum name="4_BIT_TRANSFER" start="0x3" description="4-bit transfer" />
|
|
<Enum name="5_BIT_TRANSFER" start="0x4" description="5-bit transfer" />
|
|
<Enum name="6_BIT_TRANSFER" start="0x5" description="6-bit transfer" />
|
|
<Enum name="7_BIT_TRANSFER" start="0x6" description="7-bit transfer" />
|
|
<Enum name="8_BIT_TRANSFER" start="0x7" description="8-bit transfer" />
|
|
<Enum name="9_BIT_TRANSFER" start="0x8" description="9-bit transfer" />
|
|
<Enum name="10_BIT_TRANSFER" start="0x9" description="10-bit transfer" />
|
|
<Enum name="11_BIT_TRANSFER" start="0xA" description="11-bit transfer" />
|
|
<Enum name="12_BIT_TRANSFER" start="0xB" description="12-bit transfer" />
|
|
<Enum name="13_BIT_TRANSFER" start="0xC" description="13-bit transfer" />
|
|
<Enum name="14_BIT_TRANSFER" start="0xD" description="14-bit transfer" />
|
|
<Enum name="15_BIT_TRANSFER" start="0xE" description="15-bit transfer" />
|
|
<Enum name="16_BIT_TRANSFER" start="0xF" description="16-bit transfer" />
|
|
</BitField>
|
|
<BitField start="4" size="2" name="FRF" description="Frame Format.">
|
|
<Enum name="SPI" start="0x0" description="SPI" />
|
|
<Enum name="TI" start="0x1" description="TI" />
|
|
<Enum name="MICROWIRE" start="0x2" description="Microwire" />
|
|
<Enum name="RESERVED" start="0x3" description="This combination is not supported and should not be used." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="CPOL" description="Clock Out Polarity. This bit is only used in SPI mode.">
|
|
<Enum name="LOW" start="0" description="SPI controller maintains the bus clock low between frames." />
|
|
<Enum name="HIGH" start="1" description="SPI controller maintains the bus clock high between frames." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="CPHA" description="Clock Out Phase. This bit is only used in SPI mode.">
|
|
<Enum name="FIRSTCLOCK" start="0" description="SPI controller captures serial data on the first clock transition of the frame, that is, the transition away from the inter-frame state of the clock line." />
|
|
<Enum name="SECONDCLOCK" start="1" description="SPI controller captures serial data on the second clock transition of the frame, that is, the transition back to the inter-frame state of the clock line." />
|
|
</BitField>
|
|
<BitField start="8" size="8" name="SCR" description="Serial Clock Rate. The number of prescaler output clocks per bit on the bus, minus one. Given that CPSDVSR is the prescale divider, and the APB clock PCLK clocks the prescaler, the bit frequency is PCLK / (CPSDVSR X [SCR+1])." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="CR1" access="Read/Write" description="Control Register 1. Selects master/slave and other modes." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="LBM" description="Loop Back Mode.">
|
|
<Enum name="DURING_NORMAL_OPERAT" start="0" description="During normal operation." />
|
|
<Enum name="SERIAL_INPUT_IS_TAKE" start="1" description="Serial input is taken from the serial output (MOSI or MISO) rather than the serial input pin (MISO or MOSI respectively)." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="SSE" description="SPI Enable.">
|
|
<Enum name="DISABLED" start="0" description="The SPI controller is disabled." />
|
|
<Enum name="ENABLED" start="1" description="The SPI controller will interact with other devices on the serial bus. Software should write the appropriate control information to the other SSP/SPI registers and interrupt controller registers, before setting this bit." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="MS" description="Master/Slave Mode.This bit can only be written when the SSE bit is 0.">
|
|
<Enum name="MASTER" start="0" description="The SPI controller acts as a master on the bus, driving the SCLK, MOSI, and SSEL lines and receiving the MISO line." />
|
|
<Enum name="SLAVE" start="1" description="The SPI controller acts as a slave on the bus, driving MISO line and receiving SCLK, MOSI, and SSEL lines." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="SOD" description="Slave Output Disable. This bit is relevant only in slave mode (MS = 1). If it is 1, this blocks this SPI controller from driving the transmit data line (MISO)." />
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="DR" access="None" description="Data Register. Writes fill the transmit FIFO, and reads empty the receive FIFO." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="DATA" description="Write: software can write data to be sent in a future frame to this register whenever the TNF bit in the Status register is 1, indicating that the Tx FIFO is not full. If the Tx FIFO was previously empty and the SPI controller is not busy on the bus, transmission of the data will begin immediately. Otherwise the data written to this register will be sent as soon as all previous data has been sent (and received). If the data length is less than 16 bit, software must right-justify the data written to this register. Read: software can read data from this register whenever the RNE bit in the Status register is 1, indicating that the Rx FIFO is not empty. When software reads this register, the SPI controller returns data from the least recent frame in the Rx FIFO. If the data length is less than 16 bit, the data is right-justified in this field with higher order bits filled with 0s." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="SR" access="ReadOnly" description="Status Register" reset_value="0x00000003" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="TFE" description="Transmit FIFO Empty. This bit is 1 is the Transmit FIFO is empty, 0 if not." />
|
|
<BitField start="1" size="1" name="TNF" description="Transmit FIFO Not Full. This bit is 0 if the Tx FIFO is full, 1 if not." />
|
|
<BitField start="2" size="1" name="RNE" description="Receive FIFO Not Empty. This bit is 0 if the Receive FIFO is empty, 1 if not." />
|
|
<BitField start="3" size="1" name="RFF" description="Receive FIFO Full. This bit is 1 if the Receive FIFO is full, 0 if not." />
|
|
<BitField start="4" size="1" name="BSY" description="Busy. This bit is 0 if the SPI controller is idle, 1 if it is currently sending/receiving a frame and/or the Tx FIFO is not empty." />
|
|
<BitField start="5" size="27" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="CPSR" access="Read/Write" description="Clock Prescale Register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="CPSDVSR" description="This even value between 2 and 254, by which SPI_PCLK is divided to yield the prescaler output clock. Bit 0 always reads as 0." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="IMSC" access="Read/Write" description="Interrupt Mask Set and Clear Register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RORIM" description="Software should set this bit to enable interrupt when a Receive Overrun occurs, that is, when the Rx FIFO is full and another frame is completely received. The ARM spec implies that the preceding frame data is overwritten by the new frame data when this occurs." />
|
|
<BitField start="1" size="1" name="RTIM" description="Software should set this bit to enable interrupt when a Receive Time-out condition occurs. A Receive Time-out occurs when the Rx FIFO is not empty, and no has not been read for a time-out period. The time-out period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR X [SCR+1])." />
|
|
<BitField start="2" size="1" name="RXIM" description="Software should set this bit to enable interrupt when the Rx FIFO is at least half full." />
|
|
<BitField start="3" size="1" name="TXIM" description="Software should set this bit to enable interrupt when the Tx FIFO is at least half empty." />
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x018" size="4" name="RIS" access="ReadOnly" description="Raw Interrupt Status Register" reset_value="0x00000008" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RORRIS" description="This bit is 1 if another frame was completely received while the RxFIFO was full. The ARM spec implies that the preceding frame data is overwritten by the new frame data when this occurs." />
|
|
<BitField start="1" size="1" name="RTRIS" description="This bit is 1 if the Rx FIFO is not empty, and has not been read for a time-out period. The time-out period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR X [SCR+1])." />
|
|
<BitField start="2" size="1" name="RXRIS" description="This bit is 1 if the Rx FIFO is at least half full." />
|
|
<BitField start="3" size="1" name="TXRIS" description="This bit is 1 if the Tx FIFO is at least half empty." />
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x01C" size="4" name="MIS" access="ReadOnly" description="Masked Interrupt Status Register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RORMIS" description="This bit is 1 if another frame was completely received while the RxFIFO was full, and this interrupt is enabled." />
|
|
<BitField start="1" size="1" name="RTMIS" description="This bit is 1 if the Rx FIFO is not empty, has not been read for a time-out period, and this interrupt is enabled. The time-out period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR X [SCR+1])." />
|
|
<BitField start="2" size="1" name="RXMIS" description="This bit is 1 if the Rx FIFO is at least half full, and this interrupt is enabled." />
|
|
<BitField start="3" size="1" name="TXMIS" description="This bit is 1 if the Tx FIFO is at least half empty, and this interrupt is enabled." />
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x020" size="4" name="ICR" access="WriteOnly" description="SSPICR Interrupt Clear Register" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="RORIC" description="Writing a 1 to this bit clears the frame was received when RxFIFO was full interrupt." />
|
|
<BitField start="1" size="1" name="RTIC" description="Writing a 1 to this bit clears the Rx FIFO was not empty and has not been read for a timeout period interrupt. The timeout period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR X [SCR+1])." />
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="IOCON" start="0x40044000" description="IO ocnfiguration">
|
|
<Register start="+0x000" size="4" name="RESET_PIO0_0" access="Read/Write" description="I/O configuration for pin RESET/PIO0_0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="RESET_" start="0x0" description="RESET." />
|
|
<Enum name="PIO0_0_" start="0x1" description="PIO0_0." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="PIO0_1" access="Read/Write" description="I/O configuration for pin PIO0_1/CLKOUT/CT32B0_MAT2/ USB_FTOGGLE" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="PIO0_1_" start="0x0" description="PIO0_1." />
|
|
<Enum name="CLKOUT_" start="0x1" description="CLKOUT." />
|
|
<Enum name="CT32B0_MAT2_" start="0x2" description="CT32B0_MAT2." />
|
|
<Enum name="USB_FTOGGLE_" start="0x3" description="USB_FTOGGLE." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="PIO0_2" access="Read/Write" description="I/O configuration for pin PIO0_2/SSEL0/CT16B0_CAP0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO0_2_" start="0x0" description="PIO0_2." />
|
|
<Enum name="SSEL0_" start="0x1" description="SSEL0." />
|
|
<Enum name="CT16B0_CAP0_" start="0x2" description="CT16B0_CAP0." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="PIO0_3" access="Read/Write" description="I/O configuration for pin PIO0_3/USB_VBUS" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO0_3_" start="0x0" description="PIO0_3." />
|
|
<Enum name="USB_VBUS_" start="0x1" description="USB_VBUS." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="PIO0_4" access="Read/Write" description="I/O configuration for pin PIO0_4/SCL" reset_value="0x0000080" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO0_4_OPEN_DRAIN_P" start="0x0" description="PIO0_4 (open-drain pin)." />
|
|
<Enum name="I2C_SCL_OPEN_DRAIN_" start="0x1" description="I2C SCL (open-drain pin)." />
|
|
</BitField>
|
|
<BitField start="3" size="5" name="RESERVED" description="Reserved." />
|
|
<BitField start="8" size="2" name="I2CMODE" description="Selects I2C mode (see Section 6.3.8). Select Standard mode (I2CMODE = 0, default) or Standard I/O functionality (I2CMODE = 1) if the pin function is GPIO (FUNC = 0).">
|
|
<Enum name="STANDARD_MODE_FAST" start="0x0" description="Standard mode/ Fast-mode I2C." />
|
|
<Enum name="STANDARD_IO_FUNCTIO" start="0x1" description="Standard I/O functionality" />
|
|
<Enum name="FAST_MODE_PLUS_I2C" start="0x2" description="Fast-mode Plus I2C" />
|
|
<Enum name="RESERVED_" start="0x3" description="Reserved." />
|
|
</BitField>
|
|
<BitField start="10" size="22" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="PIO0_5" access="Read/Write" description="I/O configuration for pin PIO0_5/SDA" reset_value="0x0000080" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO0_5_OPEN_DRAIN_P" start="0x0" description="PIO0_5 (open-drain pin)." />
|
|
<Enum name="I2C_SDA_OPEN_DRAIN_" start="0x1" description="I2C SDA (open-drain pin)." />
|
|
</BitField>
|
|
<BitField start="8" size="2" name="I2CMODE" description="Selects I2C mode (see Section 6.3.8). Select Standard mode (I2CMODE = 00, default) or Standard I/O functionality (I2CMODE = 01) if the pin function is GPIO (FUNC = 0).">
|
|
<Enum name="STANDARD_MODE_FAST" start="0x0" description="Standard mode/ Fast-mode I2C." />
|
|
<Enum name="STANDARD_IO_FUNCTIO" start="0x1" description="Standard I/O functionality" />
|
|
<Enum name="FAST_MODE_PLUS_I2C" start="0x2" description="Fast-mode Plus I2C" />
|
|
<Enum name="RESERVED_" start="0x3" description="Reserved." />
|
|
</BitField>
|
|
<BitField start="10" size="22" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x018" size="4" name="PIO0_6" access="Read/Write" description="I/O configuration for pin PIO0_6/USB_CONNECT/SCK0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO0_6_" start="0x0" description="PIO0_6." />
|
|
<Enum name="USB_CONNECT_" start="0x1" description="USB_CONNECT." />
|
|
<Enum name="SCK0_" start="0x2" description="SCK0." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x01C" size="4" name="PIO0_7" access="Read/Write" description="I/O configuration for pin PIO0_7/CTS" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO0_7_" start="0x0" description="PIO0_7." />
|
|
<Enum name="CTS_" start="0x1" description="CTS." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x020" size="4" name="PIO0_8" access="Read/Write" description="I/O configuration for pin PIO0_8/MISO0/CT16B0_MAT0/ ARM_TRACE_CLK" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="PIO0_8_" start="0x0" description="PIO0_8." />
|
|
<Enum name="MISO0_" start="0x1" description="MISO0." />
|
|
<Enum name="CT16B0_MAT0_" start="0x2" description="CT16B0_MAT0." />
|
|
<Enum name="ARM_TRACE_CLK" start="0x3" description="ARM_TRACE_CLK" />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x024" size="4" name="PIO0_9" access="Read/Write" description="I/O configuration for pin PIO0_9/MOSI0/CT16B0_MAT1/ ARM_TRACE_SWV" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="PIO0_9_" start="0x0" description="PIO0_9." />
|
|
<Enum name="MOSI0_" start="0x1" description="MOSI0." />
|
|
<Enum name="CT16B0_MAT1_" start="0x2" description="CT16B0_MAT1." />
|
|
<Enum name="ARM_TRACE_SWV" start="0x3" description="ARM_TRACE_SWV" />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x028" size="4" name="SWCLK_PIO0_10" access="Read/Write" description="I/O configuration for pin SWCLK/PIO0_10/ SCK0/CT16B0_MAT2" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="SWCLK_" start="0x0" description="SWCLK." />
|
|
<Enum name="PIO0_10_" start="0x1" description="PIO0_10." />
|
|
<Enum name="SCK0_" start="0x2" description="SCK0." />
|
|
<Enum name="CT16B0_MAT2_" start="0x3" description="CT16B0_MAT2." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x02C" size="4" name="TDI_PIO0_11" access="Read/Write" description="I/O configuration for pin TDI/PIO0_11/AD0/CT32B0_MAT3" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="TDI_" start="0x0" description="TDI." />
|
|
<Enum name="PIO0_11_" start="0x1" description="PIO0_11." />
|
|
<Enum name="AD0_" start="0x2" description="AD0." />
|
|
<Enum name="CT32B0_MAT3_" start="0x3" description="CT32B0_MAT3." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="ADMODE" description="Selects Analog/Digital mode.">
|
|
<Enum name="ANALOG_INPUT_MODE_" start="0" description="Analog input mode." />
|
|
<Enum name="DIGITAL_FUNCTIONAL_M" start="1" description="Digital functional mode." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="FILTR" description="Selects 10 ns input glitch filter.">
|
|
<Enum name="FILTER_ENABLED_" start="0" description="Filter enabled." />
|
|
<Enum name="FILTER_DISABLED_" start="1" description="Filter disabled." />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x030" size="4" name="TMS_PIO0_12" access="Read/Write" description="I/O configuration for pin TMS/PIO0_12/AD1/CT32B1_CAP0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="TMS_" start="0x0" description="TMS." />
|
|
<Enum name="PIO0_12_" start="0x1" description="PIO0_12." />
|
|
<Enum name="AD1_" start="0x2" description="AD1." />
|
|
<Enum name="CT32B1_CAP0_" start="0x3" description="CT32B1_CAP0." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="ADMODE" description="Selects Analog/Digital mode.">
|
|
<Enum name="ANALOG_INPUT_MODE_" start="0" description="Analog input mode." />
|
|
<Enum name="DIGITAL_FUNCTIONAL_M" start="1" description="Digital functional mode." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="FILTR" description="Selects 10 ns input glitch filter.">
|
|
<Enum name="FILTER_ENABLED_" start="0" description="Filter enabled." />
|
|
<Enum name="FILTER_DISABLED_" start="1" description="Filter disabled." />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x034" size="4" name="TDO_PIO0_13" access="Read/Write" description="I/O configuration for pin TDO/PIO0_13/AD2/CT32B1_MAT0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="TDO_" start="0x0" description="TDO." />
|
|
<Enum name="PIO0_13_" start="0x1" description="PIO0_13." />
|
|
<Enum name="AD2_" start="0x2" description="AD2." />
|
|
<Enum name="CT32B1_MAT0_" start="0x3" description="CT32B1_MAT0." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="ADMODE" description="Selects Analog/Digital mode.">
|
|
<Enum name="ANALOG_INPUT_MODE_" start="0" description="Analog input mode." />
|
|
<Enum name="DIGITAL_FUNCTIONAL_M" start="1" description="Digital functional mode." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="FILTR" description="Selects 10 ns input glitch filter.">
|
|
<Enum name="FILTER_ENABLED_" start="0" description="Filter enabled." />
|
|
<Enum name="FILTER_DISABLED_" start="1" description="Filter disabled." />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x038" size="4" name="TRST_PIO0_14" access="Read/Write" description="I/O configuration for pin TRST/PIO0_14/AD3/CT32B1_MAT1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="TRST_" start="0x0" description="TRST." />
|
|
<Enum name="PIO0_14_" start="0x1" description="PIO0_14." />
|
|
<Enum name="AD3_" start="0x2" description="AD3." />
|
|
<Enum name="CT32B1_MAT1_" start="0x3" description="CT32B1_MAT1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="ADMODE" description="Selects Analog/Digital mode.">
|
|
<Enum name="ANALOG_INPUT_MODE_" start="0" description="Analog input mode." />
|
|
<Enum name="DIGITAL_FUNCTIONAL_M" start="1" description="Digital functional mode." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="FILTR" description="Selects 10 ns input glitch filter.">
|
|
<Enum name="FILTER_ENABLED_" start="0" description="Filter enabled." />
|
|
<Enum name="FILTER_DISABLED_" start="1" description="Filter disabled." />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x03C" size="4" name="SWDIO_PIO0_15" access="Read/Write" description="I/O configuration for pin SWDIO/PIO0_15/AD4/CT32B1_MAT2" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="SWDIO_" start="0x0" description="SWDIO." />
|
|
<Enum name="PIO0_15_" start="0x1" description="PIO0_15." />
|
|
<Enum name="AD4_" start="0x2" description="AD4." />
|
|
<Enum name="CT32B1_MAT2_" start="0x3" description="CT32B1_MAT2." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="ADMODE" description="Selects Analog/Digital mode.">
|
|
<Enum name="ANALOG_INPUT_MODE_" start="0" description="Analog input mode." />
|
|
<Enum name="DIGITAL_FUNCTIONAL_M" start="1" description="Digital functional mode." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="FILTR" description="Selects 10 ns input glitch filter.">
|
|
<Enum name="FILTER_ENABLED_" start="0" description="Filter enabled." />
|
|
<Enum name="FILTER_DISABLED_" start="1" description="Filter disabled." />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x040" size="4" name="PIO0_16" access="Read/Write" description="I/O configuration for pin PIO0_16/AD5/CT32B1_MAT3/ WAKEUP" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. This pin functions as WAKEUP pin if the LPC1315/16/17/45/46/47 is in Deep power-down mode regardless of the value of FUNC. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO0_16_" start="0x0" description="PIO0_16." />
|
|
<Enum name="AD5_" start="0x1" description="AD5." />
|
|
<Enum name="CT32B1_MAT3_" start="0x2" description="CT32B1_MAT3." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="ADMODE" description="Selects Analog/Digital mode.">
|
|
<Enum name="ANALOG_INPUT_MODE_" start="0" description="Analog input mode." />
|
|
<Enum name="DIGITAL_FUNCTIONAL_M" start="1" description="Digital functional mode." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="FILTR" description="Selects 10 ns input glitch filter.">
|
|
<Enum name="FILTER_ENABLED_" start="0" description="Filter enabled." />
|
|
<Enum name="FILTER_DISABLED_" start="1" description="Filter disabled." />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x044" size="4" name="PIO0_17" access="Read/Write" description="I/O configuration for pin PIO0_17/RTS/CT32B0_CAP0/SCLK" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="PIO0_17_" start="0x0" description="PIO0_17." />
|
|
<Enum name="RTS_" start="0x1" description="RTS." />
|
|
<Enum name="CT32B0_CAP0_" start="0x2" description="CT32B0_CAP0." />
|
|
<Enum name="SCLK_UART_SYNCHRONO" start="0x3" description="SCLK (UART synchronous clock)." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x048" size="4" name="PIO0_18" access="Read/Write" description="I/O configuration for pin PIO0_18/RXD/CT32B0_MAT0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO0_18_" start="0x0" description="PIO0_18." />
|
|
<Enum name="RXD_" start="0x1" description="RXD." />
|
|
<Enum name="CT32B0_MAT0_" start="0x2" description="CT32B0_MAT0." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x04C" size="4" name="PIO0_19" access="Read/Write" description="I/O configuration for pin PIO0_19/TXD/CT32B0_MAT1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO0_19_" start="0x0" description="PIO0_19." />
|
|
<Enum name="TXD_" start="0x1" description="TXD." />
|
|
<Enum name="CT32B0_MAT1_" start="0x2" description="CT32B0_MAT1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x050" size="4" name="PIO0_20" access="Read/Write" description="I/O configuration for pin PIO0_20/CT16B1_CAP0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO0_20_" start="0x0" description="PIO0_20." />
|
|
<Enum name="CT16B1_CAP0_" start="0x1" description="CT16B1_CAP0." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x054" size="4" name="PIO0_21" access="Read/Write" description="I/O configuration for pin PIO0_21/CT16B1_MAT0/MOSI1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO0_21_" start="0x0" description="PIO0_21." />
|
|
<Enum name="CT16B1_MAT0_" start="0x1" description="CT16B1_MAT0." />
|
|
<Enum name="MOSI1_" start="0x2" description="MOSI1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x058" size="4" name="PIO0_22" access="Read/Write" description="I/O configuration for pin PIO0_22/AD6/CT16B1_MAT1/MISO1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="PIO0_22_" start="0x0" description="PIO0_22." />
|
|
<Enum name="AD6_" start="0x1" description="AD6." />
|
|
<Enum name="CT16B1_MAT1_" start="0x2" description="CT16B1_MAT1." />
|
|
<Enum name="MISO1_" start="0x3" description="MISO1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="ADMODE" description="Selects Analog/Digital mode.">
|
|
<Enum name="ANALOG_INPUT_MODE_" start="0" description="Analog input mode." />
|
|
<Enum name="DIGITAL_FUNCTIONAL_M" start="1" description="Digital functional mode." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="FILTR" description="Selects 10 ns input glitch filter.">
|
|
<Enum name="FILTER_ENABLED_" start="0" description="Filter enabled." />
|
|
<Enum name="FILTER_DISABLED_" start="1" description="Filter disabled." />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x05C" size="4" name="PIO0_23" access="Read/Write" description="I/O configuration for pin PIO0_23/AD7" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO0_23_" start="0x0" description="PIO0_23." />
|
|
<Enum name="AD7_" start="0x1" description="AD7." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="ADMODE" description="Selects Analog/Digital mode.">
|
|
<Enum name="ANALOG_INPUT_MODE_" start="0" description="Analog input mode." />
|
|
<Enum name="DIGITAL_FUNCTIONAL_M" start="1" description="Digital functional mode." />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="FILTR" description="Selects 10 ns input glitch filter.">
|
|
<Enum name="FILTER_ENABLED_" start="0" description="Filter enabled." />
|
|
<Enum name="FILTER_DISABLED_" start="1" description="Filter disabled." />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x060" size="4" name="PIO1_0" access="Read/Write" description="I/O configuration for pin PIO1_0/CT32B1_MAT0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO1_0_" start="0x0" description="PIO1_0." />
|
|
<Enum name="CT32B1_MAT1_" start="0x1" description="CT32B1_MAT1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x064" size="4" name="PIO1_1" access="Read/Write" description="I/O configuration for pin PIO1_1/CT32B1_MAT1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO1_1_" start="0x0" description="PIO1_1." />
|
|
<Enum name="CT32B1_MAT1_" start="0x1" description="CT32B1_MAT1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x068" size="4" name="PIO1_2" access="Read/Write" description="I/O configuration for pin PIO1_2/CT32B1_MAT2" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO1_2_" start="0x0" description="PIO1_2." />
|
|
<Enum name="CT32B1_MAT2_" start="0x1" description="CT32B1_MAT2." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x06C" size="4" name="PIO1_3" access="Read/Write" description="I/O configuration for pin PIO1_3/CT32B1_MAT3" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO1_3_" start="0x0" description="PIO1_3." />
|
|
<Enum name="CT32B1_MAT3_" start="0x1" description="CT32B1_MAT3." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x070" size="4" name="PIO1_4" access="Read/Write" description="I/O configuration for pin PIO1_4/CT32B1_CAP0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO1_4_" start="0x0" description="PIO1_4." />
|
|
<Enum name="CT32B1_CAP0_" start="0x1" description="CT32B1_CAP0." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x074" size="4" name="PIO1_5" access="Read/Write" description="I/O configuration for pin PIO1_5/CT32B1_CAP1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO1_5_" start="0x0" description="PIO1_5." />
|
|
<Enum name="CT32B1_CAP1_" start="0x1" description="CT32B1_CAP1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x07C" size="4" name="PIO1_7" access="Read/Write" description="I/O configuration for pin PIO1_7" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO1_7_" start="0x0" description="PIO1_7." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x080" size="4" name="PIO1_8" access="Read/Write" description="I/O configuration for pin PIO1_8" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x1 to 0x7 are reserved.">
|
|
<Enum name="PIO1_8_" start="0x0" description="PIO1_8." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x088" size="4" name="PIO1_10" access="Read/Write" description="I/O configuration for pin PIO1_10" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x1 to 0x7 are reserved.">
|
|
<Enum name="PIO1_10_" start="0x0" description="PIO1_10." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x08C" size="4" name="PIO1_11" access="Read/Write" description="I/O configuration for pin PIO1_11" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x1 to 0x7 are reserved.">
|
|
<Enum name="PIO1_11_" start="0x0" description="PIO1_11." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x094" size="4" name="PIO1_13" access="Read/Write" description="I/O configuration for PIO1_13/DTR/CT16B0_MAT0/TXD" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="PIO1_13" start="0x0" description="PIO1_13" />
|
|
<Enum name="DTR" start="0x1" description="DTR" />
|
|
<Enum name="CT16B0_MAT0" start="0x2" description="CT16B0_MAT0" />
|
|
<Enum name="TXD" start="0x3" description="TXD" />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x098" size="4" name="PIO1_14" access="Read/Write" description="I/O configuration for PIO1_14/DSR/CT16B0_MAT1/RXD" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="PIO1_14_" start="0x0" description="PIO1_14." />
|
|
<Enum name="DSR" start="0x1" description="DSR" />
|
|
<Enum name="CT16B0_MAT1" start="0x2" description="CT16B0_MAT1" />
|
|
<Enum name="RXD" start="0x3" description="RXD" />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x09C" size="4" name="PIO1_15" access="Read/Write" description="I/O configuration for pin PIO1_15/DCD/ CT16B0_MAT2/SCK1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x4 to 0x7 are reserved.">
|
|
<Enum name="PIO1_15_" start="0x0" description="PIO1_15." />
|
|
<Enum name="DCD_" start="0x1" description="DCD." />
|
|
<Enum name="CT16B0_MAT2_" start="0x2" description="CT16B0_MAT2." />
|
|
<Enum name="SCK1_" start="0x3" description="SCK1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0A0" size="4" name="PIO1_16" access="Read/Write" description="I/O configuration for pin PIO1_16/RI/CT16B0_CAP0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_16_" start="0x0" description="PIO1_16." />
|
|
<Enum name="RI_" start="0x1" description="RI." />
|
|
<Enum name="CT16B0_CAP0_" start="0x2" description="CT16B0_CAP0." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0A4" size="4" name="PIO1_17" access="Read/Write" description="I/O configuration for PIO1_17/CT16B0_CAP1/RXD" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_17_" start="0x0" description="PIO1_17." />
|
|
<Enum name="CT16B0_CAP1" start="0x1" description="CT16B0_CAP1" />
|
|
<Enum name="RXD" start="0x2" description="RXD" />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0A8" size="4" name="PIO1_18" access="Read/Write" description="I/O configuration for PIO1_18/CT16B1_CAP1/TXD" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_18" start="0x0" description="PIO1_18" />
|
|
<Enum name="CT16B1_CAP1" start="0x1" description="CT16B1_CAP1" />
|
|
<Enum name="TXD" start="0x2" description="TXD" />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0AC" size="4" name="PIO1_19" access="Read/Write" description="I/O configuration for pin PIO1_19/DTR/SSEL1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_19_" start="0x0" description="PIO1_19." />
|
|
<Enum name="DTR_" start="0x1" description="DTR." />
|
|
<Enum name="SSEL1_" start="0x2" description="SSEL1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0B0" size="4" name="PIO1_20" access="Read/Write" description="I/O configuration for pin PIO1_20/DSR/SCK1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_20_" start="0x0" description="PIO1_20." />
|
|
<Enum name="DSR_" start="0x1" description="DSR." />
|
|
<Enum name="SCK1_" start="0x2" description="SCK1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0B4" size="4" name="PIO1_21" access="Read/Write" description="I/O configuration for pin PIO1_21/DCD/MISO1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_21_" start="0x0" description="PIO1_21." />
|
|
<Enum name="DCD_" start="0x1" description="DCD." />
|
|
<Enum name="MISO1_" start="0x2" description="MISO1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0B8" size="4" name="PIO1_22" access="Read/Write" description="I/O configuration for pin PIO1_22/RI/MOSI1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_22_" start="0x0" description="PIO1_22." />
|
|
<Enum name="RI_" start="0x1" description="RI." />
|
|
<Enum name="MOSI1_" start="0x2" description="MOSI1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0BC" size="4" name="PIO1_23" access="Read/Write" description="I/O configuration for pin PIO1_23/CT16B1_MAT1/SSEL1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_23_" start="0x0" description="PIO1_23." />
|
|
<Enum name="CT16B1_MAT1_" start="0x1" description="CT16B1_MAT1." />
|
|
<Enum name="SSEL1_" start="0x2" description="SSEL1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0C0" size="4" name="PIO1_24" access="Read/Write" description="I/O configuration for pin PIO1_24/ CT32B0_MAT0" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO1_24_" start="0x0" description="PIO1_24." />
|
|
<Enum name="CT32B0_MAT0_" start="0x1" description="CT32B0_MAT0." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0C4" size="4" name="PIO1_25" access="Read/Write" description="I/O configuration for pin PIO1_25/CT32B0_MAT1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x2 to 0x7 are reserved.">
|
|
<Enum name="PIO1_25_" start="0x0" description="PIO1_25." />
|
|
<Enum name="CT32B0_MAT1_" start="0x1" description="CT32B0_MAT1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0C8" size="4" name="PIO1_26" access="Read/Write" description="I/O configuration for pin PIO1_26/CT32B0_MAT2/ RXD" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_26_" start="0x0" description="PIO1_26." />
|
|
<Enum name="CT32B0_MAT2" start="0x1" description="CT32B0_MAT2" />
|
|
<Enum name="RXD_" start="0x2" description="RXD." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0CC" size="4" name="PIO1_27" access="Read/Write" description="I/O configuration for pin PIO1_27/CT32B0_MAT3/ TXD" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_27_" start="0x0" description="PIO1_27." />
|
|
<Enum name="CT32B0_MAT3_" start="0x1" description="CT32B0_MAT3." />
|
|
<Enum name="TXD_" start="0x2" description="TXD." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0D0" size="4" name="PIO1_28" access="Read/Write" description="I/O configuration for pin PIO1_28/CT32B0_CAP0/ SCLK" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_28_" start="0x0" description="PIO1_28." />
|
|
<Enum name="CT32B0_CAP0_" start="0x1" description="CT32B0_CAP0." />
|
|
<Enum name="SCLK_" start="0x2" description="SCLK." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0D4" size="4" name="PIO1_29" access="Read/Write" description="I/O configuration for pin PIO1_29/SCK0/ CT32B0_CAP1" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x3 to 0x7 are reserved.">
|
|
<Enum name="PIO1_29_" start="0x0" description="PIO1_29." />
|
|
<Enum name="SCK0_" start="0x1" description="SCK0." />
|
|
<Enum name="CT32B0_CAP1_" start="0x2" description="CT32B0_CAP1." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x0DC" size="4" name="PIO1_31" access="Read/Write" description="I/O configuration for pin PIO1_31" reset_value="0x0000090" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="3" name="FUNC" description="Selects pin function. Values 0x1 to 0x7 are reserved.">
|
|
<Enum name="PIO1_31_" start="0x0" description="PIO1_31." />
|
|
</BitField>
|
|
<BitField start="3" size="2" name="MODE" description="Selects function mode (on-chip pull-up/pull-down resistor control).">
|
|
<Enum name="INACTIVE_NO_PULL_DO" start="0x0" description="Inactive (no pull-down/pull-up resistor enabled)." />
|
|
<Enum name="PULL_DOWN_RESISTOR_E" start="0x1" description="Pull-down resistor enabled." />
|
|
<Enum name="PULL_UP_RESISTOR_ENA" start="0x2" description="Pull-up resistor enabled." />
|
|
<Enum name="REPEATER_MODE_" start="0x3" description="Repeater mode." />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="HYS" description="Hysteresis.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="ENABLE_" start="1" description="Enable." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="INV" description="Invert input">
|
|
<Enum name="INPUT_NOT_INVERTED_" start="0" description="Input not inverted (HIGH on pin reads as 1, LOW on pin reads as 0)." />
|
|
<Enum name="INPUT_INVERTED_HIGH" start="1" description="Input inverted (HIGH on pin reads as 0, LOW on pin reads as 1)." />
|
|
</BitField>
|
|
<BitField start="7" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="10" size="1" name="OD" description="Open-drain mode.">
|
|
<Enum name="DISABLE_" start="0" description="Disable." />
|
|
<Enum name="OPEN_DRAIN_MODE_ENAB" start="1" description="Open-drain mode enabled. This is not a true open-drain mode. Input cannot be pulled up above VDD." />
|
|
</BitField>
|
|
<BitField start="11" size="21" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="SYSCON" start="0x40048000" description="System control block ">
|
|
<Register start="+0x000" size="4" name="SYSMEMREMAP" access="Read/Write" description="System memory remap" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="MAP" description="System memory remap. Value 0x3 is reserved.">
|
|
<Enum name="BOOT_LOADER_MODE_IN" start="0x0" description="Boot Loader Mode. Interrupt vectors are re-mapped to Boot ROM." />
|
|
<Enum name="USER_RAM_MODE_INTER" start="0x1" description="User RAM Mode. Interrupt vectors are re-mapped to Static RAM." />
|
|
<Enum name="USER_FLASH_MODE_INT" start="0x2" description="User Flash Mode. Interrupt vectors are not re-mapped and reside in Flash." />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="PRESETCTRL" access="Read/Write" description="Peripheral reset control" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="SSP0_RST_N" description="SSP0 reset control">
|
|
<Enum name="RESETS_THE_SSP0_PERI" start="0" description="Resets the SSP0 peripheral." />
|
|
<Enum name="SSP0_RESET_DE_ASSERT" start="1" description="SSP0 reset de-asserted." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="I2C_RST_N" description="I2C reset control">
|
|
<Enum name="RESETS_THE_I2C_PERIP" start="0" description="Resets the I2C peripheral." />
|
|
<Enum name="I2C_RESET_DE_ASSERTE" start="1" description="I2C reset de-asserted." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="SSP1_RST_N" description="SSP1 reset control">
|
|
<Enum name="RESETS_THE_SSP0_PERI" start="0" description="Resets the SSP0 peripheral." />
|
|
<Enum name="SSP1_RESET_DE_ASSERT" start="1" description="SSP1 reset de-asserted." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="RESERVED" description="Reserved" />
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="SYSPLLCTRL" access="Read/Write" description="System PLL control" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="MSEL" description="Feedback divider value. The division value M is the programmed MSEL value + 1. 00000: Division ratio M = 1 to 11111: Division ratio M = 32" />
|
|
<BitField start="5" size="2" name="PSEL" description="Post divider ratio P. The division ratio is 2 x P.">
|
|
<Enum name="P_EQ_1" start="0x0" description="P = 1" />
|
|
<Enum name="P_EQ_2" start="0x1" description="P = 2" />
|
|
<Enum name="P_EQ_4" start="0x2" description="P = 4" />
|
|
<Enum name="P_EQ_8" start="0x3" description="P = 8" />
|
|
</BitField>
|
|
<BitField start="7" size="25" name="RESERVED" description="Reserved. Do not write ones to reserved bits." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="SYSPLLSTAT" access="ReadOnly" description="System PLL status" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="LOCK" description="PLL lock status">
|
|
<Enum name="PLL_NOT_LOCKED" start="0" description="PLL not locked" />
|
|
<Enum name="PLL_LOCKED" start="1" description="PLL locked" />
|
|
</BitField>
|
|
<BitField start="1" size="31" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="USBPLLCTRL" access="Read/Write" description="USB PLL control" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="MSEL" description="Feedback divider value. The division value M is the programmed MSEL value + 1. 00000: Division ratio M = 1 to 11111: Division ratio M = 32" />
|
|
<BitField start="5" size="2" name="PSEL" description="Post divider ratio P. The division ratio is 2 x P.">
|
|
<Enum name="P_EQ_1" start="0x0" description="P = 1" />
|
|
<Enum name="P_EQ_2" start="0x1" description="P = 2" />
|
|
<Enum name="P_EQ_4" start="0x2" description="P = 4" />
|
|
<Enum name="P_EQ_8" start="0x3" description="P = 8" />
|
|
</BitField>
|
|
<BitField start="7" size="25" name="RESERVED" description="Reserved. Do not write ones to reserved bits." />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="USBPLLSTAT" access="ReadOnly" description="USB PLL status" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="LOCK" description="PLL lock status">
|
|
<Enum name="PLL_NOT_LOCKED" start="0" description="PLL not locked" />
|
|
<Enum name="PLL_LOCKED" start="1" description="PLL locked" />
|
|
</BitField>
|
|
<BitField start="1" size="31" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x020" size="4" name="SYSOSCCTRL" access="Read/Write" description="System oscillator control" reset_value="0x000" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="BYPASS" description="Bypass system oscillator">
|
|
<Enum name="OSCILLATOR_IS_NOT_BY" start="0" description="Oscillator is not bypassed." />
|
|
<Enum name="BYPASS_ENABLED_PLL_" start="1" description="Bypass enabled. PLL input (sys_osc_clk) is fed directly from the XTALIN pin bypassing the oscillator. Use this mode when using an external clock source instead of the crystal oscillator." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="FREQRANGE" description="Determines frequency range for Low-power oscillator.">
|
|
<Enum name="1__20_MHZ_FREQUENCY" start="0" description="1 - 20 MHz frequency range." />
|
|
<Enum name="15__25_MHZ_FREQUENC" start="1" description="15 - 25 MHz frequency range" />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x024" size="4" name="WDTOSCCTRL" access="Read/Write" description="Watchdog oscillator control" reset_value="0x0A0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="DIVSEL" description="Select divider for Fclkana. wdt_osc_clk = Fclkana/ (2 x (1 + DIVSEL)) 00000: 2 x (1 + DIVSEL) = 2 00001: 2 x (1 + DIVSEL) = 4 to 11111: 2 x (1 + DIVSEL) = 64" />
|
|
<BitField start="5" size="4" name="FREQSEL" description="Select watchdog oscillator analog output frequency (Fclkana).">
|
|
<Enum name="0_6_MHZ" start="0x1" description="0.6 MHz" />
|
|
<Enum name="1_05_MHZ" start="0x2" description="1.05 MHz" />
|
|
<Enum name="1_4_MHZ" start="0x3" description="1.4 MHz" />
|
|
<Enum name="1_75_MHZ" start="0x4" description="1.75 MHz" />
|
|
<Enum name="2_1_MHZ" start="0x5" description="2.1 MHz" />
|
|
<Enum name="2_4_MHZ" start="0x6" description="2.4 MHz" />
|
|
<Enum name="2_7_MHZ" start="0x7" description="2.7 MHz" />
|
|
<Enum name="3_0_MHZ" start="0x8" description="3.0 MHz" />
|
|
<Enum name="3_25_MHZ" start="0x9" description="3.25 MHz" />
|
|
<Enum name="3_5_MHZ" start="0xA" description="3.5 MHz" />
|
|
<Enum name="3_75_MHZ" start="0xB" description="3.75 MHz" />
|
|
<Enum name="4_0_MHZ" start="0xC" description="4.0 MHz" />
|
|
<Enum name="4_2_MHZ" start="0xD" description="4.2 MHz" />
|
|
<Enum name="4_4_MHZ" start="0xE" description="4.4 MHz" />
|
|
<Enum name="4_6_MHZ" start="0xF" description="4.6 MHz" />
|
|
</BitField>
|
|
<BitField start="9" size="23" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x030" size="4" name="SYSRSTSTAT" access="Read/Write" description="System reset status register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="POR" description="POR reset status">
|
|
<Enum name="NO_POR_DETECTED" start="0" description="No POR detected" />
|
|
<Enum name="POR_DETECTED" start="1" description="POR detected" />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="EXTRST" description="Status of the external RESET pin">
|
|
<Enum name="NO_RESET_EVENT_DETEC" start="0" description="No reset event detected" />
|
|
<Enum name="RESET_DETECTED" start="1" description="Reset detected" />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="WDT" description="Status of the Watchdog reset">
|
|
<Enum name="NO_WDT_RESET_DETECTE" start="0" description="No WDT reset detected" />
|
|
<Enum name="WDT_RESET_DETECTED" start="1" description="WDT reset detected" />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="BOD" description="Status of the Brown-out detect reset">
|
|
<Enum name="NO_BOD_RESET_DETECTE" start="0" description="No BOD reset detected" />
|
|
<Enum name="BOD_RESET_DETECTED" start="1" description="BOD reset detected" />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="SYSRST" description="Status of the software system reset">
|
|
<Enum name="NO_SYSTEM_RESET_DETE" start="0" description="No System reset detected" />
|
|
<Enum name="SYSTEM_RESET_DETECTE" start="1" description="System reset detected" />
|
|
</BitField>
|
|
<BitField start="5" size="27" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x040" size="4" name="SYSPLLCLKSEL" access="Read/Write" description="System PLL clock source select" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="SEL" description="System PLL clock source">
|
|
<Enum name="IRC" start="0x0" description="IRC" />
|
|
<Enum name="CRYSTAL_OSCILLATOR_" start="0x1" description="Crystal Oscillator (SYSOSC)" />
|
|
<Enum name="RESERVED" start="0x2" description="Reserved" />
|
|
<Enum name="RESERVED" start="0x3" description="Reserved" />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x048" size="4" name="USBPLLCLKSEL" access="Read/Write" description="USB PLL clock source select" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="SEL" description="USB PLL clock source">
|
|
<Enum name="IRC_THE_USB_PLL_CLO" start="0x0" description="IRC. The USB PLL clock source must be switched to system oscillator for correct USB operation." />
|
|
<Enum name="SYSTEM_OSCILLATOR" start="0x1" description="System oscillator" />
|
|
<Enum name="RESERVED" start="0x2" description="Reserved" />
|
|
<Enum name="RESERVED" start="0x3" description="Reserved" />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x070" size="4" name="MAINCLKSEL" access="Read/Write" description="Main clock source select" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="SEL" description="Clock source for main clock">
|
|
<Enum name="IRC_OSCILLATOR" start="0x0" description="IRC Oscillator" />
|
|
<Enum name="PLL_INPUT" start="0x1" description="PLL input" />
|
|
<Enum name="WATCHDOG_OSCILLATOR" start="0x2" description="Watchdog oscillator" />
|
|
<Enum name="PLL_OUTPUT" start="0x3" description="PLL output" />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x078" size="4" name="SYSAHBCLKDIV" access="Read/Write" description="System clock divider" reset_value="0x001" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DIV" description="System AHB clock divider values 0: System clock disabled. 1: Divide by 1. to 255: Divide by 255." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x080" size="4" name="SYSAHBCLKCTRL" access="Read/Write" description="System clock control" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="SYS" description="Enables the clock for the AHB, the APB bridge, the Cortex-M3 FCLK and HCLK, SysCon, and the PMU. This bit is read only and always reads as 1.">
|
|
<Enum name="RESERVED" start="0" description="Reserved" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="ROM" description="Enables clock for ROM.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="RAM0" description="Enables clock for SRAM0.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="FLASHREG" description="Enables clock for flash register interface.">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="FLASHARRAY" description="Enables clock for flash array access.">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="I2C" description="Enables clock for I2C.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="GPIO" description="Enables clock for GPIO port registers.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="CT16B0" description="Enables clock for 16-bit counter/timer 0.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="CT16B1" description="Enables clock for 16-bit counter/timer 1.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="CT32B0" description="Enables clock for 32-bit counter/timer 0.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="10" size="1" name="CT32B1" description="Enables clock for 32-bit counter/timer 1.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="11" size="1" name="SSP0" description="Enables clock for SSP0.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="12" size="1" name="USART" description="Enables clock for UART.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="13" size="1" name="ADC" description="Enables clock for ADC.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="14" size="1" name="USB" description="Enables clock to the USB register interface.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="15" size="1" name="WWDT" description="Enables clock for WWDT.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="16" size="1" name="IOCON" description="Enables clock for I/O configuration block.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="17" size="1" name="RESERVED" description="Reserved" />
|
|
<BitField start="18" size="1" name="SSP1" description="Enables clock for SSP1.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="19" size="1" name="PINT" description="Enables clock to GPIO Pin interrupts register interface.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="20" size="3" name="RESERVED" description="Reserved" />
|
|
<BitField start="23" size="1" name="GROUP0INT" description="Enables clock to GPIO GROUP0 interrupt register interface.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="24" size="1" name="GROUP1INT" description="Enables clock to GPIO GROUP1 interrupt register interface.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="25" size="1" name="RESERVED" description="Reserved" />
|
|
<BitField start="26" size="1" name="RAM1" description="Enables clock for SRAM1 located at 0x2000 0000 to 0x2000 0800.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="27" size="1" name="USBSRAM" description="Enables USB SRAM block located at 0x2000 4000 to 0x2000 4800.">
|
|
<Enum name="DISABLE" start="0" description="Disable" />
|
|
<Enum name="ENABLE" start="1" description="Enable" />
|
|
</BitField>
|
|
<BitField start="28" size="4" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x094" size="4" name="SSP0CLKDIV" access="Read/Write" description="SSP0 clock divider" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DIV" description="SPI0_PCLK clock divider values. 0: System clock disabled. 1: Divide by 1. to 255: Divide by 255." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x098" size="4" name="UARTCLKDIV" access="Read/Write" description="UART clock divider" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DIV" description="UART_PCLK clock divider values 0: Disable UART_PCLK. 1: Divide by 1. to 255: Divide by 255." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x09C" size="4" name="SSP1CLKDIV" access="Read/Write" description="SSP1 clock divider" reset_value="0x0000" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DIV" description="SSP1_PCLK clock divider values 0: Disable SSP1_PCLK. 1: Divide by 1. to 255: Divide by 255." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x0AC" size="4" name="TRACECLKDIV" access="Read/Write" description="ARM trace clock divider" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DIV" description="ARM trace clock divider values. 0: Disable TRACE_CLK. 1: Divide by 1. to 255: Divide by 255." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x0B0" size="4" name="SYSTICKCLKDIV" access="Read/Write" description="SYSTICK clock divider" reset_value="0x00000000" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DIV" description="SYSTICK clock divider values. 0: Disable SYSTICK timer clock. 1: Divide by 1. to 255: Divide by 255." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x0C0" size="4" name="USBCLKSEL" access="Read/Write" description="USB clock source select" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="SEL" description="USB clock source. Values 0x2 and 0x3 are reserved.">
|
|
<Enum name="USB_PLL_OUT" start="0x0" description="USB PLL out" />
|
|
<Enum name="MAIN_CLOCK" start="0x1" description="Main clock" />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x0C8" size="4" name="USBCLKDIV" access="Read/Write" description="USB clock source divider" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DIV" description="USB clock divider values 0: Disable USB clock. 1: Divide by 1. to 255: Divide by 255." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x0E0" size="4" name="CLKOUTSEL" access="Read/Write" description="CLKOUT clock source select" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="SEL" description="CLKOUT clock source">
|
|
<Enum name="IRC_OSCILLATOR" start="0x0" description="IRC oscillator" />
|
|
<Enum name="CRYSTAL_OSCILLATOR_" start="0x1" description="Crystal oscillator (SYSOSC)" />
|
|
<Enum name="WATCHDOG_OSCILLATOR" start="0x2" description="Watchdog oscillator" />
|
|
<Enum name="MAIN_CLOCK" start="0x3" description="Main clock" />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x0E8" size="4" name="CLKOUTDIV" access="Read/Write" description="CLKOUT clock divider" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="DIV" description="CLKOUT clock divider values 0: Disable CLKOUT clock divider. 1: Divide by 1. to 255: Divide by 255." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x100" size="4" name="PIOPORCAP0" access="ReadOnly" description="POR captured PIO status 0" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="24" name="PIOSTAT" description="State of P0_23 through P0_0 at power-on reset" />
|
|
<BitField start="24" size="8" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x104" size="4" name="PIOPORCAP1" access="ReadOnly" description="POR captured PIO status 1" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="32" name="PIOSTAT" description="State of P1_31 through P1_0 at power-on reset" />
|
|
</Register>
|
|
<Register start="+0x150" size="4" name="BODCTRL" access="Read/Write" description="Brown-Out Detect" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="BODRSTLEV" description="BOD reset level">
|
|
<Enum name="LEVEL_0_THE_RESET_A" start="0x0" description="Level 0: The reset assertion threshold voltage is 1.46 V; the reset de-assertion threshold voltage is 1.63 V." />
|
|
<Enum name="LEVEL_1_THE_RESET_A" start="0x1" description="Level 1: The reset assertion threshold voltage is 2.06 V; the reset de-assertion threshold voltage is 2.15 V." />
|
|
<Enum name="LEVEL_2_THE_RESET_A" start="0x2" description="Level 2: The reset assertion threshold voltage is 2.35 V; the reset de-assertion threshold voltage is 2.43 V." />
|
|
<Enum name="LEVEL_3_THE_RESET_A" start="0x3" description="Level 3: The reset assertion threshold voltage is 2.63 V; the reset de-assertion threshold voltage is 2.71 V." />
|
|
</BitField>
|
|
<BitField start="2" size="2" name="BODINTVAL" description="BOD interrupt level">
|
|
<Enum name="RESERVED_" start="0x0" description="Reserved." />
|
|
<Enum name="LEVEL_1THE_INTERRUP" start="0x1" description="Level 1:The interrupt assertion threshold voltage is 2.22 V; the interrupt de-assertion threshold voltage is 2.35 V." />
|
|
<Enum name="LEVEL_2_THE_INTERRU" start="0x2" description="Level 2: The interrupt assertion threshold voltage is 2.52 V; the interrupt de-assertion threshold voltage is 2.66 V." />
|
|
<Enum name="LEVEL_3_THE_INTERRU" start="0x3" description="Level 3: The interrupt assertion threshold voltage is 2.80 V; the interrupt de-assertion threshold voltage is 2.90 V." />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="BODRSTENA" description="BOD reset enable">
|
|
<Enum name="DISABLE_RESET_FUNCTI" start="0" description="Disable reset function." />
|
|
<Enum name="ENABLE_RESET_FUNCTIO" start="1" description="Enable reset function." />
|
|
</BitField>
|
|
<BitField start="5" size="27" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x154" size="4" name="SYSTCKCAL" access="Read/Write" description="System tick counter calibration" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="26" name="CAL" description="System tick timer calibration value" />
|
|
<BitField start="26" size="6" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x170" size="4" name="IRQLATENCY" access="Read/Write" description="IQR delay. Allows trade-off between interrupt latency and determinism." reset_value="0x00000010" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="LATENCY" description="8-bit latency value" />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x174" size="4" name="NMISRC" access="Read/Write" description="NMI Source Control" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="IRQNO" description="The IRQ number of the interrupt that acts as the Non-Maskable Interrupt (NMI) if bit 31 is 1. See Table 53 for the list of interrupt sources and their IRQ numbers." />
|
|
<BitField start="5" size="26" name="RESERVED" description="Reserved" />
|
|
<BitField start="31" size="1" name="NMIEN" description="Write a 1 to this bit to enable the Non-Maskable Interrupt (NMI) source selected by bits 4:0." />
|
|
</Register>
|
|
<Register start="+0x178+0" size="4" name="PINTSEL0" access="Read/Write" description="GPIO Pin Interrupt Select register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="INTPIN" description="Pin number within the port selected by the PORTSEL bit in this register." />
|
|
<BitField start="5" size="1" name="PORTSEL" description="Select the port for the pin number to be selected in the INTPIN bits of this register.">
|
|
<Enum name="PORT_0" start="0" description="Port 0" />
|
|
<Enum name="PORT_1" start="1" description="Port 1" />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x178+4" size="4" name="PINTSEL1" access="Read/Write" description="GPIO Pin Interrupt Select register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="INTPIN" description="Pin number within the port selected by the PORTSEL bit in this register." />
|
|
<BitField start="5" size="1" name="PORTSEL" description="Select the port for the pin number to be selected in the INTPIN bits of this register.">
|
|
<Enum name="PORT_0" start="0" description="Port 0" />
|
|
<Enum name="PORT_1" start="1" description="Port 1" />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x178+8" size="4" name="PINTSEL2" access="Read/Write" description="GPIO Pin Interrupt Select register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="INTPIN" description="Pin number within the port selected by the PORTSEL bit in this register." />
|
|
<BitField start="5" size="1" name="PORTSEL" description="Select the port for the pin number to be selected in the INTPIN bits of this register.">
|
|
<Enum name="PORT_0" start="0" description="Port 0" />
|
|
<Enum name="PORT_1" start="1" description="Port 1" />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x178+12" size="4" name="PINTSEL3" access="Read/Write" description="GPIO Pin Interrupt Select register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="INTPIN" description="Pin number within the port selected by the PORTSEL bit in this register." />
|
|
<BitField start="5" size="1" name="PORTSEL" description="Select the port for the pin number to be selected in the INTPIN bits of this register.">
|
|
<Enum name="PORT_0" start="0" description="Port 0" />
|
|
<Enum name="PORT_1" start="1" description="Port 1" />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x178+16" size="4" name="PINTSEL4" access="Read/Write" description="GPIO Pin Interrupt Select register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="INTPIN" description="Pin number within the port selected by the PORTSEL bit in this register." />
|
|
<BitField start="5" size="1" name="PORTSEL" description="Select the port for the pin number to be selected in the INTPIN bits of this register.">
|
|
<Enum name="PORT_0" start="0" description="Port 0" />
|
|
<Enum name="PORT_1" start="1" description="Port 1" />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x178+20" size="4" name="PINTSEL5" access="Read/Write" description="GPIO Pin Interrupt Select register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="INTPIN" description="Pin number within the port selected by the PORTSEL bit in this register." />
|
|
<BitField start="5" size="1" name="PORTSEL" description="Select the port for the pin number to be selected in the INTPIN bits of this register.">
|
|
<Enum name="PORT_0" start="0" description="Port 0" />
|
|
<Enum name="PORT_1" start="1" description="Port 1" />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x178+24" size="4" name="PINTSEL6" access="Read/Write" description="GPIO Pin Interrupt Select register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="INTPIN" description="Pin number within the port selected by the PORTSEL bit in this register." />
|
|
<BitField start="5" size="1" name="PORTSEL" description="Select the port for the pin number to be selected in the INTPIN bits of this register.">
|
|
<Enum name="PORT_0" start="0" description="Port 0" />
|
|
<Enum name="PORT_1" start="1" description="Port 1" />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x178+28" size="4" name="PINTSEL7" access="Read/Write" description="GPIO Pin Interrupt Select register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="5" name="INTPIN" description="Pin number within the port selected by the PORTSEL bit in this register." />
|
|
<BitField start="5" size="1" name="PORTSEL" description="Select the port for the pin number to be selected in the INTPIN bits of this register.">
|
|
<Enum name="PORT_0" start="0" description="Port 0" />
|
|
<Enum name="PORT_1" start="1" description="Port 1" />
|
|
</BitField>
|
|
<BitField start="6" size="26" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x198" size="4" name="USBCLKCTRL" access="Read/Write" description="USB clock control" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="AP_CLK" description="USB need_clock signal control">
|
|
<Enum name="UNDER_HARDWARE_CONTR" start="0" description="Under hardware control." />
|
|
<Enum name="FORCED_HIGH_" start="1" description="Forced HIGH." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="POL_CLK" description="USB need_clock polarity for triggering the USB wake-up interrupt">
|
|
<Enum name="FALLING_EDGE_OF_THE_" start="0" description="Falling edge of the USB need_clock triggers the USB wake-up (default)." />
|
|
<Enum name="RISING_EDGE_OF_THE_U" start="1" description="Rising edge of the USB need_clock triggers the USB wake-up." />
|
|
</BitField>
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x19C" size="4" name="USBCLKST" access="ReadOnly" description="USB clock status" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="NEED_CLKST" description="USB need_clock signal status">
|
|
<Enum name="LOW" start="0" description="LOW" />
|
|
<Enum name="HIGH" start="1" description="HIGH" />
|
|
</BitField>
|
|
<BitField start="1" size="31" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x204" size="4" name="STARTERP0" access="Read/Write" description="Start logic 0 interrupt wake-up enable register 0" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="PINT0" description="Pin interrupt 0 wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="PINT1" description="Pin interrupt 1 wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="PINT2" description="Pin interrupt 2 wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="PINT3" description="Pin interrupt 3 wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="PINT4" description="Pin interrupt 4 wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="PINT5" description="Pin interrupt 5 wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="PINT6" description="Pin interrupt 6 wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="PINT7" description="Pin interrupt 7 wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x214" size="4" name="STARTERP1" access="Read/Write" description="Start logic 1 interrupt wake-up enable register 1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="12" size="1" name="WWDTINT" description="WWDT interrupt wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="13" size="1" name="BODINT" description="Brown Out Detect (BOD) interrupt wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="14" size="5" name="RESERVED" description="Reserved" />
|
|
<BitField start="19" size="1" name="USB_WAKEUP" description="USB need_clock signal wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="20" size="1" name="GPIOINT0" description="GPIO GROUP0 interrupt wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
<BitField start="21" size="1" name="GPIOINT1" description="GPIO GROUP1 interrupt wake-up">
|
|
<Enum name="DISABLED" start="0" description="Disabled" />
|
|
<Enum name="ENABLED" start="1" description="Enabled" />
|
|
</BitField>
|
|
</Register>
|
|
<Register start="+0x230" size="4" name="PDSLEEPCFG" access="Read/Write" description="Power-down states in deep-sleep mode" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="3" size="1" name="BOD_PD" description="BOD power-down control for Deep-sleep and Power-down mode">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="WDTOSC_PD" description="Watchdog oscillator power-down control for Deep-sleep and Power-down mode">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="7" size="25" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x234" size="4" name="PDAWAKECFG" access="Read/Write" description="Power-down states for wake-up from deep-sleep" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="IRCOUT_PD" description="IRC oscillator output wake-up configuration">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="IRC_PD" description="IRC oscillator power-down wake-up configuration">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="FLASH_PD" description="Flash wake-up configuration">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="BOD_PD" description="BOD wake-up configuration">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="ADC_PD" description="ADC wake-up configuration">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="SYSOSC_PD" description="Crystal oscillator wake-up configuration">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="WDTOSC_PD" description="Watchdog oscillator wake-up configuration">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="SYSPLL_PD" description="System PLL wake-up configuration">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="USBPLL_PD" description="USB PLL wake-up configuration">
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="RESERVED" description="Reserved. Always write this bit as 0." />
|
|
<BitField start="10" size="1" name="USBPAD_PD" description="USB transceiver wake-up configuration">
|
|
<Enum name="USB_TRANSCEIVER_POWE" start="0" description="USB transceiver powered" />
|
|
<Enum name="USB_TRANSCEIVER_POWE" start="1" description="USB transceiver powered down" />
|
|
</BitField>
|
|
<BitField start="11" size="1" name="RESERVED" description="Reserved. This bit must be set to one in Run mode." />
|
|
<BitField start="12" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="13" size="19" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x238" size="4" name="PDRUNCFG" access="Read/Write" description="Power configuration register" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="IRCOUT_PD" description="IRC oscillator output power-down">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="IRC_PD" description="IRC oscillator power-down">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="FLASH_PD" description="Flash power-down">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="BOD_PD" description="BOD power-down">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="4" size="1" name="ADC_PD" description="ADC power-down">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="5" size="1" name="SYSOSC_PD" description="Crystal oscillator power-down">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="WDTOSC_PD" description="Watchdog oscillator power-down">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="SYSPLL_PD" description="System PLL power-down">
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
</BitField>
|
|
<BitField start="8" size="1" name="USBPLL_PD" description="USB PLL power-down">
|
|
<Enum name="POWERED" start="0" description="Powered" />
|
|
<Enum name="POWERED_DOWN" start="1" description="Powered down" />
|
|
</BitField>
|
|
<BitField start="9" size="1" name="RESERVED" description="Reserved. Always write this bit as 0." />
|
|
<BitField start="10" size="1" name="USBPAD_PD" description="USB transceiver power-down configuration">
|
|
<Enum name="USB_TRANSCEIVER_POWE" start="0" description="USB transceiver powered" />
|
|
<Enum name="USB_TRANSCEIVER_POWE" start="1" description="USB transceiver powered down (suspend mode)" />
|
|
</BitField>
|
|
<BitField start="11" size="1" name="RESERVED" description="Reserved. This bit must be set to one in Run mode." />
|
|
<BitField start="12" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="13" size="3" name="RESERVED" description="Reserved. Always write these bits as 111." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x3F8" size="4" name="DEVICE_ID" access="ReadOnly" description="Device ID" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="32" name="DEVICEID" description="LPC1345FHN33 = 0x2801 0541 LPC1345FBD48 = 0x2801 0541 LPC1346FHN33 = 0x0801 8542 LPC1346FBD48 = 0x0801 8542 LPC1347FHN33 = 0x0802 0543 LPC1347FBD48 = 0x0802 0543 LPC1347FBD64 = 0x0802 0543 LPC1315FHN33 = 0x3A01 0523 LPC1315FBD48 = 0x3A01 0523 LPC1316FHN33 = 0x1A01 8524 LPC1316FBD48 = 0x1A01 8524 LPC1317FHN33 = 0x1A02 0525 LPC1317FBD48 = 0x1A02 0525 LPC1317FBD64 = 0x1A02 0525" />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="GPIO_PIN_INT" start="0x4004C000" description="GPIO pin interrupt ">
|
|
<Register start="+0x000" size="4" name="ISEL" access="Read/Write" description="Pin Interrupt Mode register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="PMODE0" description="Selects the interrupt mode for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Edge sensitive 1 = Level sensitive" />
|
|
<BitField start="1" size="1" name="PMODE1" description="Selects the interrupt mode for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Edge sensitive 1 = Level sensitive" />
|
|
<BitField start="2" size="1" name="PMODE2" description="Selects the interrupt mode for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Edge sensitive 1 = Level sensitive" />
|
|
<BitField start="3" size="1" name="PMODE3" description="Selects the interrupt mode for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Edge sensitive 1 = Level sensitive" />
|
|
<BitField start="4" size="1" name="PMODE4" description="Selects the interrupt mode for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Edge sensitive 1 = Level sensitive" />
|
|
<BitField start="5" size="1" name="PMODE5" description="Selects the interrupt mode for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Edge sensitive 1 = Level sensitive" />
|
|
<BitField start="6" size="1" name="PMODE6" description="Selects the interrupt mode for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Edge sensitive 1 = Level sensitive" />
|
|
<BitField start="7" size="1" name="PMODE7" description="Selects the interrupt mode for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Edge sensitive 1 = Level sensitive" />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="IENR" access="Read/Write" description="Pin Interrupt Enable (Rising) register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="ENRL0" description="Enables the rising edge or level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable rising edge or level interrupt. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="1" size="1" name="ENRL1" description="Enables the rising edge or level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable rising edge or level interrupt. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="2" size="1" name="ENRL2" description="Enables the rising edge or level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable rising edge or level interrupt. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="3" size="1" name="ENRL3" description="Enables the rising edge or level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable rising edge or level interrupt. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="4" size="1" name="ENRL4" description="Enables the rising edge or level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable rising edge or level interrupt. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="5" size="1" name="ENRL5" description="Enables the rising edge or level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable rising edge or level interrupt. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="6" size="1" name="ENRL6" description="Enables the rising edge or level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable rising edge or level interrupt. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="7" size="1" name="ENRL7" description="Enables the rising edge or level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable rising edge or level interrupt. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="SIENR" access="WriteOnly" description="Set Pin Interrupt Enable (Rising) register" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="SETENRL0" description="Ones written to this address set bits in the PINTEN_R, thus enabling interrupts. Bit n sets bit n in the PINTEN_R register. 0 = No operation. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="1" size="1" name="SETENRL1" description="Ones written to this address set bits in the PINTEN_R, thus enabling interrupts. Bit n sets bit n in the PINTEN_R register. 0 = No operation. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="2" size="1" name="SETENRL2" description="Ones written to this address set bits in the PINTEN_R, thus enabling interrupts. Bit n sets bit n in the PINTEN_R register. 0 = No operation. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="3" size="1" name="SETENRL3" description="Ones written to this address set bits in the PINTEN_R, thus enabling interrupts. Bit n sets bit n in the PINTEN_R register. 0 = No operation. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="4" size="1" name="SETENRL4" description="Ones written to this address set bits in the PINTEN_R, thus enabling interrupts. Bit n sets bit n in the PINTEN_R register. 0 = No operation. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="5" size="1" name="SETENRL5" description="Ones written to this address set bits in the PINTEN_R, thus enabling interrupts. Bit n sets bit n in the PINTEN_R register. 0 = No operation. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="6" size="1" name="SETENRL6" description="Ones written to this address set bits in the PINTEN_R, thus enabling interrupts. Bit n sets bit n in the PINTEN_R register. 0 = No operation. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="7" size="1" name="SETENRL7" description="Ones written to this address set bits in the PINTEN_R, thus enabling interrupts. Bit n sets bit n in the PINTEN_R register. 0 = No operation. 1 = Enable rising edge or level interrupt." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="CIENR" access="WriteOnly" description="Clear Pin Interrupt Enable (Rising) register" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="CENRL0" description="Ones written to this address clear bits in the IENR, thus disabling the interrupts. Bit n clears bit n in the IENR register. 0 = No operation. 1 = Disable rising edge or level interrupt." />
|
|
<BitField start="1" size="1" name="CENRL1" description="Ones written to this address clear bits in the IENR, thus disabling the interrupts. Bit n clears bit n in the IENR register. 0 = No operation. 1 = Disable rising edge or level interrupt." />
|
|
<BitField start="2" size="1" name="CENRL2" description="Ones written to this address clear bits in the IENR, thus disabling the interrupts. Bit n clears bit n in the IENR register. 0 = No operation. 1 = Disable rising edge or level interrupt." />
|
|
<BitField start="3" size="1" name="CENRL3" description="Ones written to this address clear bits in the IENR, thus disabling the interrupts. Bit n clears bit n in the IENR register. 0 = No operation. 1 = Disable rising edge or level interrupt." />
|
|
<BitField start="4" size="1" name="CENRL4" description="Ones written to this address clear bits in the IENR, thus disabling the interrupts. Bit n clears bit n in the IENR register. 0 = No operation. 1 = Disable rising edge or level interrupt." />
|
|
<BitField start="5" size="1" name="CENRL5" description="Ones written to this address clear bits in the IENR, thus disabling the interrupts. Bit n clears bit n in the IENR register. 0 = No operation. 1 = Disable rising edge or level interrupt." />
|
|
<BitField start="6" size="1" name="CENRL6" description="Ones written to this address clear bits in the IENR, thus disabling the interrupts. Bit n clears bit n in the IENR register. 0 = No operation. 1 = Disable rising edge or level interrupt." />
|
|
<BitField start="7" size="1" name="CENRL7" description="Ones written to this address clear bits in the IENR, thus disabling the interrupts. Bit n clears bit n in the IENR register. 0 = No operation. 1 = Disable rising edge or level interrupt." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="IENF" access="Read/Write" description="Pin Interrupt Enable Falling Edge / Active Level register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="ENAF0" description="Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH." />
|
|
<BitField start="1" size="1" name="ENAF1" description="Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH." />
|
|
<BitField start="2" size="1" name="ENAF2" description="Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH." />
|
|
<BitField start="3" size="1" name="ENAF3" description="Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH." />
|
|
<BitField start="4" size="1" name="ENAF4" description="Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH." />
|
|
<BitField start="5" size="1" name="ENAF5" description="Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH." />
|
|
<BitField start="6" size="1" name="ENAF6" description="Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH." />
|
|
<BitField start="7" size="1" name="ENAF7" description="Enables the falling edge or configures the active level interrupt for each pin interrupt. Bit n configures the pin interrupt selected in PINTSELn. 0 = Disable falling edge interrupt or set active interrupt level LOW. 1 = Enable falling edge interrupt enabled or set active interrupt level HIGH." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="SIENF" access="WriteOnly" description="Set Pin Interrupt Enable Falling Edge / Active Level register" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="SETENAF0" description="Ones written to this address set bits in the IENF, thus enabling interrupts. Bit n sets bit n in the IENF register. 0 = No operation. 1 = Select HIGH-active interrupt or enable falling edge interrupt." />
|
|
<BitField start="1" size="1" name="SETENAF1" description="Ones written to this address set bits in the IENF, thus enabling interrupts. Bit n sets bit n in the IENF register. 0 = No operation. 1 = Select HIGH-active interrupt or enable falling edge interrupt." />
|
|
<BitField start="2" size="1" name="SETENAF2" description="Ones written to this address set bits in the IENF, thus enabling interrupts. Bit n sets bit n in the IENF register. 0 = No operation. 1 = Select HIGH-active interrupt or enable falling edge interrupt." />
|
|
<BitField start="3" size="1" name="SETENAF3" description="Ones written to this address set bits in the IENF, thus enabling interrupts. Bit n sets bit n in the IENF register. 0 = No operation. 1 = Select HIGH-active interrupt or enable falling edge interrupt." />
|
|
<BitField start="4" size="1" name="SETENAF4" description="Ones written to this address set bits in the IENF, thus enabling interrupts. Bit n sets bit n in the IENF register. 0 = No operation. 1 = Select HIGH-active interrupt or enable falling edge interrupt." />
|
|
<BitField start="5" size="1" name="SETENAF5" description="Ones written to this address set bits in the IENF, thus enabling interrupts. Bit n sets bit n in the IENF register. 0 = No operation. 1 = Select HIGH-active interrupt or enable falling edge interrupt." />
|
|
<BitField start="6" size="1" name="SETENAF6" description="Ones written to this address set bits in the IENF, thus enabling interrupts. Bit n sets bit n in the IENF register. 0 = No operation. 1 = Select HIGH-active interrupt or enable falling edge interrupt." />
|
|
<BitField start="7" size="1" name="SETENAF7" description="Ones written to this address set bits in the IENF, thus enabling interrupts. Bit n sets bit n in the IENF register. 0 = No operation. 1 = Select HIGH-active interrupt or enable falling edge interrupt." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x018" size="4" name="CIENF" access="WriteOnly" description="Clear Pin Interrupt Enable Falling Edge / Active Level address" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="CENAF0" description="Ones written to this address clears bits in the IENF, thus disabling interrupts. Bit n clears bit n in the IENF register. 0 = No operation. 1 = LOW-active interrupt selected or falling edge interrupt disabled." />
|
|
<BitField start="1" size="1" name="CENAF1" description="Ones written to this address clears bits in the IENF, thus disabling interrupts. Bit n clears bit n in the IENF register. 0 = No operation. 1 = LOW-active interrupt selected or falling edge interrupt disabled." />
|
|
<BitField start="2" size="1" name="CENAF2" description="Ones written to this address clears bits in the IENF, thus disabling interrupts. Bit n clears bit n in the IENF register. 0 = No operation. 1 = LOW-active interrupt selected or falling edge interrupt disabled." />
|
|
<BitField start="3" size="1" name="CENAF3" description="Ones written to this address clears bits in the IENF, thus disabling interrupts. Bit n clears bit n in the IENF register. 0 = No operation. 1 = LOW-active interrupt selected or falling edge interrupt disabled." />
|
|
<BitField start="4" size="1" name="CENAF4" description="Ones written to this address clears bits in the IENF, thus disabling interrupts. Bit n clears bit n in the IENF register. 0 = No operation. 1 = LOW-active interrupt selected or falling edge interrupt disabled." />
|
|
<BitField start="5" size="1" name="CENAF5" description="Ones written to this address clears bits in the IENF, thus disabling interrupts. Bit n clears bit n in the IENF register. 0 = No operation. 1 = LOW-active interrupt selected or falling edge interrupt disabled." />
|
|
<BitField start="6" size="1" name="CENAF6" description="Ones written to this address clears bits in the IENF, thus disabling interrupts. Bit n clears bit n in the IENF register. 0 = No operation. 1 = LOW-active interrupt selected or falling edge interrupt disabled." />
|
|
<BitField start="7" size="1" name="CENAF7" description="Ones written to this address clears bits in the IENF, thus disabling interrupts. Bit n clears bit n in the IENF register. 0 = No operation. 1 = LOW-active interrupt selected or falling edge interrupt disabled." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x01C" size="4" name="RISE" access="Read/Write" description="Pin Interrupt Rising Edge register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RDET0" description="Rising edge detect. Bit n detects the rising edge of the pin selected in PINTSELn. Read 0: No rising edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a rising edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear rising edge detection for this pin." />
|
|
<BitField start="1" size="1" name="RDET1" description="Rising edge detect. Bit n detects the rising edge of the pin selected in PINTSELn. Read 0: No rising edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a rising edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear rising edge detection for this pin." />
|
|
<BitField start="2" size="1" name="RDET2" description="Rising edge detect. Bit n detects the rising edge of the pin selected in PINTSELn. Read 0: No rising edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a rising edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear rising edge detection for this pin." />
|
|
<BitField start="3" size="1" name="RDET3" description="Rising edge detect. Bit n detects the rising edge of the pin selected in PINTSELn. Read 0: No rising edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a rising edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear rising edge detection for this pin." />
|
|
<BitField start="4" size="1" name="RDET4" description="Rising edge detect. Bit n detects the rising edge of the pin selected in PINTSELn. Read 0: No rising edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a rising edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear rising edge detection for this pin." />
|
|
<BitField start="5" size="1" name="RDET5" description="Rising edge detect. Bit n detects the rising edge of the pin selected in PINTSELn. Read 0: No rising edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a rising edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear rising edge detection for this pin." />
|
|
<BitField start="6" size="1" name="RDET6" description="Rising edge detect. Bit n detects the rising edge of the pin selected in PINTSELn. Read 0: No rising edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a rising edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear rising edge detection for this pin." />
|
|
<BitField start="7" size="1" name="RDET7" description="Rising edge detect. Bit n detects the rising edge of the pin selected in PINTSELn. Read 0: No rising edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a rising edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear rising edge detection for this pin." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x020" size="4" name="FALL" access="Read/Write" description="Pin Interrupt Falling Edge register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="FDET0" description="Falling edge detect. Bit n detects the falling edge of the pin selected in PINTSELn. Read 0: No falling edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a falling edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear falling edge detection for this pin." />
|
|
<BitField start="1" size="1" name="FDET1" description="Falling edge detect. Bit n detects the falling edge of the pin selected in PINTSELn. Read 0: No falling edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a falling edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear falling edge detection for this pin." />
|
|
<BitField start="2" size="1" name="FDET2" description="Falling edge detect. Bit n detects the falling edge of the pin selected in PINTSELn. Read 0: No falling edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a falling edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear falling edge detection for this pin." />
|
|
<BitField start="3" size="1" name="FDET3" description="Falling edge detect. Bit n detects the falling edge of the pin selected in PINTSELn. Read 0: No falling edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a falling edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear falling edge detection for this pin." />
|
|
<BitField start="4" size="1" name="FDET4" description="Falling edge detect. Bit n detects the falling edge of the pin selected in PINTSELn. Read 0: No falling edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a falling edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear falling edge detection for this pin." />
|
|
<BitField start="5" size="1" name="FDET5" description="Falling edge detect. Bit n detects the falling edge of the pin selected in PINTSELn. Read 0: No falling edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a falling edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear falling edge detection for this pin." />
|
|
<BitField start="6" size="1" name="FDET6" description="Falling edge detect. Bit n detects the falling edge of the pin selected in PINTSELn. Read 0: No falling edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a falling edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear falling edge detection for this pin." />
|
|
<BitField start="7" size="1" name="FDET7" description="Falling edge detect. Bit n detects the falling edge of the pin selected in PINTSELn. Read 0: No falling edge has been detected on this pin since Reset or the last time a one was written to this bit. Write 0: no operation. Read 1: a falling edge has been detected since Reset or the last time a one was written to this bit. Write 1: clear falling edge detection for this pin." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x024" size="4" name="IST" access="Read/Write" description="Pin Interrupt Status register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="PSTAT0" description="Pin interrupt status. Bit n returns the status, clears the edge interrupt, or inverts the active level of the pin selected in PINTSELn. Read 0: interrupt is not being requested for this interrupt pin. Write 0: no operation. Read 1: interrupt is being requested for this interrupt pin. Write 1 (edge-sensitive): clear rising- and falling-edge detection for this pin. Write 1 (level-sensitive): switch the active level for this pin (in the PINTENT_F register)." />
|
|
<BitField start="1" size="1" name="PSTAT1" description="Pin interrupt status. Bit n returns the status, clears the edge interrupt, or inverts the active level of the pin selected in PINTSELn. Read 0: interrupt is not being requested for this interrupt pin. Write 0: no operation. Read 1: interrupt is being requested for this interrupt pin. Write 1 (edge-sensitive): clear rising- and falling-edge detection for this pin. Write 1 (level-sensitive): switch the active level for this pin (in the PINTENT_F register)." />
|
|
<BitField start="2" size="1" name="PSTAT2" description="Pin interrupt status. Bit n returns the status, clears the edge interrupt, or inverts the active level of the pin selected in PINTSELn. Read 0: interrupt is not being requested for this interrupt pin. Write 0: no operation. Read 1: interrupt is being requested for this interrupt pin. Write 1 (edge-sensitive): clear rising- and falling-edge detection for this pin. Write 1 (level-sensitive): switch the active level for this pin (in the PINTENT_F register)." />
|
|
<BitField start="3" size="1" name="PSTAT3" description="Pin interrupt status. Bit n returns the status, clears the edge interrupt, or inverts the active level of the pin selected in PINTSELn. Read 0: interrupt is not being requested for this interrupt pin. Write 0: no operation. Read 1: interrupt is being requested for this interrupt pin. Write 1 (edge-sensitive): clear rising- and falling-edge detection for this pin. Write 1 (level-sensitive): switch the active level for this pin (in the PINTENT_F register)." />
|
|
<BitField start="4" size="1" name="PSTAT4" description="Pin interrupt status. Bit n returns the status, clears the edge interrupt, or inverts the active level of the pin selected in PINTSELn. Read 0: interrupt is not being requested for this interrupt pin. Write 0: no operation. Read 1: interrupt is being requested for this interrupt pin. Write 1 (edge-sensitive): clear rising- and falling-edge detection for this pin. Write 1 (level-sensitive): switch the active level for this pin (in the PINTENT_F register)." />
|
|
<BitField start="5" size="1" name="PSTAT5" description="Pin interrupt status. Bit n returns the status, clears the edge interrupt, or inverts the active level of the pin selected in PINTSELn. Read 0: interrupt is not being requested for this interrupt pin. Write 0: no operation. Read 1: interrupt is being requested for this interrupt pin. Write 1 (edge-sensitive): clear rising- and falling-edge detection for this pin. Write 1 (level-sensitive): switch the active level for this pin (in the PINTENT_F register)." />
|
|
<BitField start="6" size="1" name="PSTAT6" description="Pin interrupt status. Bit n returns the status, clears the edge interrupt, or inverts the active level of the pin selected in PINTSELn. Read 0: interrupt is not being requested for this interrupt pin. Write 0: no operation. Read 1: interrupt is being requested for this interrupt pin. Write 1 (edge-sensitive): clear rising- and falling-edge detection for this pin. Write 1 (level-sensitive): switch the active level for this pin (in the PINTENT_F register)." />
|
|
<BitField start="7" size="1" name="PSTAT7" description="Pin interrupt status. Bit n returns the status, clears the edge interrupt, or inverts the active level of the pin selected in PINTSELn. Read 0: interrupt is not being requested for this interrupt pin. Write 0: no operation. Read 1: interrupt is being requested for this interrupt pin. Write 1 (edge-sensitive): clear rising- and falling-edge detection for this pin. Write 1 (level-sensitive): switch the active level for this pin (in the PINTENT_F register)." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="SSP1" start="0x40058000" description="SSP/SPI">
|
|
<Register start="+0x000" size="4" name="CR0" access="Read/Write" description="Control Register 0. Selects the serial clock rate, bus type, and data size." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="DSS" description="Data Size Select. This field controls the number of bits transferred in each frame. Values 0000-0010 are not supported and should not be used.">
|
|
<Enum name="4_BIT_TRANSFER" start="0x3" description="4-bit transfer" />
|
|
<Enum name="5_BIT_TRANSFER" start="0x4" description="5-bit transfer" />
|
|
<Enum name="6_BIT_TRANSFER" start="0x5" description="6-bit transfer" />
|
|
<Enum name="7_BIT_TRANSFER" start="0x6" description="7-bit transfer" />
|
|
<Enum name="8_BIT_TRANSFER" start="0x7" description="8-bit transfer" />
|
|
<Enum name="9_BIT_TRANSFER" start="0x8" description="9-bit transfer" />
|
|
<Enum name="10_BIT_TRANSFER" start="0x9" description="10-bit transfer" />
|
|
<Enum name="11_BIT_TRANSFER" start="0xA" description="11-bit transfer" />
|
|
<Enum name="12_BIT_TRANSFER" start="0xB" description="12-bit transfer" />
|
|
<Enum name="13_BIT_TRANSFER" start="0xC" description="13-bit transfer" />
|
|
<Enum name="14_BIT_TRANSFER" start="0xD" description="14-bit transfer" />
|
|
<Enum name="15_BIT_TRANSFER" start="0xE" description="15-bit transfer" />
|
|
<Enum name="16_BIT_TRANSFER" start="0xF" description="16-bit transfer" />
|
|
</BitField>
|
|
<BitField start="4" size="2" name="FRF" description="Frame Format.">
|
|
<Enum name="SPI" start="0x0" description="SPI" />
|
|
<Enum name="TI" start="0x1" description="TI" />
|
|
<Enum name="MICROWIRE" start="0x2" description="Microwire" />
|
|
<Enum name="RESERVED" start="0x3" description="This combination is not supported and should not be used." />
|
|
</BitField>
|
|
<BitField start="6" size="1" name="CPOL" description="Clock Out Polarity. This bit is only used in SPI mode.">
|
|
<Enum name="LOW" start="0" description="SPI controller maintains the bus clock low between frames." />
|
|
<Enum name="HIGH" start="1" description="SPI controller maintains the bus clock high between frames." />
|
|
</BitField>
|
|
<BitField start="7" size="1" name="CPHA" description="Clock Out Phase. This bit is only used in SPI mode.">
|
|
<Enum name="FIRSTCLOCK" start="0" description="SPI controller captures serial data on the first clock transition of the frame, that is, the transition away from the inter-frame state of the clock line." />
|
|
<Enum name="SECONDCLOCK" start="1" description="SPI controller captures serial data on the second clock transition of the frame, that is, the transition back to the inter-frame state of the clock line." />
|
|
</BitField>
|
|
<BitField start="8" size="8" name="SCR" description="Serial Clock Rate. The number of prescaler output clocks per bit on the bus, minus one. Given that CPSDVSR is the prescale divider, and the APB clock PCLK clocks the prescaler, the bit frequency is PCLK / (CPSDVSR X [SCR+1])." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="CR1" access="Read/Write" description="Control Register 1. Selects master/slave and other modes." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="LBM" description="Loop Back Mode.">
|
|
<Enum name="DURING_NORMAL_OPERAT" start="0" description="During normal operation." />
|
|
<Enum name="SERIAL_INPUT_IS_TAKE" start="1" description="Serial input is taken from the serial output (MOSI or MISO) rather than the serial input pin (MISO or MOSI respectively)." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="SSE" description="SPI Enable.">
|
|
<Enum name="DISABLED" start="0" description="The SPI controller is disabled." />
|
|
<Enum name="ENABLED" start="1" description="The SPI controller will interact with other devices on the serial bus. Software should write the appropriate control information to the other SSP/SPI registers and interrupt controller registers, before setting this bit." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="MS" description="Master/Slave Mode.This bit can only be written when the SSE bit is 0.">
|
|
<Enum name="MASTER" start="0" description="The SPI controller acts as a master on the bus, driving the SCLK, MOSI, and SSEL lines and receiving the MISO line." />
|
|
<Enum name="SLAVE" start="1" description="The SPI controller acts as a slave on the bus, driving MISO line and receiving SCLK, MOSI, and SSEL lines." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="SOD" description="Slave Output Disable. This bit is relevant only in slave mode (MS = 1). If it is 1, this blocks this SPI controller from driving the transmit data line (MISO)." />
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="DR" access="None" description="Data Register. Writes fill the transmit FIFO, and reads empty the receive FIFO." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="DATA" description="Write: software can write data to be sent in a future frame to this register whenever the TNF bit in the Status register is 1, indicating that the Tx FIFO is not full. If the Tx FIFO was previously empty and the SPI controller is not busy on the bus, transmission of the data will begin immediately. Otherwise the data written to this register will be sent as soon as all previous data has been sent (and received). If the data length is less than 16 bit, software must right-justify the data written to this register. Read: software can read data from this register whenever the RNE bit in the Status register is 1, indicating that the Rx FIFO is not empty. When software reads this register, the SPI controller returns data from the least recent frame in the Rx FIFO. If the data length is less than 16 bit, the data is right-justified in this field with higher order bits filled with 0s." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="SR" access="ReadOnly" description="Status Register" reset_value="0x00000003" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="TFE" description="Transmit FIFO Empty. This bit is 1 is the Transmit FIFO is empty, 0 if not." />
|
|
<BitField start="1" size="1" name="TNF" description="Transmit FIFO Not Full. This bit is 0 if the Tx FIFO is full, 1 if not." />
|
|
<BitField start="2" size="1" name="RNE" description="Receive FIFO Not Empty. This bit is 0 if the Receive FIFO is empty, 1 if not." />
|
|
<BitField start="3" size="1" name="RFF" description="Receive FIFO Full. This bit is 1 if the Receive FIFO is full, 0 if not." />
|
|
<BitField start="4" size="1" name="BSY" description="Busy. This bit is 0 if the SPI controller is idle, 1 if it is currently sending/receiving a frame and/or the Tx FIFO is not empty." />
|
|
<BitField start="5" size="27" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="CPSR" access="Read/Write" description="Clock Prescale Register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="CPSDVSR" description="This even value between 2 and 254, by which SPI_PCLK is divided to yield the prescaler output clock. Bit 0 always reads as 0." />
|
|
<BitField start="8" size="24" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="IMSC" access="Read/Write" description="Interrupt Mask Set and Clear Register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RORIM" description="Software should set this bit to enable interrupt when a Receive Overrun occurs, that is, when the Rx FIFO is full and another frame is completely received. The ARM spec implies that the preceding frame data is overwritten by the new frame data when this occurs." />
|
|
<BitField start="1" size="1" name="RTIM" description="Software should set this bit to enable interrupt when a Receive Time-out condition occurs. A Receive Time-out occurs when the Rx FIFO is not empty, and no has not been read for a time-out period. The time-out period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR X [SCR+1])." />
|
|
<BitField start="2" size="1" name="RXIM" description="Software should set this bit to enable interrupt when the Rx FIFO is at least half full." />
|
|
<BitField start="3" size="1" name="TXIM" description="Software should set this bit to enable interrupt when the Tx FIFO is at least half empty." />
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x018" size="4" name="RIS" access="ReadOnly" description="Raw Interrupt Status Register" reset_value="0x00000008" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RORRIS" description="This bit is 1 if another frame was completely received while the RxFIFO was full. The ARM spec implies that the preceding frame data is overwritten by the new frame data when this occurs." />
|
|
<BitField start="1" size="1" name="RTRIS" description="This bit is 1 if the Rx FIFO is not empty, and has not been read for a time-out period. The time-out period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR X [SCR+1])." />
|
|
<BitField start="2" size="1" name="RXRIS" description="This bit is 1 if the Rx FIFO is at least half full." />
|
|
<BitField start="3" size="1" name="TXRIS" description="This bit is 1 if the Tx FIFO is at least half empty." />
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x01C" size="4" name="MIS" access="ReadOnly" description="Masked Interrupt Status Register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RORMIS" description="This bit is 1 if another frame was completely received while the RxFIFO was full, and this interrupt is enabled." />
|
|
<BitField start="1" size="1" name="RTMIS" description="This bit is 1 if the Rx FIFO is not empty, has not been read for a time-out period, and this interrupt is enabled. The time-out period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR X [SCR+1])." />
|
|
<BitField start="2" size="1" name="RXMIS" description="This bit is 1 if the Rx FIFO is at least half full, and this interrupt is enabled." />
|
|
<BitField start="3" size="1" name="TXMIS" description="This bit is 1 if the Tx FIFO is at least half empty, and this interrupt is enabled." />
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x020" size="4" name="ICR" access="WriteOnly" description="SSPICR Interrupt Clear Register" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="RORIC" description="Writing a 1 to this bit clears the frame was received when RxFIFO was full interrupt." />
|
|
<BitField start="1" size="1" name="RTIC" description="Writing a 1 to this bit clears the Rx FIFO was not empty and has not been read for a timeout period interrupt. The timeout period is the same for master and slave modes and is determined by the SSP bit rate: 32 bits at PCLK / (CPSDVSR X [SCR+1])." />
|
|
<BitField start="2" size="30" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="GPIO_GROUP_INT0" start="0x4005C000" description="GPIO group interrupt ">
|
|
<Register start="+0x000" size="4" name="CTRL" access="Read/Write" description="GPIO grouped interrupt control register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="INT" description="Group interrupt status. This bit is cleared by writing a one to it. Writing zero has no effect.">
|
|
<Enum name="NO_INTERRUPT_REQUEST" start="0" description="No interrupt request is pending." />
|
|
<Enum name="INTERRUPT_REQUEST_IS" start="1" description="Interrupt request is active." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="COMB" description="Combine enabled inputs for group interrupt">
|
|
<Enum name="OR_FUNCTIONALITY_A_" start="0" description="OR functionality: A grouped interrupt is generated when any one of the enabled inputs is active (based on its programmed polarity)." />
|
|
<Enum name="AND_FUNCTIONALITY_A" start="1" description="AND functionality: An interrupt is generated when all enabled bits are active (based on their programmed polarity)." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="TRIG" description="Group interrupt trigger">
|
|
<Enum name="EDGE_TRIGGERED" start="0" description="Edge-triggered" />
|
|
<Enum name="LEVEL_TRIGGERED" start="1" description="Level-triggered" />
|
|
</BitField>
|
|
<BitField start="3" size="29" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x020+0" size="4" name="PORT_POL0" access="Read/Write" description="GPIO grouped interrupt port 0 polarity register" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="POL_0" description="Configure pin polarity of port pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1 . 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="1" size="1" name="POL_1" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="2" size="1" name="POL_2" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="3" size="1" name="POL_3" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="4" size="1" name="POL_4" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="5" size="1" name="POL_5" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="6" size="1" name="POL_6" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="7" size="1" name="POL_7" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="8" size="1" name="POL_8" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="9" size="1" name="POL_9" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="10" size="1" name="POL_10" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="11" size="1" name="POL_11" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="12" size="1" name="POL_12" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="13" size="1" name="POL_13" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="14" size="1" name="POL_14" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="15" size="1" name="POL_15" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="16" size="1" name="POL_16" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="17" size="1" name="POL_17" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="18" size="1" name="POL_18" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="19" size="1" name="POL_19" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="20" size="1" name="POL_20" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="21" size="1" name="POL_21" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="22" size="1" name="POL_22" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="23" size="1" name="POL_23" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="24" size="1" name="POL_24" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="25" size="1" name="POL_25" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="26" size="1" name="POL_26" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="27" size="1" name="POL_27" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="28" size="1" name="POL_28" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="29" size="1" name="POL_29" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="30" size="1" name="POL_30" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="31" size="1" name="POL_31" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
</Register>
|
|
<Register start="+0x020+4" size="4" name="PORT_POL1" access="Read/Write" description="GPIO grouped interrupt port 0 polarity register" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="POL_0" description="Configure pin polarity of port pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1 . 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="1" size="1" name="POL_1" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="2" size="1" name="POL_2" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="3" size="1" name="POL_3" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="4" size="1" name="POL_4" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="5" size="1" name="POL_5" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="6" size="1" name="POL_6" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="7" size="1" name="POL_7" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="8" size="1" name="POL_8" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="9" size="1" name="POL_9" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="10" size="1" name="POL_10" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="11" size="1" name="POL_11" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="12" size="1" name="POL_12" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="13" size="1" name="POL_13" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="14" size="1" name="POL_14" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="15" size="1" name="POL_15" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="16" size="1" name="POL_16" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="17" size="1" name="POL_17" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="18" size="1" name="POL_18" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="19" size="1" name="POL_19" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="20" size="1" name="POL_20" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="21" size="1" name="POL_21" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="22" size="1" name="POL_22" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="23" size="1" name="POL_23" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="24" size="1" name="POL_24" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="25" size="1" name="POL_25" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="26" size="1" name="POL_26" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="27" size="1" name="POL_27" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="28" size="1" name="POL_28" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="29" size="1" name="POL_29" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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<BitField start="30" size="1" name="POL_30" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
<BitField start="31" size="1" name="POL_31" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
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|
</Register>
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<Register start="+0x040+0" size="4" name="PORT_ENA0" access="Read/Write" description="GPIO grouped interrupt port 0/1 enable register" reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="ENA_0" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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<BitField start="1" size="1" name="ENA_1" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="2" size="1" name="ENA_2" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="3" size="1" name="ENA_3" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="4" size="1" name="ENA_4" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="5" size="1" name="ENA_5" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="6" size="1" name="ENA_6" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="7" size="1" name="ENA_7" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="8" size="1" name="ENA_8" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="9" size="1" name="ENA_9" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="10" size="1" name="ENA_10" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="11" size="1" name="ENA_11" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="12" size="1" name="ENA_12" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="13" size="1" name="ENA_13" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="14" size="1" name="ENA_14" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="15" size="1" name="ENA_15" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="16" size="1" name="ENA_16" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="17" size="1" name="ENA_17" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="18" size="1" name="ENA_18" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="19" size="1" name="ENA_19" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="20" size="1" name="ENA_20" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="21" size="1" name="ENA_21" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="22" size="1" name="ENA_22" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="23" size="1" name="ENA_23" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="24" size="1" name="ENA_24" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="25" size="1" name="ENA_25" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="26" size="1" name="ENA_26" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="27" size="1" name="ENA_27" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="28" size="1" name="ENA_28" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="29" size="1" name="ENA_29" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="30" size="1" name="ENA_30" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="31" size="1" name="ENA_31" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
</Register>
|
|
<Register start="+0x040+4" size="4" name="PORT_ENA1" access="Read/Write" description="GPIO grouped interrupt port 0/1 enable register" reset_value="0" reset_mask="0xFFFFFFFF">
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|
<BitField start="0" size="1" name="ENA_0" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
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|
<BitField start="1" size="1" name="ENA_1" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="2" size="1" name="ENA_2" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="3" size="1" name="ENA_3" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="4" size="1" name="ENA_4" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="5" size="1" name="ENA_5" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="6" size="1" name="ENA_6" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="7" size="1" name="ENA_7" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="8" size="1" name="ENA_8" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="9" size="1" name="ENA_9" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="10" size="1" name="ENA_10" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="11" size="1" name="ENA_11" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="12" size="1" name="ENA_12" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="13" size="1" name="ENA_13" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="14" size="1" name="ENA_14" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="15" size="1" name="ENA_15" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="16" size="1" name="ENA_16" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="17" size="1" name="ENA_17" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="18" size="1" name="ENA_18" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="19" size="1" name="ENA_19" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="20" size="1" name="ENA_20" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="21" size="1" name="ENA_21" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="22" size="1" name="ENA_22" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="23" size="1" name="ENA_23" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="24" size="1" name="ENA_24" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="25" size="1" name="ENA_25" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="26" size="1" name="ENA_26" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="27" size="1" name="ENA_27" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="28" size="1" name="ENA_28" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="29" size="1" name="ENA_29" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="30" size="1" name="ENA_30" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="31" size="1" name="ENA_31" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="GPIO_GROUP_INT1" start="0x40060000" description="GPIO group interrupt ">
|
|
<Register start="+0x000" size="4" name="CTRL" access="Read/Write" description="GPIO grouped interrupt control register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="INT" description="Group interrupt status. This bit is cleared by writing a one to it. Writing zero has no effect.">
|
|
<Enum name="NO_INTERRUPT_REQUEST" start="0" description="No interrupt request is pending." />
|
|
<Enum name="INTERRUPT_REQUEST_IS" start="1" description="Interrupt request is active." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="COMB" description="Combine enabled inputs for group interrupt">
|
|
<Enum name="OR_FUNCTIONALITY_A_" start="0" description="OR functionality: A grouped interrupt is generated when any one of the enabled inputs is active (based on its programmed polarity)." />
|
|
<Enum name="AND_FUNCTIONALITY_A" start="1" description="AND functionality: An interrupt is generated when all enabled bits are active (based on their programmed polarity)." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="TRIG" description="Group interrupt trigger">
|
|
<Enum name="EDGE_TRIGGERED" start="0" description="Edge-triggered" />
|
|
<Enum name="LEVEL_TRIGGERED" start="1" description="Level-triggered" />
|
|
</BitField>
|
|
<BitField start="3" size="29" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x020+0" size="4" name="PORT_POL0" access="Read/Write" description="GPIO grouped interrupt port 0 polarity register" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="POL_0" description="Configure pin polarity of port pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1 . 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="1" size="1" name="POL_1" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="2" size="1" name="POL_2" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="3" size="1" name="POL_3" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="4" size="1" name="POL_4" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="5" size="1" name="POL_5" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="6" size="1" name="POL_6" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="7" size="1" name="POL_7" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="8" size="1" name="POL_8" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="9" size="1" name="POL_9" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="10" size="1" name="POL_10" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="11" size="1" name="POL_11" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="12" size="1" name="POL_12" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="13" size="1" name="POL_13" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="14" size="1" name="POL_14" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="15" size="1" name="POL_15" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="16" size="1" name="POL_16" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="17" size="1" name="POL_17" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="18" size="1" name="POL_18" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="19" size="1" name="POL_19" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="20" size="1" name="POL_20" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="21" size="1" name="POL_21" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="22" size="1" name="POL_22" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="23" size="1" name="POL_23" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="24" size="1" name="POL_24" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="25" size="1" name="POL_25" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="26" size="1" name="POL_26" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="27" size="1" name="POL_27" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="28" size="1" name="POL_28" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="29" size="1" name="POL_29" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="30" size="1" name="POL_30" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="31" size="1" name="POL_31" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
</Register>
|
|
<Register start="+0x020+4" size="4" name="PORT_POL1" access="Read/Write" description="GPIO grouped interrupt port 0 polarity register" reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="POL_0" description="Configure pin polarity of port pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1 . 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="1" size="1" name="POL_1" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="2" size="1" name="POL_2" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="3" size="1" name="POL_3" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="4" size="1" name="POL_4" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="5" size="1" name="POL_5" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="6" size="1" name="POL_6" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="7" size="1" name="POL_7" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="8" size="1" name="POL_8" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="9" size="1" name="POL_9" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="10" size="1" name="POL_10" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="11" size="1" name="POL_11" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="12" size="1" name="POL_12" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="13" size="1" name="POL_13" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="14" size="1" name="POL_14" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="15" size="1" name="POL_15" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="16" size="1" name="POL_16" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="17" size="1" name="POL_17" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="18" size="1" name="POL_18" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="19" size="1" name="POL_19" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="20" size="1" name="POL_20" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="21" size="1" name="POL_21" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="22" size="1" name="POL_22" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="23" size="1" name="POL_23" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="24" size="1" name="POL_24" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="25" size="1" name="POL_25" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="26" size="1" name="POL_26" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="27" size="1" name="POL_27" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="28" size="1" name="POL_28" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="29" size="1" name="POL_29" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="30" size="1" name="POL_30" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
<BitField start="31" size="1" name="POL_31" description="Configure pin polarity of port 0/1 pins for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the pin is active LOW. If the level on this pin is LOW, the pin contributes to the group interrupt. 1 = the pin is active HIGH. If the level on this pin is HIGH, the pin contributes to the group interrupt." />
|
|
</Register>
|
|
<Register start="+0x040+0" size="4" name="PORT_ENA0" access="Read/Write" description="GPIO grouped interrupt port 0/1 enable register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="ENA_0" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="1" size="1" name="ENA_1" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="2" size="1" name="ENA_2" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="3" size="1" name="ENA_3" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="4" size="1" name="ENA_4" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="5" size="1" name="ENA_5" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="6" size="1" name="ENA_6" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="7" size="1" name="ENA_7" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="8" size="1" name="ENA_8" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="9" size="1" name="ENA_9" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="10" size="1" name="ENA_10" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="11" size="1" name="ENA_11" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="12" size="1" name="ENA_12" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="13" size="1" name="ENA_13" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="14" size="1" name="ENA_14" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="15" size="1" name="ENA_15" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="16" size="1" name="ENA_16" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="17" size="1" name="ENA_17" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="18" size="1" name="ENA_18" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="19" size="1" name="ENA_19" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="20" size="1" name="ENA_20" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="21" size="1" name="ENA_21" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="22" size="1" name="ENA_22" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="23" size="1" name="ENA_23" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="24" size="1" name="ENA_24" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="25" size="1" name="ENA_25" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="26" size="1" name="ENA_26" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="27" size="1" name="ENA_27" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="28" size="1" name="ENA_28" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="29" size="1" name="ENA_29" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="30" size="1" name="ENA_30" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="31" size="1" name="ENA_31" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
</Register>
|
|
<Register start="+0x040+4" size="4" name="PORT_ENA1" access="Read/Write" description="GPIO grouped interrupt port 0/1 enable register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="ENA_0" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="1" size="1" name="ENA_1" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="2" size="1" name="ENA_2" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="3" size="1" name="ENA_3" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="4" size="1" name="ENA_4" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="5" size="1" name="ENA_5" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="6" size="1" name="ENA_6" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="7" size="1" name="ENA_7" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="8" size="1" name="ENA_8" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="9" size="1" name="ENA_9" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="10" size="1" name="ENA_10" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="11" size="1" name="ENA_11" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="12" size="1" name="ENA_12" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="13" size="1" name="ENA_13" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="14" size="1" name="ENA_14" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="15" size="1" name="ENA_15" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="16" size="1" name="ENA_16" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="17" size="1" name="ENA_17" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="18" size="1" name="ENA_18" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="19" size="1" name="ENA_19" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="20" size="1" name="ENA_20" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="21" size="1" name="ENA_21" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="22" size="1" name="ENA_22" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="23" size="1" name="ENA_23" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="24" size="1" name="ENA_24" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="25" size="1" name="ENA_25" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="26" size="1" name="ENA_26" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="27" size="1" name="ENA_27" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="28" size="1" name="ENA_28" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="29" size="1" name="ENA_29" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="30" size="1" name="ENA_30" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
<BitField start="31" size="1" name="ENA_31" description="Enable port 0/1 pin for group interrupt. Bit n corresponds to pin P0/1_n of port 0/1. 0 = the port 0/1 pin is disabled and does not contribute to the grouped interrupt. 1 = the port 0/1 pin is enabled and contributes to the grouped interrupt." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="RITIMER" start="0x40064000" description="Repetitive Interrupt Timer (RI timer)">
|
|
<Register start="+0x000" size="4" name="COMPVAL" access="Read/Write" description="Compare value LSB register. Holds the 32 LSBs of the compare value." reset_value="0xFFFFFFFF" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="RICOMP" description="Compare register. Holds the 32 LSBs of the compare value which is compared to the counter." />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="MASK" access="Read/Write" description="Mask LSB register. This register holds the 32 LSB s of the mask value. A one written to any bit will force a compare on the corresponding bit of the counter and compare register." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="RIMASK" description="Mask register. This register holds the 32 LSBs of the mask value. A one written to any bit overrides the result of the comparison for the corresponding bit of the counter and compare register (causes the comparison of the register bits to be always true)." />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="CTRL" access="Read/Write" description="Control register." reset_value="0xC" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="RITINT" description="Interrupt flag">
|
|
<Enum name="MASK" start="1" description="This bit is set to 1 by hardware whenever the counter value equals the masked compare value specified by the contents of RICOMPVAL and RIMASK registers. Writing a 1 to this bit will clear it to 0. Writing a 0 has no effect." />
|
|
<Enum name="NO_MASK" start="0" description="The counter value does not equal the masked compare value." />
|
|
</BitField>
|
|
<BitField start="1" size="1" name="RITENCLR" description="Timer enable clear">
|
|
<Enum name="CLEAR_ON_O" start="1" description="The timer will be cleared to 0 whenever the counter value equals the masked compare value specified by the contents of COMPVAL/COMPVAL_H and MASK/MASK_H registers. This will occur on the same clock that sets the interrupt flag." />
|
|
<Enum name="NOT_CLEAR_ON_0" start="0" description="The timer will not be cleared to 0." />
|
|
</BitField>
|
|
<BitField start="2" size="1" name="RITENBR" description="Timer enable for debug">
|
|
<Enum name="HALT_ON_DEBUG" start="1" description="The timer is halted when the processor is halted for debugging." />
|
|
<Enum name="NO_EFFECT_ON_DEBUG" start="0" description="Debug has no effect on the timer operation." />
|
|
</BitField>
|
|
<BitField start="3" size="1" name="RITEN" description="Timer enable.">
|
|
<Enum name="TIMER_ENABLED" start="1" description="Timer enabled. This can be overruled by a debug halt if enabled in bit 2." />
|
|
<Enum name="TIMER_DISABLED_" start="0" description="Timer disabled." />
|
|
</BitField>
|
|
<BitField start="4" size="28" name="RESERVED" description="Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="COUNTER" access="Read/Write" description="Counter LSB register. 32 LSBs of the counter." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="RICOUNTER" description="32 LSBs of the up counter. Counts continuously unless RITEN bit in CTRL register is cleared or debug mode is entered (if enabled by the RITNEBR bit in RICTRL). Can be loaded to any value in software." />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="COMPVAL_H" access="Read/Write" description="Compare value MSB register. Holds the 16 MSBs of the compare value." reset_value="0x0000FFFF" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="RICOMP" description="Compare value MSB register. Holds the 16 MSBs of the compare value which is compared to the counter." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="MASK_H" access="Read/Write" description="Mask MSB register. This register holds the 16 MSBs of the mask value. A one written to any bit will force a compare on the corresponding bit of the counter and compare register." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="RIMASK" description="Mask register. This register holds the 16 MSBs of the mask value. A one written to any bit overrides the result of the comparison for the corresponding bit of the counter and compare register (causes the comparison of the register bits to be always true)." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x018" size="4" name="COUNTER_H" access="Read/Write" description="Counter MSB register. 16 MSBs of the counter." reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="16" name="RICOUNTER" description="16 LSBs of the up counter. Counts continuously unless RITEN bit in RICTRL register is cleared or debug mode is entered (if enabled by the RITNEBR bit in RICTRL). Can be loaded to any value in software." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="USB" start="0x40080000" description="USB2.0 device controller">
|
|
<Register start="+0x000" size="4" name="DEVCMDSTAT" access="Read/Write" description="USB Device Command/Status register" reset_value="0x00000800" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="7" name="DEV_ADDR" description="USB device address. After bus reset, the address is reset to 0x00. If the enable bit is set, the device will respond on packets for function address DEV_ADDR. When receiving a SetAddress Control Request from the USB host, software must program the new address before completing the status phase of the SetAddress Control Request." />
|
|
<BitField start="7" size="1" name="DEV_EN" description="USB device enable. If this bit is set, the HW will start responding on packets for function address DEV_ADDR." />
|
|
<BitField start="8" size="1" name="SETUP" description="SETUP token received. If a SETUP token is received and acknowledged by the device, this bit is set. As long as this bit is set all received IN and OUT tokens will be NAKed by HW. SW must clear this bit by writing a one. If this bit is zero, HW will handle the tokens to the CTRL EP0 as indicated by the CTRL EP0 IN and OUT data information programmed by SW." />
|
|
<BitField start="9" size="1" name="PLL_ON" description="Always PLL Clock on:">
|
|
<Enum name="USB_NEEDCLK_FUNCTION" start="0" description="USB_NeedClk functional" />
|
|
<Enum name="USB_NEEDCLK_ALWAYS_1" start="1" description="USB_NeedClk always 1. Clock will not be stopped in case of suspend." />
|
|
</BitField>
|
|
<BitField start="10" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="11" size="1" name="LPM_SUP" description="LPM Supported:">
|
|
<Enum name="LPM_NOT_SUPPORTED_" start="0" description="LPM not supported." />
|
|
<Enum name="LPM_SUPPORTED_" start="1" description="LPM supported." />
|
|
</BitField>
|
|
<BitField start="12" size="1" name="INTONNAK_AO" description="Interrupt on NAK for interrupt and bulk OUT EP">
|
|
<Enum name="ACKNOW" start="0" description="Only acknowledged packets generate an interrupt" />
|
|
<Enum name="ACKNOW_NAK" start="1" description="Both acknowledged and NAKed packets generate interrupts." />
|
|
</BitField>
|
|
<BitField start="13" size="1" name="INTONNAK_AI" description="Interrupt on NAK for interrupt and bulk IN EP">
|
|
<Enum name="ACKNOW" start="0" description="Only acknowledged packets generate an interrupt" />
|
|
<Enum name="ACKNOW_NAK" start="1" description="Both acknowledged and NAKed packets generate interrupts." />
|
|
</BitField>
|
|
<BitField start="14" size="1" name="INTONNAK_CO" description="Interrupt on NAK for control OUT EP">
|
|
<Enum name="ACKNOW" start="0" description="Only acknowledged packets generate an interrupt" />
|
|
<Enum name="ACKNOW_NAK" start="1" description="Both acknowledged and NAKed packets generate interrupts." />
|
|
</BitField>
|
|
<BitField start="15" size="1" name="INTONNAK_CI" description="Interrupt on NAK for control IN EP">
|
|
<Enum name="ACKNOW" start="0" description="Only acknowledged packets generate an interrupt" />
|
|
<Enum name="ACKNOW_NAK" start="1" description="Both acknowledged and NAKed packets generate interrupts." />
|
|
</BitField>
|
|
<BitField start="16" size="1" name="DCON" description="Device status - connect. The connect bit must be set by SW to indicate that the device must signal a connect. The pull-up resistor on USB_DP will be enabled when this bit is set and the VbusDebounced bit is one." />
|
|
<BitField start="17" size="1" name="DSUS" description="Device status - suspend. The suspend bit indicates the current suspend state. It is set to 1 when the device hasn't seen any activity on its upstream port for more than 3 milliseconds. It is reset to 0 on any activity. When the device is suspended (Suspend bit DSUS = 1) and the software writes a 0 to it, the device will generate a remote wake-up. This will only happen when the device is connected (Connect bit = 1). When the device is not connected or not suspended, a writing a 0 has no effect. Writing a 1 never has an effect." />
|
|
<BitField start="18" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="19" size="1" name="LPM_SUS" description="Device status - LPM Suspend. This bit represents the current LPM suspend state. It is set to 1 by HW when the device has acknowledged the LPM request from the USB host and the Token Retry Time of 10us has elapsed. When the device is in the LPM suspended state (LPM suspend bit = 1) and the software writes a zero to this bit, the device will generate a remote walk-up. Software can only write a zero to this bit when the LPM_REWP bit is set to 1. HW resets this bit when it receives a host initiated resume. HW only updates the LPM_SUS bit when the LPM_SUPP bit is equal to one." />
|
|
<BitField start="20" size="1" name="LPM_REWP" description="LPM Remote Wake-up Enabled by USB host. HW sets this bit to one when the bRemoteWake bit in the LPM extended token is set to 1. HW will reset this bit to 0 when it receives the host initiated LPM resume, when a remote wake-up is sent by the device or when a USB bus reset is received. Software can use this bit to check if the remote wake-up feature is enabled by the host for the LPM transaction." />
|
|
<BitField start="21" size="3" name="RESERVED" description="Reserved." />
|
|
<BitField start="24" size="1" name="DCON_C" description="Device status - connect change. The Connect Change bit is set when the device's pull-up resistor is disconnected because VBus disappeared. The bit is reset by writing a one to it." />
|
|
<BitField start="25" size="1" name="DSUS_C" description="Device status - suspend change. The suspend change bit is set to 1 when the suspend bit toggles. The suspend bit can toggle because: - The device goes in the suspended state - The device is disconnected - The device receives resume signaling on its upstream port. The bit is reset by writing a one to it." />
|
|
<BitField start="26" size="1" name="DRES_C" description="Device status - reset change. This bit is set when the device received a bus reset. On a bus reset the device will automatically go to the default state (unconfigured and responding to address 0). The bit is reset by writing a one to it." />
|
|
<BitField start="27" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="28" size="1" name="VBUSDEBOUNCED" description="This bit indicates if Vbus is detected or not. The bit raises immediately when Vbus becomes high. It drops to zero if Vbus is low for at least 3 ms. If this bit is high and the DCon bit is set, the HW will enable the pull-up resistor to signal a connect." />
|
|
<BitField start="29" size="3" name="RESERVED" description="Reserved." />
|
|
</Register>
|
|
<Register start="+0x004" size="4" name="INFO" access="Read/Write" description="USB Info register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="11" name="FRAME_NR" description="Frame number. This contains the frame number of the last successfully received SOF. In case no SOF was received by the device at the beginning of a frame, the frame number returned is that of the last successfully received SOF. In case the SOF frame number contained a CRC error, the frame number returned will be the corrupted frame number as received by the device." />
|
|
<BitField start="11" size="4" name="ERR_CODE" description="The error code which last occurred:">
|
|
<Enum name="NO_ERROR" start="0x0" description="No error" />
|
|
<Enum name="PID_ENCODING_ERROR" start="0x1" description="PID encoding error" />
|
|
<Enum name="PID_UNKNOWN" start="0x2" description="PID unknown" />
|
|
<Enum name="PACKET_UNEXPECTED" start="0x3" description="Packet unexpected" />
|
|
<Enum name="TOKEN_CRC_ERROR" start="0x4" description="Token CRC error" />
|
|
<Enum name="DATA_CRC_ERROR" start="0x5" description="Data CRC error" />
|
|
<Enum name="TIME_OUT" start="0x6" description="Time out" />
|
|
<Enum name="BABBLE" start="0x7" description="Babble" />
|
|
<Enum name="TRUNCATED_EOP" start="0x8" description="Truncated EOP" />
|
|
<Enum name="SENT_RECEIVED_NAK" start="0x9" description="Sent/Received NAK" />
|
|
<Enum name="SENT_STALL" start="0xA" description="Sent Stall" />
|
|
<Enum name="OVERRUN" start="0xB" description="Overrun" />
|
|
<Enum name="SENT_EMPTY_PACKET" start="0xC" description="Sent empty packet" />
|
|
<Enum name="BITSTUFF_ERROR" start="0xD" description="Bitstuff error" />
|
|
<Enum name="SYNC_ERROR" start="0xE" description="Sync error" />
|
|
<Enum name="WRONG_DATA_TOGGLE" start="0xF" description="Wrong data toggle" />
|
|
</BitField>
|
|
<BitField start="15" size="1" name="RESERVED" description="Reserved." />
|
|
<BitField start="16" size="16" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x008" size="4" name="EPLISTSTART" access="Read/Write" description="USB EP Command/Status List start address" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="8" name="RESERVED" description="Reserved" />
|
|
<BitField start="8" size="24" name="EP_LIST" description="Start address of the USB EP Command/Status List." />
|
|
</Register>
|
|
<Register start="+0x00C" size="4" name="DATABUFSTART" access="Read/Write" description="USB Data buffer start address" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="22" name="RESERVED" description="Reserved" />
|
|
<BitField start="22" size="10" name="DA_BUF" description="Start address of the buffer pointer page where all endpoint data buffers are located." />
|
|
</Register>
|
|
<Register start="+0x010" size="4" name="LPM" access="Read/Write" description="Link Power Management register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="4" name="HIRD_HW" description="Host Initiated Resume Duration - HW. This is the HIRD value from the last received LPM token" />
|
|
<BitField start="4" size="4" name="HIRD_SW" description="Host Initiated Resume Duration - SW. This is the time duration required by the USB device system to come out of LPM initiated suspend after receiving the host initiated LPM resume." />
|
|
<BitField start="8" size="1" name="DATA_PENDING" description="As long as this bit is set to one and LPM supported bit is set to one, HW will return a NYET handshake on every LPM token it receives. If LPM supported bit is set to one and this bit is zero, HW will return an ACK handshake on every LPM token it receives. If SW has still data pending and LPM is supported, it must set this bit to 1." />
|
|
<BitField start="9" size="23" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x014" size="4" name="EPSKIP" access="Read/Write" description="USB Endpoint skip" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="30" name="SKIP" description="Endpoint skip: Writing 1 to one of these bits, will indicate to HW that it must deactivate the buffer assigned to this endpoint and return control back to software. When HW has deactivated the endpoint, it will clear this bit, but it will not modify the EPINUSE bit. An interrupt will be generated when the Active bit goes from 1 to 0. Note: In case of double-buffering, HW will only clear the Active bit of the buffer indicated by the EPINUSE bit." />
|
|
<BitField start="30" size="2" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x018" size="4" name="EPINUSE" access="Read/Write" description="USB Endpoint Buffer in use" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="RESERVED" description="Reserved. Fixed to zero because the control endpoint zero is fixed to single-buffering for each physical endpoint." />
|
|
<BitField start="2" size="8" name="BUF" description="Buffer in use: This register has one bit per physical endpoint. 0: HW is accessing buffer 0. 1: HW is accessing buffer 1." />
|
|
<BitField start="10" size="22" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x01C" size="4" name="EPBUFCFG" access="Read/Write" description="USB Endpoint Buffer Configuration register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="2" name="RESERVED" description="Reserved. Fixed to zero because the control endpoint zero is fixed to single-buffering for each physical endpoint." />
|
|
<BitField start="2" size="8" name="BUF_SB" description="Buffer usage: This register has one bit per physical endpoint. 0: Single-buffer. 1: Double-buffer. If the bit is set to single-buffer (0), it will not toggle the corresponding EPINUSE bit when it clears the active bit. If the bit is set to double-buffer (1), HW will toggle the EPINUSE bit when it clears the Active bit for the buffer." />
|
|
<BitField start="10" size="22" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
<Register start="+0x020" size="4" name="INTSTAT" access="Read/Write" description="USB interrupt status register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="EP0OUT" description="Interrupt status register bit for the Control EP0 OUT direction. This bit will be set if NBytes transitions to zero or the skip bit is set by software or a SETUP packet is successfully received for the control EP0. If the IntOnNAK_CO is set, this bit will also be set when a NAK is transmitted for the Control EP0 OUT direction. Software can clear this bit by writing a one to it." />
|
|
<BitField start="1" size="1" name="EP0IN" description="Interrupt status register bit for the Control EP0 IN direction. This bit will be set if NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_CI is set, this bit will also be set when a NAK is transmitted for the Control EP0 IN direction. Software can clear this bit by writing a one to it." />
|
|
<BitField start="2" size="1" name="EP1OUT" description="Interrupt status register bit for the EP1 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP1 OUT direction. Software can clear this bit by writing a one to it." />
|
|
<BitField start="3" size="1" name="EP1IN" description="Interrupt status register bit for the EP1 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP1 IN direction. Software can clear this bit by writing a one to it." />
|
|
<BitField start="4" size="1" name="EP2OUT" description="Interrupt status register bit for the EP2 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP2 OUT direction. Software can clear this bit by writing a one to it." />
|
|
<BitField start="5" size="1" name="EP2IN" description="Interrupt status register bit for the EP2 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP2 IN direction. Software can clear this bit by writing a one to it." />
|
|
<BitField start="6" size="1" name="EP3OUT" description="Interrupt status register bit for the EP3 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP3 OUT direction. Software can clear this bit by writing a one to it." />
|
|
<BitField start="7" size="1" name="EP3IN" description="Interrupt status register bit for the EP3 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP3 IN direction. Software can clear this bit by writing a one to it." />
|
|
<BitField start="8" size="1" name="EP4OUT" description="Interrupt status register bit for the EP4 OUT direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AO is set, this bit will also be set when a NAK is transmitted for the EP4 OUT direction. Software can clear this bit by writing a one to it." />
|
|
<BitField start="9" size="1" name="EP4IN" description="Interrupt status register bit for the EP4 IN direction. This bit will be set if the corresponding Active bit is cleared by HW. This is done in case the programmed NBytes transitions to zero or the skip bit is set by software. If the IntOnNAK_AI is set, this bit will also be set when a NAK is transmitted for the EP4 IN direction. Software can clear this bit by writing a one to it." />
|
|
<BitField start="10" size="20" name="RESERVED" description="Reserved" />
|
|
<BitField start="30" size="1" name="FRAME_INT" description="Frame interrupt. This bit is set to one every millisecond when the VbusDebounced bit and the DCON bit are set. This bit can be used by software when handling isochronous endpoints. Software can clear this bit by writing a one to it." />
|
|
<BitField start="31" size="1" name="DEV_INT" description="Device status interrupt. This bit is set by HW when one of the bits in the Device Status Change register are set. Software can clear this bit by writing a one to it." />
|
|
</Register>
|
|
<Register start="+0x024" size="4" name="INTEN" access="Read/Write" description="USB interrupt enable register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="10" name="EP_INT_EN" description="If this bit is set and the corresponding USB interrupt status bit is set, a HW interrupt is generated on the interrupt line indicated by the corresponding USB interrupt routing bit." />
|
|
<BitField start="10" size="20" name="RESERVED" description="Reserved" />
|
|
<BitField start="30" size="1" name="FRAME_INT_EN" description="If this bit is set and the corresponding USB interrupt status bit is set, a HW interrupt is generated on the interrupt line indicated by the corresponding USB interrupt routing bit." />
|
|
<BitField start="31" size="1" name="DEV_INT_EN" description="If this bit is set and the corresponding USB interrupt status bit is set, a HW interrupt is generated on the interrupt line indicated by the corresponding USB interrupt routing bit." />
|
|
</Register>
|
|
<Register start="+0x028" size="4" name="INTSETSTAT" access="Read/Write" description="USB set interrupt status register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="10" name="EP_SET_INT" description="If software writes a one to one of these bits, the corresponding USB interrupt status bit is set. When this register is read, the same value as the USB interrupt status register is returned." />
|
|
<BitField start="10" size="20" name="RESERVED" description="Reserved" />
|
|
<BitField start="30" size="1" name="FRAME_SET_INT" description="If software writes a one to one of these bits, the corresponding USB interrupt status bit is set. When this register is read, the same value as the USB interrupt status register is returned." />
|
|
<BitField start="31" size="1" name="DEV_SET_INT" description="If software writes a one to one of these bits, the corresponding USB interrupt status bit is set. When this register is read, the same value as the USB interrupt status register is returned." />
|
|
</Register>
|
|
<Register start="+0x02C" size="4" name="INTROUTING" access="Read/Write" description="USB interrupt routing register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="10" name="ROUTE_INT9_0" description="This bit can control on which hardware interrupt line the interrupt will be generated: 0: IRQ interrupt line is selected for this interrupt bit 1: FIQ interrupt line is selected for this interrupt bit" />
|
|
<BitField start="10" size="20" name="RESERVED" description="Reserved" />
|
|
<BitField start="30" size="1" name="ROUTE_INT30" description="This bit can control on which hardware interrupt line the interrupt will be generated: 0: IRQ interrupt line is selected for this interrupt bit 1: FIQ interrupt line is selected for this interrupt bit" />
|
|
<BitField start="31" size="1" name="ROUTE_INT31" description="This bit can control on which hardware interrupt line the interrupt will be generated: 0: IRQ interrupt line is selected for this interrupt bit 1: FIQ interrupt line is selected for this interrupt bit" />
|
|
</Register>
|
|
<Register start="+0x034" size="4" name="EPTOGGLE" access="ReadOnly" description="USB Endpoint toggle register" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="10" name="TOGGLE" description="Endpoint data toggle: This field indicates the current value of the data toggle for the corresponding endpoint." />
|
|
<BitField start="10" size="22" name="RESERVED" description="Reserved" />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="GPIO_PORT" start="0x50000000" description="GPIO port ">
|
|
<Register start="+0x0000+0" size="1" name="B[0]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+1" size="1" name="B[1]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+2" size="1" name="B[2]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+3" size="1" name="B[3]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+4" size="1" name="B[4]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+5" size="1" name="B[5]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+6" size="1" name="B[6]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+7" size="1" name="B[7]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+8" size="1" name="B[8]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+9" size="1" name="B[9]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+10" size="1" name="B[10]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+11" size="1" name="B[11]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+12" size="1" name="B[12]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+13" size="1" name="B[13]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+14" size="1" name="B[14]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+15" size="1" name="B[15]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+16" size="1" name="B[16]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+17" size="1" name="B[17]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+18" size="1" name="B[18]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+19" size="1" name="B[19]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+20" size="1" name="B[20]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+21" size="1" name="B[21]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+22" size="1" name="B[22]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+23" size="1" name="B[23]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+24" size="1" name="B[24]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+25" size="1" name="B[25]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+26" size="1" name="B[26]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+27" size="1" name="B[27]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+28" size="1" name="B[28]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+29" size="1" name="B[29]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+30" size="1" name="B[30]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+31" size="1" name="B[31]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+32" size="1" name="B[32]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+33" size="1" name="B[33]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+34" size="1" name="B[34]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+35" size="1" name="B[35]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+36" size="1" name="B[36]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+37" size="1" name="B[37]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+38" size="1" name="B[38]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+39" size="1" name="B[39]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+40" size="1" name="B[40]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+41" size="1" name="B[41]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+42" size="1" name="B[42]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+43" size="1" name="B[43]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+44" size="1" name="B[44]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+45" size="1" name="B[45]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+46" size="1" name="B[46]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+47" size="1" name="B[47]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+48" size="1" name="B[48]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+49" size="1" name="B[49]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+50" size="1" name="B[50]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+51" size="1" name="B[51]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+52" size="1" name="B[52]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+53" size="1" name="B[53]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+54" size="1" name="B[54]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+55" size="1" name="B[55]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+56" size="1" name="B[56]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+57" size="1" name="B[57]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+58" size="1" name="B[58]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+59" size="1" name="B[59]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+60" size="1" name="B[60]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+61" size="1" name="B[61]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+62" size="1" name="B[62]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x0000+63" size="1" name="B[63]" access="Read/Write" description="Byte pin registers port 0/1; pins PIO0/1_0 to PIO0/1_31" reset_value="0" reset_mask="0xFF">
|
|
<BitField start="0" size="1" name="PBYTE" description="Read: state of the pin P0/1_n, regardless of direction, masking, or alternate function, except that pins configured as analog I/O always read as 0. Write: loads the pin's output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+0" size="4" name="W[0]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+4" size="4" name="W[1]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+8" size="4" name="W[2]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+12" size="4" name="W[3]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+16" size="4" name="W[4]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+20" size="4" name="W[5]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+24" size="4" name="W[6]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+28" size="4" name="W[7]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+32" size="4" name="W[8]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+36" size="4" name="W[9]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+40" size="4" name="W[10]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+44" size="4" name="W[11]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+48" size="4" name="W[12]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+52" size="4" name="W[13]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+56" size="4" name="W[14]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+60" size="4" name="W[15]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+64" size="4" name="W[16]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+68" size="4" name="W[17]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+72" size="4" name="W[18]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+76" size="4" name="W[19]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+80" size="4" name="W[20]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+84" size="4" name="W[21]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+88" size="4" name="W[22]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+92" size="4" name="W[23]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+96" size="4" name="W[24]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+100" size="4" name="W[25]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+104" size="4" name="W[26]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+108" size="4" name="W[27]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+112" size="4" name="W[28]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+116" size="4" name="W[29]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+120" size="4" name="W[30]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+124" size="4" name="W[31]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+128" size="4" name="W[32]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+132" size="4" name="W[33]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+136" size="4" name="W[34]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+140" size="4" name="W[35]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+144" size="4" name="W[36]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+148" size="4" name="W[37]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+152" size="4" name="W[38]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+156" size="4" name="W[39]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+160" size="4" name="W[40]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+164" size="4" name="W[41]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+168" size="4" name="W[42]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+172" size="4" name="W[43]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+176" size="4" name="W[44]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+180" size="4" name="W[45]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+184" size="4" name="W[46]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+188" size="4" name="W[47]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+192" size="4" name="W[48]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+196" size="4" name="W[49]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+200" size="4" name="W[50]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+204" size="4" name="W[51]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+208" size="4" name="W[52]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+212" size="4" name="W[53]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+216" size="4" name="W[54]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+220" size="4" name="W[55]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+224" size="4" name="W[56]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+228" size="4" name="W[57]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+232" size="4" name="W[58]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+236" size="4" name="W[59]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+240" size="4" name="W[60]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+244" size="4" name="W[61]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+248" size="4" name="W[62]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x1000+252" size="4" name="W[63]" access="Read/Write" description="Word pin registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="32" name="PWORD" description="Read 0: pin is LOW. Write 0: clear output bit. Read 0xFFFF FFFF: pin is HIGH. Write any value 0x0000 0001 to 0xFFFF FFFF: set output bit. Only 0 or 0xFFFF FFFF can be read. Writing any value other than 0 will set the output bit." />
|
|
</Register>
|
|
<Register start="+0x2000+0" size="4" name="DIR0" access="Read/Write" description="Direction registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="DIRP0" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="1" size="1" name="DIRP1" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="2" size="1" name="DIRP2" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="3" size="1" name="DIRP3" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="4" size="1" name="DIRP4" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="5" size="1" name="DIRP5" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="6" size="1" name="DIRP6" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="7" size="1" name="DIRP7" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="8" size="1" name="DIRP8" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="9" size="1" name="DIRP9" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="10" size="1" name="DIRP10" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="11" size="1" name="DIRP11" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="12" size="1" name="DIRP12" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="13" size="1" name="DIRP13" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="14" size="1" name="DIRP14" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="15" size="1" name="DIRP15" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="16" size="1" name="DIRP16" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="17" size="1" name="DIRP17" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="18" size="1" name="DIRP18" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="19" size="1" name="DIRP19" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="20" size="1" name="DIRP20" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="21" size="1" name="DIRP21" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="22" size="1" name="DIRP22" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="23" size="1" name="DIRP23" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="24" size="1" name="DIRP24" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="25" size="1" name="DIRP25" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="26" size="1" name="DIRP26" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="27" size="1" name="DIRP27" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="28" size="1" name="DIRP28" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="29" size="1" name="DIRP29" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="30" size="1" name="DIRP30" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="31" size="1" name="DIRP31" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
</Register>
|
|
<Register start="+0x2000+4" size="4" name="DIR1" access="Read/Write" description="Direction registers port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="DIRP0" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="1" size="1" name="DIRP1" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="2" size="1" name="DIRP2" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="3" size="1" name="DIRP3" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="4" size="1" name="DIRP4" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="5" size="1" name="DIRP5" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="6" size="1" name="DIRP6" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="7" size="1" name="DIRP7" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="8" size="1" name="DIRP8" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="9" size="1" name="DIRP9" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="10" size="1" name="DIRP10" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="11" size="1" name="DIRP11" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="12" size="1" name="DIRP12" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="13" size="1" name="DIRP13" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="14" size="1" name="DIRP14" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="15" size="1" name="DIRP15" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="16" size="1" name="DIRP16" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="17" size="1" name="DIRP17" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="18" size="1" name="DIRP18" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="19" size="1" name="DIRP19" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="20" size="1" name="DIRP20" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="21" size="1" name="DIRP21" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="22" size="1" name="DIRP22" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="23" size="1" name="DIRP23" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="24" size="1" name="DIRP24" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="25" size="1" name="DIRP25" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="26" size="1" name="DIRP26" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="27" size="1" name="DIRP27" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="28" size="1" name="DIRP28" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="29" size="1" name="DIRP29" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="30" size="1" name="DIRP30" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
<BitField start="31" size="1" name="DIRP31" description="Selects pin direction for pin P0/1_n (bit 0 = P0/1_0, bit 1 = P0_1, ..., bit 31 = P0/1_31). 0 = input. 1 = output." />
|
|
</Register>
|
|
<Register start="+0x2080+0" size="4" name="MASK0" access="Read/Write" description="Mask register port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="MASKP0" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
|
|
<BitField start="1" size="1" name="MASKP1" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
|
|
<BitField start="2" size="1" name="MASKP2" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
|
|
<BitField start="3" size="1" name="MASKP3" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
|
|
<BitField start="4" size="1" name="MASKP4" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="5" size="1" name="MASKP5" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="6" size="1" name="MASKP6" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="7" size="1" name="MASKP7" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="8" size="1" name="MASKP8" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="9" size="1" name="MASKP9" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="10" size="1" name="MASKP10" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="11" size="1" name="MASKP11" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="12" size="1" name="MASKP12" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="13" size="1" name="MASKP13" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="14" size="1" name="MASKP14" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="15" size="1" name="MASKP15" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="16" size="1" name="MASKP16" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="17" size="1" name="MASKP17" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="18" size="1" name="MASKP18" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="19" size="1" name="MASKP19" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="20" size="1" name="MASKP20" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="21" size="1" name="MASKP21" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="22" size="1" name="MASKP22" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="23" size="1" name="MASKP23" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="24" size="1" name="MASKP24" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="25" size="1" name="MASKP25" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="26" size="1" name="MASKP26" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="27" size="1" name="MASKP27" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="28" size="1" name="MASKP28" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="29" size="1" name="MASKP29" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="30" size="1" name="MASKP30" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="31" size="1" name="MASKP31" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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</Register>
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|
<Register start="+0x2080+4" size="4" name="MASK1" access="Read/Write" description="Mask register port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="MASKP0" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="1" size="1" name="MASKP1" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="2" size="1" name="MASKP2" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="3" size="1" name="MASKP3" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="4" size="1" name="MASKP4" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="5" size="1" name="MASKP5" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="6" size="1" name="MASKP6" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="7" size="1" name="MASKP7" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="8" size="1" name="MASKP8" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="9" size="1" name="MASKP9" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="10" size="1" name="MASKP10" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="11" size="1" name="MASKP11" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="12" size="1" name="MASKP12" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="13" size="1" name="MASKP13" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="14" size="1" name="MASKP14" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="15" size="1" name="MASKP15" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="16" size="1" name="MASKP16" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="17" size="1" name="MASKP17" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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|
<BitField start="18" size="1" name="MASKP18" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="19" size="1" name="MASKP19" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="20" size="1" name="MASKP20" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="21" size="1" name="MASKP21" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="22" size="1" name="MASKP22" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="23" size="1" name="MASKP23" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="24" size="1" name="MASKP24" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="25" size="1" name="MASKP25" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="26" size="1" name="MASKP26" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="27" size="1" name="MASKP27" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="28" size="1" name="MASKP28" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="29" size="1" name="MASKP29" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="30" size="1" name="MASKP30" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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<BitField start="31" size="1" name="MASKP31" description="Controls which bits corresponding to P0/1_n are active in the P0/1 PIN register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read MPORT: pin state; write MPORT: load output bit. 1 = Read MPORT: 0; write MPORT: output bit not affected." />
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</Register>
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<Register start="+0x2100+0" size="4" name="PIN0" access="Read/Write" description="Portpin register port 0" reset_value="0" reset_mask="0xFFFFFFFF">
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<BitField start="0" size="1" name="PORT0" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="1" size="1" name="PORT1" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="2" size="1" name="PORT2" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="3" size="1" name="PORT3" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="4" size="1" name="PORT4" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="5" size="1" name="PORT5" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="6" size="1" name="PORT6" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="7" size="1" name="PORT7" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="8" size="1" name="PORT8" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="9" size="1" name="PORT9" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="10" size="1" name="PORT10" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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<BitField start="11" size="1" name="PORT11" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="12" size="1" name="PORT12" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="13" size="1" name="PORT13" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="14" size="1" name="PORT14" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="15" size="1" name="PORT15" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="16" size="1" name="PORT16" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="17" size="1" name="PORT17" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="18" size="1" name="PORT18" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="19" size="1" name="PORT19" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="20" size="1" name="PORT20" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="21" size="1" name="PORT21" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="22" size="1" name="PORT22" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="23" size="1" name="PORT23" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="24" size="1" name="PORT24" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="25" size="1" name="PORT25" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="26" size="1" name="PORT26" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="27" size="1" name="PORT27" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="28" size="1" name="PORT28" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="29" size="1" name="PORT29" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="30" size="1" name="PORT30" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="31" size="1" name="PORT31" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
</Register>
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|
<Register start="+0x2100+4" size="4" name="PIN1" access="Read/Write" description="Portpin register port 0" reset_value="0" reset_mask="0xFFFFFFFF">
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|
<BitField start="0" size="1" name="PORT0" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="1" size="1" name="PORT1" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="2" size="1" name="PORT2" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="3" size="1" name="PORT3" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="4" size="1" name="PORT4" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="5" size="1" name="PORT5" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="6" size="1" name="PORT6" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="7" size="1" name="PORT7" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="8" size="1" name="PORT8" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="9" size="1" name="PORT9" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="10" size="1" name="PORT10" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="11" size="1" name="PORT11" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="12" size="1" name="PORT12" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="13" size="1" name="PORT13" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="14" size="1" name="PORT14" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="15" size="1" name="PORT15" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="16" size="1" name="PORT16" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="17" size="1" name="PORT17" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="18" size="1" name="PORT18" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="19" size="1" name="PORT19" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="20" size="1" name="PORT20" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="21" size="1" name="PORT21" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="22" size="1" name="PORT22" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="23" size="1" name="PORT23" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="24" size="1" name="PORT24" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="25" size="1" name="PORT25" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="26" size="1" name="PORT26" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
|
|
<BitField start="27" size="1" name="PORT27" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="28" size="1" name="PORT28" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="29" size="1" name="PORT29" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="30" size="1" name="PORT30" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
<BitField start="31" size="1" name="PORT31" description="Reads pin states or loads output bits (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is low; write: clear output bit. 1 = Read: pin is high; write: set output bit." />
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|
</Register>
|
|
<Register start="+0x2180+0" size="4" name="MPIN0" access="Read/Write" description="Masked port register port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
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|
<BitField start="0" size="1" name="MPORTP0" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="1" size="1" name="MPORTP1" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="2" size="1" name="MPORTP2" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="3" size="1" name="MPORTP3" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="4" size="1" name="MPORTP4" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="5" size="1" name="MPORTP5" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="6" size="1" name="MPORTP6" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="7" size="1" name="MPORTP7" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="8" size="1" name="MPORTP8" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="9" size="1" name="MPORTP9" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="10" size="1" name="MPORTP10" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="11" size="1" name="MPORTP11" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="12" size="1" name="MPORTP12" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="13" size="1" name="MPORTP13" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="14" size="1" name="MPORTP14" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="15" size="1" name="MPORTP15" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="16" size="1" name="MPORTP16" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="17" size="1" name="MPORTP17" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="18" size="1" name="MPORTP18" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="19" size="1" name="MPORTP19" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="20" size="1" name="MPORTP20" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="21" size="1" name="MPORTP21" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="22" size="1" name="MPORTP22" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="23" size="1" name="MPORTP23" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="24" size="1" name="MPORTP24" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="25" size="1" name="MPORTP25" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="26" size="1" name="MPORTP26" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="27" size="1" name="MPORTP27" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="28" size="1" name="MPORTP28" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="29" size="1" name="MPORTP29" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="30" size="1" name="MPORTP30" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="31" size="1" name="MPORTP31" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
</Register>
|
|
<Register start="+0x2180+4" size="4" name="MPIN1" access="Read/Write" description="Masked port register port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="MPORTP0" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="1" size="1" name="MPORTP1" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="2" size="1" name="MPORTP2" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="3" size="1" name="MPORTP3" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="4" size="1" name="MPORTP4" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="5" size="1" name="MPORTP5" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="6" size="1" name="MPORTP6" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="7" size="1" name="MPORTP7" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="8" size="1" name="MPORTP8" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="9" size="1" name="MPORTP9" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="10" size="1" name="MPORTP10" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="11" size="1" name="MPORTP11" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="12" size="1" name="MPORTP12" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="13" size="1" name="MPORTP13" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="14" size="1" name="MPORTP14" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="15" size="1" name="MPORTP15" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="16" size="1" name="MPORTP16" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="17" size="1" name="MPORTP17" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="18" size="1" name="MPORTP18" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="19" size="1" name="MPORTP19" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="20" size="1" name="MPORTP20" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="21" size="1" name="MPORTP21" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="22" size="1" name="MPORTP22" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="23" size="1" name="MPORTP23" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="24" size="1" name="MPORTP24" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="25" size="1" name="MPORTP25" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="26" size="1" name="MPORTP26" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="27" size="1" name="MPORTP27" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
|
|
<BitField start="28" size="1" name="MPORTP28" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="29" size="1" name="MPORTP29" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="30" size="1" name="MPORTP30" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
<BitField start="31" size="1" name="MPORTP31" description="Masked port register (bit 0 = P0/1_0, bit 1 = P0/1_1, ..., bit 31 = P0/1_31). 0 = Read: pin is LOW and/or the corresponding bit in the MASK register is 1; write: clear output bit if the corresponding bit in the MASK register is 0. 1 = Read: pin is HIGH and the corresponding bit in the MASK register is 0; write: set output bit if the corresponding bit in the MASK register is 0." />
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|
</Register>
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|
<Register start="+0x2200+0" size="4" name="SET0" access="Read/Write" description="Write: Set register for port 0/1 Read: output bits for port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
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|
<BitField start="0" size="1" name="SETP0" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
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<BitField start="1" size="1" name="SETP1" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="2" size="1" name="SETP2" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="3" size="1" name="SETP3" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="4" size="1" name="SETP4" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="5" size="1" name="SETP5" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="6" size="1" name="SETP6" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="7" size="1" name="SETP7" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="8" size="1" name="SETP8" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="9" size="1" name="SETP9" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="10" size="1" name="SETP10" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="11" size="1" name="SETP11" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="12" size="1" name="SETP12" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="13" size="1" name="SETP13" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="14" size="1" name="SETP14" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="15" size="1" name="SETP15" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="16" size="1" name="SETP16" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="17" size="1" name="SETP17" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="18" size="1" name="SETP18" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="19" size="1" name="SETP19" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="20" size="1" name="SETP20" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="21" size="1" name="SETP21" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="22" size="1" name="SETP22" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="23" size="1" name="SETP23" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="24" size="1" name="SETP24" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="25" size="1" name="SETP25" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="26" size="1" name="SETP26" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="27" size="1" name="SETP27" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="28" size="1" name="SETP28" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="29" size="1" name="SETP29" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="30" size="1" name="SETP30" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="31" size="1" name="SETP31" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
</Register>
|
|
<Register start="+0x2200+4" size="4" name="SET1" access="Read/Write" description="Write: Set register for port 0/1 Read: output bits for port 0/1" reset_value="0" reset_mask="0xFFFFFFFF">
|
|
<BitField start="0" size="1" name="SETP0" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="1" size="1" name="SETP1" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="2" size="1" name="SETP2" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="3" size="1" name="SETP3" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="4" size="1" name="SETP4" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="5" size="1" name="SETP5" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="6" size="1" name="SETP6" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="7" size="1" name="SETP7" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="8" size="1" name="SETP8" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="9" size="1" name="SETP9" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="10" size="1" name="SETP10" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="11" size="1" name="SETP11" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="12" size="1" name="SETP12" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="13" size="1" name="SETP13" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="14" size="1" name="SETP14" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="15" size="1" name="SETP15" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="16" size="1" name="SETP16" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="17" size="1" name="SETP17" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="18" size="1" name="SETP18" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="19" size="1" name="SETP19" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="20" size="1" name="SETP20" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="21" size="1" name="SETP21" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="22" size="1" name="SETP22" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="23" size="1" name="SETP23" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="24" size="1" name="SETP24" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="25" size="1" name="SETP25" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="26" size="1" name="SETP26" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="27" size="1" name="SETP27" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="28" size="1" name="SETP28" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="29" size="1" name="SETP29" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="30" size="1" name="SETP30" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
<BitField start="31" size="1" name="SETP31" description="Read or set output bits. 0 = Read: output bit: write: no operation. 1 = Read: output bit; write: set output bit." />
|
|
</Register>
|
|
<Register start="+0x2280+0" size="4" name="CLR0" access="WriteOnly" description="Clear port 0/1" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="CLRP00" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="1" size="1" name="CLRP01" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="2" size="1" name="CLRP02" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="3" size="1" name="CLRP03" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="4" size="1" name="CLRP04" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="5" size="1" name="CLRP05" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="6" size="1" name="CLRP06" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="7" size="1" name="CLRP07" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="8" size="1" name="CLRP08" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="9" size="1" name="CLRP09" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="10" size="1" name="CLRP010" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="11" size="1" name="CLRP011" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="12" size="1" name="CLRP012" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="13" size="1" name="CLRP013" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="14" size="1" name="CLRP014" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="15" size="1" name="CLRP015" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="16" size="1" name="CLRP016" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="17" size="1" name="CLRP017" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="18" size="1" name="CLRP018" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="19" size="1" name="CLRP019" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="20" size="1" name="CLRP020" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="21" size="1" name="CLRP021" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="22" size="1" name="CLRP022" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="23" size="1" name="CLRP023" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="24" size="1" name="CLRP024" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="25" size="1" name="CLRP025" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="26" size="1" name="CLRP026" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="27" size="1" name="CLRP027" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="28" size="1" name="CLRP028" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="29" size="1" name="CLRP029" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="30" size="1" name="CLRP030" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="31" size="1" name="CLRP031" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
</Register>
|
|
<Register start="+0x2280+4" size="4" name="CLR1" access="WriteOnly" description="Clear port 0/1" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="CLRP00" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="1" size="1" name="CLRP01" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="2" size="1" name="CLRP02" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="3" size="1" name="CLRP03" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="4" size="1" name="CLRP04" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="5" size="1" name="CLRP05" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="6" size="1" name="CLRP06" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="7" size="1" name="CLRP07" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="8" size="1" name="CLRP08" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="9" size="1" name="CLRP09" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="10" size="1" name="CLRP010" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="11" size="1" name="CLRP011" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="12" size="1" name="CLRP012" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="13" size="1" name="CLRP013" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="14" size="1" name="CLRP014" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="15" size="1" name="CLRP015" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="16" size="1" name="CLRP016" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="17" size="1" name="CLRP017" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="18" size="1" name="CLRP018" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="19" size="1" name="CLRP019" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="20" size="1" name="CLRP020" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="21" size="1" name="CLRP021" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="22" size="1" name="CLRP022" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="23" size="1" name="CLRP023" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="24" size="1" name="CLRP024" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="25" size="1" name="CLRP025" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="26" size="1" name="CLRP026" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="27" size="1" name="CLRP027" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="28" size="1" name="CLRP028" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="29" size="1" name="CLRP029" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="30" size="1" name="CLRP030" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
<BitField start="31" size="1" name="CLRP031" description="Clear output bits: 0 = No operation. 1 = Clear output bit." />
|
|
</Register>
|
|
<Register start="+0x2300+0" size="4" name="NOT0" access="WriteOnly" description="Toggle port 0/1" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="NOTP0" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="1" size="1" name="NOTP1" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="2" size="1" name="NOTP2" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="3" size="1" name="NOTP3" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="4" size="1" name="NOTP4" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="5" size="1" name="NOTP5" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="6" size="1" name="NOTP6" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="7" size="1" name="NOTP7" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="8" size="1" name="NOTP8" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="9" size="1" name="NOTP9" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="10" size="1" name="NOTP10" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="11" size="1" name="NOTP11" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="12" size="1" name="NOTP12" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="13" size="1" name="NOTP13" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="14" size="1" name="NOTP14" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="15" size="1" name="NOTP15" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="16" size="1" name="NOTP16" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="17" size="1" name="NOTP17" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="18" size="1" name="NOTP18" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="19" size="1" name="NOTP19" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="20" size="1" name="NOTP20" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="21" size="1" name="NOTP21" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="22" size="1" name="NOTP22" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="23" size="1" name="NOTP23" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="24" size="1" name="NOTP24" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="25" size="1" name="NOTP25" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="26" size="1" name="NOTP26" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="27" size="1" name="NOTP27" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="28" size="1" name="NOTP28" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="29" size="1" name="NOTP29" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="30" size="1" name="NOTP30" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="31" size="1" name="NOTP31" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
</Register>
|
|
<Register start="+0x2300+4" size="4" name="NOT1" access="WriteOnly" description="Toggle port 0/1" reset_value="0" reset_mask="0x00000000">
|
|
<BitField start="0" size="1" name="NOTP0" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="1" size="1" name="NOTP1" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="2" size="1" name="NOTP2" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="3" size="1" name="NOTP3" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="4" size="1" name="NOTP4" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="5" size="1" name="NOTP5" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="6" size="1" name="NOTP6" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="7" size="1" name="NOTP7" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="8" size="1" name="NOTP8" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="9" size="1" name="NOTP9" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="10" size="1" name="NOTP10" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="11" size="1" name="NOTP11" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="12" size="1" name="NOTP12" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="13" size="1" name="NOTP13" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="14" size="1" name="NOTP14" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="15" size="1" name="NOTP15" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="16" size="1" name="NOTP16" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="17" size="1" name="NOTP17" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="18" size="1" name="NOTP18" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="19" size="1" name="NOTP19" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="20" size="1" name="NOTP20" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="21" size="1" name="NOTP21" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="22" size="1" name="NOTP22" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="23" size="1" name="NOTP23" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="24" size="1" name="NOTP24" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="25" size="1" name="NOTP25" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="26" size="1" name="NOTP26" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="27" size="1" name="NOTP27" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="28" size="1" name="NOTP28" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="29" size="1" name="NOTP29" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="30" size="1" name="NOTP30" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
<BitField start="31" size="1" name="NOTP31" description="Toggle output bits: 0 = no operation. 1 = Toggle output bit." />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="NVIC" start="0xE000E100" description="Nested Vectored Interrupt Controller">
|
|
<Register name="NVIC_ISER0" description="Interrupt Set-Enable Register 0" start="0xE000E100">
|
|
<BitField name="PIN_INT0" start="0" size="1" />
|
|
<BitField name="PIN_INT1" start="1" size="1" />
|
|
<BitField name="PIN_INT2" start="2" size="1" />
|
|
<BitField name="PIN_INT3" start="3" size="1" />
|
|
<BitField name="PIN_INT4" start="4" size="1" />
|
|
<BitField name="PIN_INT5" start="5" size="1" />
|
|
<BitField name="PIN_INT6" start="6" size="1" />
|
|
<BitField name="PIN_INT7" start="7" size="1" />
|
|
<BitField name="GINT0" start="8" size="1" />
|
|
<BitField name="GINT1" start="9" size="1" />
|
|
<BitField name="RIT" start="12" size="1" />
|
|
<BitField name="SSP1" start="14" size="1" />
|
|
<BitField name="I2C" start="15" size="1" />
|
|
<BitField name="CT16B0" start="16" size="1" />
|
|
<BitField name="CT16B1" start="17" size="1" />
|
|
<BitField name="CT32B0" start="18" size="1" />
|
|
<BitField name="CT32B1" start="19" size="1" />
|
|
<BitField name="SSP0" start="20" size="1" />
|
|
<BitField name="USART" start="21" size="1" />
|
|
<BitField name="USB" start="22" size="1" />
|
|
<BitField name="USB_FIQ" start="23" size="1" />
|
|
<BitField name="ADC" start="24" size="1" />
|
|
<BitField name="WWDT" start="25" size="1" />
|
|
<BitField name="BOD" start="26" size="1" />
|
|
<BitField name="FLASH" start="27" size="1" />
|
|
<BitField name="USBWAKEUP" start="30" size="1" />
|
|
</Register>
|
|
<Register name="NVIC_ICER0" description="Interrupt Clear-Enable Register 0" start="0xE000E180">
|
|
<BitField name="PIN_INT0" start="0" size="1" />
|
|
<BitField name="PIN_INT1" start="1" size="1" />
|
|
<BitField name="PIN_INT2" start="2" size="1" />
|
|
<BitField name="PIN_INT3" start="3" size="1" />
|
|
<BitField name="PIN_INT4" start="4" size="1" />
|
|
<BitField name="PIN_INT5" start="5" size="1" />
|
|
<BitField name="PIN_INT6" start="6" size="1" />
|
|
<BitField name="PIN_INT7" start="7" size="1" />
|
|
<BitField name="GINT0" start="8" size="1" />
|
|
<BitField name="GINT1" start="9" size="1" />
|
|
<BitField name="RIT" start="12" size="1" />
|
|
<BitField name="SSP1" start="14" size="1" />
|
|
<BitField name="I2C" start="15" size="1" />
|
|
<BitField name="CT16B0" start="16" size="1" />
|
|
<BitField name="CT16B1" start="17" size="1" />
|
|
<BitField name="CT32B0" start="18" size="1" />
|
|
<BitField name="CT32B1" start="19" size="1" />
|
|
<BitField name="SSP0" start="20" size="1" />
|
|
<BitField name="USART" start="21" size="1" />
|
|
<BitField name="USB" start="22" size="1" />
|
|
<BitField name="USB_FIQ" start="23" size="1" />
|
|
<BitField name="ADC" start="24" size="1" />
|
|
<BitField name="WWDT" start="25" size="1" />
|
|
<BitField name="BOD" start="26" size="1" />
|
|
<BitField name="FLASH" start="27" size="1" />
|
|
<BitField name="USBWAKEUP" start="30" size="1" />
|
|
</Register>
|
|
<Register name="NVIC_ISPR0" description="Interrupt Set-Pending Register 0" start="0xE000E200">
|
|
<BitField name="PIN_INT0" start="0" size="1" />
|
|
<BitField name="PIN_INT1" start="1" size="1" />
|
|
<BitField name="PIN_INT2" start="2" size="1" />
|
|
<BitField name="PIN_INT3" start="3" size="1" />
|
|
<BitField name="PIN_INT4" start="4" size="1" />
|
|
<BitField name="PIN_INT5" start="5" size="1" />
|
|
<BitField name="PIN_INT6" start="6" size="1" />
|
|
<BitField name="PIN_INT7" start="7" size="1" />
|
|
<BitField name="GINT0" start="8" size="1" />
|
|
<BitField name="GINT1" start="9" size="1" />
|
|
<BitField name="RIT" start="12" size="1" />
|
|
<BitField name="SSP1" start="14" size="1" />
|
|
<BitField name="I2C" start="15" size="1" />
|
|
<BitField name="CT16B0" start="16" size="1" />
|
|
<BitField name="CT16B1" start="17" size="1" />
|
|
<BitField name="CT32B0" start="18" size="1" />
|
|
<BitField name="CT32B1" start="19" size="1" />
|
|
<BitField name="SSP0" start="20" size="1" />
|
|
<BitField name="USART" start="21" size="1" />
|
|
<BitField name="USB" start="22" size="1" />
|
|
<BitField name="USB_FIQ" start="23" size="1" />
|
|
<BitField name="ADC" start="24" size="1" />
|
|
<BitField name="WWDT" start="25" size="1" />
|
|
<BitField name="BOD" start="26" size="1" />
|
|
<BitField name="FLASH" start="27" size="1" />
|
|
<BitField name="USBWAKEUP" start="30" size="1" />
|
|
</Register>
|
|
<Register name="NVIC_ICPR0" description="Interrupt Clear-Pending Register 0" start="0xE000E280">
|
|
<BitField name="PIN_INT0" start="0" size="1" />
|
|
<BitField name="PIN_INT1" start="1" size="1" />
|
|
<BitField name="PIN_INT2" start="2" size="1" />
|
|
<BitField name="PIN_INT3" start="3" size="1" />
|
|
<BitField name="PIN_INT4" start="4" size="1" />
|
|
<BitField name="PIN_INT5" start="5" size="1" />
|
|
<BitField name="PIN_INT6" start="6" size="1" />
|
|
<BitField name="PIN_INT7" start="7" size="1" />
|
|
<BitField name="GINT0" start="8" size="1" />
|
|
<BitField name="GINT1" start="9" size="1" />
|
|
<BitField name="RIT" start="12" size="1" />
|
|
<BitField name="SSP1" start="14" size="1" />
|
|
<BitField name="I2C" start="15" size="1" />
|
|
<BitField name="CT16B0" start="16" size="1" />
|
|
<BitField name="CT16B1" start="17" size="1" />
|
|
<BitField name="CT32B0" start="18" size="1" />
|
|
<BitField name="CT32B1" start="19" size="1" />
|
|
<BitField name="SSP0" start="20" size="1" />
|
|
<BitField name="USART" start="21" size="1" />
|
|
<BitField name="USB" start="22" size="1" />
|
|
<BitField name="USB_FIQ" start="23" size="1" />
|
|
<BitField name="ADC" start="24" size="1" />
|
|
<BitField name="WWDT" start="25" size="1" />
|
|
<BitField name="BOD" start="26" size="1" />
|
|
<BitField name="FLASH" start="27" size="1" />
|
|
<BitField name="USBWAKEUP" start="30" size="1" />
|
|
</Register>
|
|
<Register name="NVIC_IABR0" description="Interrupt Active Bit Register 0" start="0xE000E300" access="ReadOnly">
|
|
<BitField name="PIN_INT0" start="0" size="1" />
|
|
<BitField name="PIN_INT1" start="1" size="1" />
|
|
<BitField name="PIN_INT2" start="2" size="1" />
|
|
<BitField name="PIN_INT3" start="3" size="1" />
|
|
<BitField name="PIN_INT4" start="4" size="1" />
|
|
<BitField name="PIN_INT5" start="5" size="1" />
|
|
<BitField name="PIN_INT6" start="6" size="1" />
|
|
<BitField name="PIN_INT7" start="7" size="1" />
|
|
<BitField name="GINT0" start="8" size="1" />
|
|
<BitField name="GINT1" start="9" size="1" />
|
|
<BitField name="RIT" start="12" size="1" />
|
|
<BitField name="SSP1" start="14" size="1" />
|
|
<BitField name="I2C" start="15" size="1" />
|
|
<BitField name="CT16B0" start="16" size="1" />
|
|
<BitField name="CT16B1" start="17" size="1" />
|
|
<BitField name="CT32B0" start="18" size="1" />
|
|
<BitField name="CT32B1" start="19" size="1" />
|
|
<BitField name="SSP0" start="20" size="1" />
|
|
<BitField name="USART" start="21" size="1" />
|
|
<BitField name="USB" start="22" size="1" />
|
|
<BitField name="USB_FIQ" start="23" size="1" />
|
|
<BitField name="ADC" start="24" size="1" />
|
|
<BitField name="WWDT" start="25" size="1" />
|
|
<BitField name="BOD" start="26" size="1" />
|
|
<BitField name="FLASH" start="27" size="1" />
|
|
<BitField name="USBWAKEUP" start="30" size="1" />
|
|
</Register>
|
|
<Register name="NVIC_IPR0" description="Interrupt Priority Register 0" start="0xE000E400">
|
|
<BitField name="PIN_INT0" start="4" size="4" />
|
|
<BitField name="PIN_INT1" start="12" size="4" />
|
|
<BitField name="PIN_INT2" start="20" size="4" />
|
|
<BitField name="PIN_INT3" start="28" size="4" />
|
|
</Register>
|
|
<Register name="NVIC_IPR1" description="Interrupt Priority Register 1" start="0xE000E404">
|
|
<BitField name="PIN_INT4" start="4" size="4" />
|
|
<BitField name="PIN_INT5" start="12" size="4" />
|
|
<BitField name="PIN_INT6" start="20" size="4" />
|
|
<BitField name="PIN_INT7" start="28" size="4" />
|
|
</Register>
|
|
<Register name="NVIC_IPR2" description="Interrupt Priority Register 2" start="0xE000E408">
|
|
<BitField name="GINT0" start="4" size="4" />
|
|
<BitField name="GINT1" start="12" size="4" />
|
|
</Register>
|
|
<Register name="NVIC_IPR3" description="Interrupt Priority Register 3" start="0xE000E40C">
|
|
<BitField name="RIT" start="4" size="4" />
|
|
<BitField name="SSP1" start="20" size="4" />
|
|
<BitField name="I2C" start="28" size="4" />
|
|
</Register>
|
|
<Register name="NVIC_IPR4" description="Interrupt Priority Register 4" start="0xE000E410">
|
|
<BitField name="CT16B0" start="4" size="4" />
|
|
<BitField name="CT16B1" start="12" size="4" />
|
|
<BitField name="CT32B0" start="20" size="4" />
|
|
<BitField name="CT32B1" start="28" size="4" />
|
|
</Register>
|
|
<Register name="NVIC_IPR5" description="Interrupt Priority Register 5" start="0xE000E414">
|
|
<BitField name="SSP0" start="4" size="4" />
|
|
<BitField name="USART" start="12" size="4" />
|
|
<BitField name="USB" start="20" size="4" />
|
|
<BitField name="USB_FIQ" start="28" size="4" />
|
|
</Register>
|
|
<Register name="NVIC_IPR6" description="Interrupt Priority Register 6" start="0xE000E418">
|
|
<BitField name="ADC" start="4" size="4" />
|
|
<BitField name="WWDT" start="12" size="4" />
|
|
<BitField name="BOD" start="20" size="4" />
|
|
<BitField name="FLASH" start="28" size="4" />
|
|
</Register>
|
|
<Register name="NVIC_IPR7" description="Interrupt Priority Register 7" start="0xE000E41C">
|
|
<BitField name="USBWAKEUP" start="20" size="4" />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="SysTick" start="0xE000E010" description="24-bit System Timer">
|
|
<Register name="SYST_CSR" start="0xE000E010" description="SysTick Control and Status Register">
|
|
<BitField name="COUNTFLAG" start="16" size="1" description="Counter Flag" />
|
|
<BitField name="CLKSOURCE" start="2" size="1" description="Timer Clock Source" />
|
|
<BitField name="TICKINT" start="1" size="1" description="Tick Interrupt Enable" />
|
|
<BitField name="ENABLE" start="0" size="1" description="Enable SysTick Timer" />
|
|
</Register>
|
|
<Register name="SYST_RVR" start="0xE000E014" description="SysTick Reload Value Register">
|
|
<BitField name="RELOAD" start="0" size="24" description="Value to load into the SYST_CVR when the counter is enabled and when it reaches 0" />
|
|
</Register>
|
|
<Register name="SYST_CVR" start="0xE000E018" description="SysTick Current Value Register Register">
|
|
<BitField name="CURRENT" start="0" size="24" description="The current value of the SysTick counter" />
|
|
</Register>
|
|
<Register name="SYST_CALIB" start="0xE000E01C" access="ReadOnly" description="SysTick Calibration Value Register">
|
|
<BitField name="NOREF" start="31" size="1" description="Indicates whether the device provides a reference clock to the processor" />
|
|
<BitField name="SKEW" start="30" size="1" description="Indicates whether the TENMS value is exact" />
|
|
<BitField name="TENMS" start="0" size="24" description="Reload value for 10ms (100Hz) timing, subject to system clock skew errors" />
|
|
</Register>
|
|
</RegisterGroup>
|
|
<RegisterGroup name="SCB" start="" description="System Control Block">
|
|
<Register name="ACTLR" start="0xE000E008" description="Auxiliary Control Register">
|
|
<BitField name="DISFOLD" start="2" size="1" description="When set to 1, disables write buffer use during default memory map accesses" />
|
|
<BitField name="DISDEFWBUF" start="1" size="1" description="When set to 1, disables write buffer use during default memory map accesses" />
|
|
<BitField name="DISMCYCINT" start="0" size="1" description="When set to 1, disables interruption of load multiple and store multiple instructions" />
|
|
</Register>
|
|
<Register name="CPUID" start="0xE000ED00" access="ReadOnly" description="CPUID Register">
|
|
<BitField name="IMPLEMENTER" start="24" size="8" description="Implementer Code" />
|
|
<BitField name="VARIANT" start="20" size="4" description="Variant Number" />
|
|
<BitField name="PARTNO" start="4" size="12" description="Part Number" />
|
|
<BitField name="REVISION" start="0" size="4" description="Revision Number" />
|
|
</Register>
|
|
<Register name="ICSR" start="0xE000ED04" description="Interrupt Control and State Register">
|
|
<BitField name="NMIPENDSET" start="31" size="1" description="NMI set-pending bit" />
|
|
<BitField name="PENDSVSET" start="28" size="1" description="PendSV set-pending bit" />
|
|
<BitField name="PENDSVCLR" start="27" size="1" description="PendSV clear-pending bit" />
|
|
<BitField name="PENDSTSET" start="26" size="1" description="SysTick exception set-pending bit" />
|
|
<BitField name="PENDSTCLR" start="25" size="1" description="SysTick exception clear-pending bit" />
|
|
<BitField name="ISRPREEMPT" start="23" size="1" description="" />
|
|
<BitField name="ISRPENDING" start="22" size="1" description="Interrupt pending flag" />
|
|
<BitField name="VECTPENDING" start="12" size="9" description="Indicates the exception number of the highest priority pending enabled exception" />
|
|
<BitField name="RETTOBASE" start="11" size="1" description="Indicates whether there are preempted active exceptions" />
|
|
<BitField name="VECTACTIVE" start="0" size="9" description="Contains the active exception number" />
|
|
</Register>
|
|
<Register name="VTOR" start="0xE000ED08" description="Vector Table Offset Register">
|
|
<BitField name="TBLOFF" start="7" size="25" description="Vector table base offset field" />
|
|
</Register>
|
|
<Register name="AIRCR" start="0xE000ED0C" description="Application Interrupt and Reset Control Register">
|
|
<BitField name="VECTKEY" start="16" size="16" description="Register key" />
|
|
<BitField name="ENDIANESS" start="15" size="1" description="Data endianness bit" />
|
|
<BitField name="PRIGROUP" start="8" size="3" description="Interrupt priority grouping field" />
|
|
<BitField name="SYSRESETREQ" start="2" size="1" description="System reset request bit" />
|
|
<BitField name="VECTCLRACTIVE" start="1" size="1" description="" />
|
|
<BitField name="VECTRESET" start="0" size="1" description="" />
|
|
</Register>
|
|
<Register name="SCR" start="0xE000ED10" description="System Control Register">
|
|
<BitField name="SEVONPEND" start="4" size="1" description="Send event on pending bit" />
|
|
<BitField name="SLEEPDEEP" start="2" size="1" description="Controls whether the processor uses sleep or deep sleep as its low power mode" />
|
|
<BitField name="SLEEPONEXIT" start="1" size="1" description="Indicates sleep-on-exit when returning from Handler mode to Thread mode" />
|
|
</Register>
|
|
<Register name="CCR" start="0xE000ED14" access="ReadOnly" description="Configuration and Control Register">
|
|
<BitField name="STKALIGN" start="9" size="1" description="Indicates stack alignment on exception entry" />
|
|
<BitField name="BFHFNMIGN" start="8" size="1" description="Enables handlers with priority -1 or-2 to ignore data BusFaults caused by load and store instructions" />
|
|
<BitField name="DIV_0_TRP" start="4" size="1" description="Enables faulting or halting when the processor executes an SDIVor UDIV instruction with a divisor of 0" />
|
|
<BitField name="UNALIGN_TRP" start="3" size="1" description="Enables unaligned access traps" />
|
|
<BitField name="USERSETMPEND" start="1" size="1" description="Enables unprivileged software access to the STIR" />
|
|
<BitField name="NONBASETHRDENA" start="0" size="1" description="Indicates how the processor enters Thread mode" />
|
|
</Register>
|
|
<Register name="SHPR1" start="0xE000ED18" description="System Handler Priority Register 1">
|
|
<BitField name="PRI_6" start="20" size="4" description="Priority of system handler 6 (UsageFault)" />
|
|
<BitField name="PRI_5" start="12" size="4" description="Priority of system handler 5 (BusFault)" />
|
|
<BitField name="PRI_4" start="4" size="4" description="Priority of system handler 4 (MemManage)" />
|
|
</Register>
|
|
<Register name="SHPR2" start="0xE000ED1C" description="System Handler Priority Register 2">
|
|
<BitField name="PRI_11" start="28" size="4" description="Priority of system handler 11 (SVCall)" />
|
|
</Register>
|
|
<Register name="SHPR3" start="0xE000ED20" description="System Handler Priority Register 3">
|
|
<BitField name="PRI_15" start="28" size="4" description="Priority of system handler 15 (SysTick)" />
|
|
<BitField name="PRI_14" start="20" size="4" description="Priority of system handler 14 (PendSV)" />
|
|
</Register>
|
|
<Register name="SHCSR" start="0xE000ED24" description="System Handler Control and State Register">
|
|
<BitField name="USGFAULTENA" start="18" size="1" description="UsageFault enable Bit" />
|
|
<BitField name="BUSFAULTENA" start="17" size="1" description="BusFault Enable Bit" />
|
|
<BitField name="MEMFAULTENA" start="16" size="1" description="MemManage Enable Bit" />
|
|
<BitField name="SVCALLPENDED" start="15" size="1" description="SVCall Pending Bit" />
|
|
<BitField name="BUSFAULTPENDED" start="14" size="1" description="BusFault Exception Pending Bit" />
|
|
<BitField name="MEMFAULTPENDED" start="13" size="1" description="MemManage Exception Pending Bit" />
|
|
<BitField name="USGFAULTPENDED" start="12" size="1" description="UsageFault Exception Pending Bit" />
|
|
<BitField name="SYSTICKACT" start="11" size="1" description="SysTick Exception Active Bit" />
|
|
<BitField name="PENDSVACT" start="10" size="1" description="PendSV Exception Active Bit" />
|
|
<BitField name="MONITORACT" start="8" size="1" description="Debug Monitor Active Bit" />
|
|
<BitField name="SVCALLACT" start="7" size="1" description="SVCall Active Bit" />
|
|
<BitField name="USGFAULTACT" start="3" size="1" description="UsageFault Exception Active Bit" />
|
|
<BitField name="BUSFAULTACT" start="1" size="1" description="BusFault Exception Active Bit" />
|
|
<BitField name="MEMFAULTACT" start="0" size="1" description="MemManage Exception Active Bit" />
|
|
</Register>
|
|
<Register name="MMSR" start="0xE000ED28" size="1" description="MemManage Fault Status Register">
|
|
<BitField name="MMARVALID" start="7" size="1" description="MemManage Fault Address Register(MMFAR) valid flag" />
|
|
<BitField name="MSTKERR" start="4" size="1" description="MemManage fault on stacking for exception entry" />
|
|
<BitField name="MUNSTKERR" start="3" size="1" description="MemManage fault on unstacking for a return from exception" />
|
|
<BitField name="DACCVIOL" start="1" size="1" description="Data access violation flag" />
|
|
<BitField name="IACCVIOL" start="0" size="1" description="Instruction access violation flag" />
|
|
</Register>
|
|
<Register name="BFSR" start="0xE000ED29" size="1" description="BusFault Status Register">
|
|
<BitField name="BFARVALID" start="7" size="1" description="BusFault Address Register(BFAR) valid flag" />
|
|
<BitField name="STKERR" start="4" size="1" description="BusFault on stacking for exception entry" />
|
|
<BitField name="UNSTKERR" start="3" size="1" description="BusFault on unstacking for a return from exception" />
|
|
<BitField name="IMPRECISERR" start="2" size="1" description="Imprecise data bus error" />
|
|
<BitField name="PRECISERR" start="1" size="1" description="Precise data bus error" />
|
|
<BitField name="IBUSERR" start="0" size="1" description="Instruction bus error" />
|
|
</Register>
|
|
<Register name="UFSR" start="0xE000ED2A" size="2" description="UsageFault Status Register">
|
|
<BitField name="DIVBYZERO" start="9" size="1" description="Divide by zero UsageFault" />
|
|
<BitField name="UNALIGNED" start="8" size="1" description="Unaligned access UsageFault" />
|
|
<BitField name="NOCP" start="3" size="1" description="No coprocessor UsageFault" />
|
|
<BitField name="INVPC" start="2" size="1" description="Invalid PC load UsageFault, causedby an invalid PC load by EXC_RETURN" />
|
|
<BitField name="INVSTATE" start="1" size="1" description="Invalid state UsageFault" />
|
|
<BitField name="UNDEFINSTR" start="0" size="1" description="Undefined instruction UsageFault" />
|
|
</Register>
|
|
<Register name="HFSR" start="0xE000ED2C" description="HardFault Status Register">
|
|
<BitField name="DEBUGEVT" start="31" size="1" description="" />
|
|
<BitField name="FORCED" start="30" size="1" description="Indicates a forced hard fault, generated by escalation of a fault with configurable priority that cannot be handled, either because of priority or because it is disabled" />
|
|
<BitField name="VECTTBL" start="1" size="1" description="Indicates a BusFault on a vectortable read during exception processing" />
|
|
</Register>
|
|
<Register name="DFSR" start="0xE000ED30" description="Debug Fault Status Register">
|
|
<BitField name="EXTERNAL" start="4" size="1" description="" />
|
|
<BitField name="VCATCH" start="3" size="1" description="" />
|
|
<BitField name="DWTTRAP" start="2" size="1" description="" />
|
|
<BitField name="BKPT" start="1" size="1" description="" />
|
|
<BitField name="HALTED" start="0" size="1" description="" />
|
|
</Register>
|
|
<Register name="MMAR" start="0xE000ED34" description="MemManage Fault Address Register">
|
|
<BitField name="ADDRESS" start="0" size="32" description="When the MMARVALID bit of the MMFSR is set to 1, this field holds the address of the location that generated the MemManage fault" />
|
|
</Register>
|
|
<Register name="BFAR" start="0xE000ED38" description="BusFault Address Register">
|
|
<BitField name="ADDRESS" start="0" size="32" description="When the BFARVALID bit of the BFSR is set to1, this field holds the address of the location that generated the BusFault" />
|
|
</Register>
|
|
<Register name="AFSR" start="0xE000ED3C" description="Auxiliary Fault Status Register">
|
|
<BitField name="IMPDEF" start="0" size="32" description="Implementation defined, the bits map to the AUXFAULT input signals" />
|
|
</Register>
|
|
</RegisterGroup>
|
|
</Processor>
|