547 lines
15 KiB
C
547 lines
15 KiB
C
/*****************************************************************************
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*
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* Copyright(C) 2011, Embedded Artists AB
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* All rights reserved.
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*
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******************************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* Embedded Artists AB assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. Embedded Artists AB
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* reserves the right to make changes in the software without
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* notification. Embedded Artists AB also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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*****************************************************************************/
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/******************************************************************************
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* Includes
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*****************************************************************************/
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#include "../../board.h"
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#if BOARD == BOARD_EA4357
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#include "lpc_types.h"
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#include "lpc43xx_scu.h"
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#include "lpc43xx_timer.h"
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#include "nand.h"
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/******************************************************************************
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* Defines and typedefs
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*****************************************************************************/
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#define K9F1G_CLE ((volatile uint8_t *)0x1D100000)
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#define K9F1G_ALE ((volatile uint8_t *)0x1D080000)
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#define K9F1G_DATA ((volatile uint8_t *)0x1D000000)
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#define K9FXX_WAIT()
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#define K9FXX_READ_1 0x00
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#define K9FXX_READ_2 0x30
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#define K9FXX_SET_ADDR_A 0x00
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#define K9FXX_SET_ADDR_B 0x01
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#define K9FXX_SET_ADDR_C 0x50
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#define K9FXX_READ_ID 0x90
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#define K9FXX_RESET 0xff
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#define K9FXX_BLOCK_PROGRAM_1 0x80
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#define K9FXX_BLOCK_PROGRAM_2 0x10
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#define K9FXX_BLOCK_ERASE_1 0x60
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#define K9FXX_BLOCK_ERASE_2 0xd0
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#define K9FXX_READ_STATUS 0x70
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#define K9FXX_BUSY (1 << 6)
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#define K9FXX_OK (1 << 0)
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#define ID_MARKER_CODE (0xEC)
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#define ID_SAMSUNG (0xF1)
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#define ID_PAGE_SZ_1KB (0x00)
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#define ID_PAGE_SZ_2KB (0x01)
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#define ID_PAGE_SZ_4KB (0x02)
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#define ID_PAGE_SZ_8KB (0x03)
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#define ID_BLOCK_SZ_64KB (0x00)
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#define ID_BLOCK_SZ_128KB (0x01)
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#define ID_BLOCK_SZ_256KB (0x02)
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#define ID_BLOCK_SZ_512KB (0x03)
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#define ID_PAGE_SZ_1KB (0x00)
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#define ID_PAGE_SZ_2KB (0x01)
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#define ID_PAGE_SZ_4KB (0x02)
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#define ID_PAGE_SZ_8KB (0x03)
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#define ID_REDUND_SZ_8 (0x00)
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#define ID_REDUND_SZ_16 (0x01)
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/* This macro could be changed to check the ready pin */
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#define WAIT_READY() (TIM_Waitus(25))
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/******************************************************************************
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* External global variables
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*****************************************************************************/
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/******************************************************************************
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* Local variables
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*****************************************************************************/
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static uint32_t pageSize = 0;
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static uint32_t blockSize = 0;
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static uint32_t reduntSize = 0;
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/******************************************************************************
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* Local Functions
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*****************************************************************************/
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static void pinConfig(void)
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{
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/* Set up EMC pin */
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scu_pinmux( 2 , 9 , MD_PLN_FAST , 3 );//A0
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scu_pinmux( 2 , 10 , MD_PLN_FAST , 3 );//A1
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scu_pinmux( 2 , 11 , MD_PLN_FAST , 3 );//A2
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scu_pinmux( 2 , 12 , MD_PLN_FAST , 3 );//A3
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scu_pinmux( 2 , 13 , MD_PLN_FAST , 3 );//A4
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scu_pinmux( 1 , 0 , MD_PLN_FAST , 2 );//A5
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scu_pinmux( 1 , 1 , MD_PLN_FAST , 2 );//A6
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scu_pinmux( 1 , 2 , MD_PLN_FAST , 2 );//A7
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scu_pinmux( 2 , 8 , MD_PLN_FAST , 3 );//A8
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scu_pinmux( 2 , 7 , MD_PLN_FAST , 3 );//A9
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scu_pinmux( 2 , 6 , MD_PLN_FAST , 2 );//A10
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scu_pinmux( 2 , 2 , MD_PLN_FAST , 2 );//A11
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scu_pinmux( 2 , 1 , MD_PLN_FAST , 2 );//A12
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scu_pinmux( 2 , 0 , MD_PLN_FAST , 2 );//A13
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scu_pinmux( 6 , 8 , MD_PLN_FAST , 1 );//A14
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scu_pinmux( 6 , 7 , MD_PLN_FAST , 1 );//A15
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scu_pinmux( 13 , 16 , MD_PLN_FAST , 2 );//A16
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scu_pinmux( 13 , 15 , MD_PLN_FAST , 2 );//A17
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scu_pinmux( 14 , 0 , MD_PLN_FAST , 3 );//A18
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scu_pinmux( 14 , 1 , MD_PLN_FAST , 3 );//A19
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scu_pinmux( 14 , 2 , MD_PLN_FAST , 3 );//A20
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scu_pinmux( 14 , 3 , MD_PLN_FAST , 3 );//A21
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scu_pinmux( 14 , 4 , MD_PLN_FAST , 3 );//A22
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scu_pinmux( 10 , 4 , MD_PLN_FAST , 3 );//A23
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scu_pinmux( 1 , 7 , MD_PLN_FAST , 3 );//D0
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scu_pinmux( 1 , 8 , MD_PLN_FAST , 3 );//D1
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scu_pinmux( 1 , 9 , MD_PLN_FAST , 3 );//D2
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scu_pinmux( 1 , 10 , MD_PLN_FAST , 3 );//D3
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scu_pinmux( 1 , 11 , MD_PLN_FAST , 3 );//D4
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scu_pinmux( 1 , 12 , MD_PLN_FAST , 3 );//D5
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scu_pinmux( 1 , 13 , MD_PLN_FAST , 3 );//D6
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scu_pinmux( 1 , 14 , MD_PLN_FAST , 3 );//D7
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scu_pinmux( 5 , 4 , MD_PLN_FAST , 2 );//D8
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scu_pinmux( 5 , 5 , MD_PLN_FAST , 2 );//D9
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scu_pinmux( 5 , 6 , MD_PLN_FAST , 2 );//D10
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scu_pinmux( 5 , 7 , MD_PLN_FAST , 2 );//D11
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scu_pinmux( 5 , 0 , MD_PLN_FAST , 2 );//D12
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scu_pinmux( 5 , 1 , MD_PLN_FAST , 2 );//D13
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scu_pinmux( 5 , 2 , MD_PLN_FAST , 2 );//D14
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scu_pinmux( 5 , 3 , MD_PLN_FAST , 2 );//D15
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scu_pinmux( 13 , 2 , MD_PLN_FAST , 2 );//D16
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scu_pinmux( 13 , 3 , MD_PLN_FAST , 2 );//D17
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scu_pinmux( 13 , 4 , MD_PLN_FAST , 2 );//D18
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scu_pinmux( 13 , 5 , MD_PLN_FAST , 2 );//D19
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scu_pinmux( 13 , 6 , MD_PLN_FAST , 2 );//D20
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scu_pinmux( 13 , 7 , MD_PLN_FAST , 2 );//D21
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scu_pinmux( 13 , 8 , MD_PLN_FAST , 2 );//D22
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scu_pinmux( 13 , 9 , MD_PLN_FAST , 2 );//D23
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scu_pinmux( 14 , 5 , MD_PLN_FAST , 3 );//D24
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scu_pinmux( 14 , 6 , MD_PLN_FAST , 3 );//D25
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scu_pinmux( 14 , 7 , MD_PLN_FAST , 3 );//D26
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scu_pinmux( 14 , 8 , MD_PLN_FAST , 3 );//D27
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scu_pinmux( 14 , 9 , MD_PLN_FAST , 3 );//D28
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scu_pinmux( 14 , 10 , MD_PLN_FAST , 3 );//D29
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scu_pinmux( 14 , 11 , MD_PLN_FAST , 3 );//D30
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scu_pinmux( 14 , 12 , MD_PLN_FAST , 3 );//D31
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scu_pinmux( 1 , 3 , MD_PLN_FAST , 3 );//OE
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scu_pinmux( 1 , 6 , MD_PLN_FAST , 3 );//WE
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scu_pinmux( 1 , 4 , MD_PLN_FAST , 3 );//BLS0
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scu_pinmux( 6 , 6 , MD_PLN_FAST , 1 );//BLS1
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scu_pinmux( 13 , 13 , MD_PLN_FAST , 2 );//BLS2
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scu_pinmux( 13 , 10 , MD_PLN_FAST , 2 );//BLS3
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scu_pinmux( 1 , 5 , MD_PLN_FAST , 3 );//CS0
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scu_pinmux( 6 , 3 , MD_PLN_FAST , 3 );//CS1
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scu_pinmux( 13 , 12 , MD_PLN_FAST , 2 );//CS2
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scu_pinmux( 13 , 11 , MD_PLN_FAST , 2 );//CS3
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}
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static uint32_t nandReadId(void)
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{
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uint8_t a, b, c, d;
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volatile uint8_t *pCLE;
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volatile uint8_t *pALE;
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volatile uint8_t *pData;
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pCLE = K9F1G_CLE;
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pALE = K9F1G_ALE;
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pData = K9F1G_DATA;
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*pCLE = K9FXX_READ_ID;
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*pALE = 0;
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a = *pData;
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b = *pData;
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c = *pData;
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d = *pData;
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return (a << 24) | (b << 16) | (c << 8) | d;
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}
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static uint8_t nandStatus(void)
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{
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uint8_t status = 0;
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volatile uint8_t *pCLE;
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volatile uint8_t *pALE;
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volatile uint8_t *pData;
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pCLE = K9F1G_CLE;
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pALE = K9F1G_ALE;
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pData = K9F1G_DATA;
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*pCLE = K9FXX_READ_STATUS;
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*pALE = 0;
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status = *pData;
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/* remove bits not used */
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return (status & 0xC1);
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}
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static void nandWaitReady(void)
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{
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while( !(nandStatus() & (1<<6)) );
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}
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/******************************************************************************
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* Public Functions
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*****************************************************************************/
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/******************************************************************************
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*
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* Description:
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* Initialize the NAND Flash
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*
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* Returns:
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* TRUE if initialization successful; otherwise FALSE
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*
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*****************************************************************************/
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uint32_t nand_init (void)
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{
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uint32_t nandId = 0;
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TIM_TIMERCFG_Type timerCfg;
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// LPC_SC->PCONP |= 0x00000800;
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LPC_EMC->CONTROL = 0x00000001;
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LPC_EMC->CONFIG = 0x00000000;
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pinConfig();
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TIM_ConfigStructInit(TIM_TIMER_MODE, &timerCfg);
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TIM_Init(LPC_TIMER0, TIM_TIMER_MODE, &timerCfg);
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LPC_EMC->STATICCONFIG1 = 0x00000080;
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LPC_EMC->STATICWAITWEN1 = 0x00000002;
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LPC_EMC->STATICWAITOEN1 = 0x00000002;
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LPC_EMC->STATICWAITRD1 = 0x00000008;
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LPC_EMC->STATICWAITPAG1 = 0x0000001f;
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LPC_EMC->STATICWAITWR1 = 0x00000008;
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LPC_EMC->STATICWAITTURN1 = 0x0000000f;
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nandId = nandReadId();
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if ((nandId & 0xffff0000) !=
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(((uint32_t)(ID_MARKER_CODE) << 24) | ID_SAMSUNG << 16)) {
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/* unknown NAND chip */
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return FALSE;
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}
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pageSize = 1024 * (1 << (nandId & 0x03));
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blockSize = 64*1024 * (1 << ((nandId>>4) & 0x03));
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reduntSize = 8 * (1 << ((nandId >> 1) & 0x1));
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return TRUE;
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}
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/******************************************************************************
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*
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* Description:
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* Get the page size of the NAND flash
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*
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* Returns:
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* page size in bytes
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*
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*****************************************************************************/
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uint32_t nand_getPageSize(void)
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{
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return pageSize;
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}
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/******************************************************************************
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*
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* Description:
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* Get the block size of the NAND flash
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*
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* Returns:
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* block size in bytes
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*
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*****************************************************************************/
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uint32_t nand_getBlockSize(void)
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{
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return blockSize;
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}
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/******************************************************************************
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*
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* Description:
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* Get the redundant (spare) size per page
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*
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* Returns:
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* redundant/spare size in bytes
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*
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*****************************************************************************/
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uint32_t nand_getRedundantSize(void)
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{
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return reduntSize * (pageSize/512);
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}
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/******************************************************************************
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*
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* Description:
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* Check if a block is valid
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*
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* Returns:
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* TRUE if the block is valid; otherwise FALSE
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*
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*****************************************************************************/
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uint32_t nand_isBlockValid(uint32_t block)
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{
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uint32_t addr = 0;
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uint32_t page = 0;
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volatile uint8_t *pCLE;
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volatile uint8_t *pALE;
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volatile uint8_t *pData;
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pCLE = K9F1G_CLE;
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pALE = K9F1G_ALE;
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pData = K9F1G_DATA;
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if (block >= NAND_NUM_BLOCKS) {
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return FALSE;
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}
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addr = block * (blockSize/pageSize);
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/*
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* Check page 0 and page 1 in each block. If the first byte
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* in the spare area (of either page 0 or page 1) is != 0xFF
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* the block is invalid.
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*/
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nandWaitReady();
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for (page = 0; page < 2; page++) {
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addr += page;
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*pCLE = K9FXX_READ_1;
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*pALE = (uint8_t) (pageSize & 0x00FF);
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*pALE = (uint8_t)((pageSize & 0xFF00) >> 8);
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*pALE = (uint8_t)((addr & 0x00FF));
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*pALE = (uint8_t)((addr & 0xFF00) >> 8);
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*pCLE = K9FXX_READ_2;
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WAIT_READY();
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if (*pData != 0xFF) {
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return FALSE;
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}
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}
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return TRUE;
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}
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/******************************************************************************
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*
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* Description:
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* Read a page from the NAND memory
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*
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* Params:
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* block - block number to read from
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* page - page with<74>n block to read from
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* pageBuf - data is copied to this buffer. The size must be at least
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* pageSize.
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*
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* Returns:
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* TRUE if read successful; otherwise FALSE
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*
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*****************************************************************************/
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uint32_t nand_readPage(uint32_t block, uint32_t page, uint8_t* pageBuf)
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{
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uint32_t i = 0;
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uint32_t addr = 0;
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volatile uint8_t *pCLE;
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volatile uint8_t *pALE;
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volatile uint8_t *pData;
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pCLE = K9F1G_CLE;
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pALE = K9F1G_ALE;
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pData = K9F1G_DATA;
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if (block >= NAND_NUM_BLOCKS) {
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return FALSE;
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}
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if (page >= blockSize/pageSize) {
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return FALSE;
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}
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addr = block * (blockSize/pageSize) + page;
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/*
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* Always reading from start of a page address.
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* This means that the column address is always 0.
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*/
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*pCLE = K9FXX_READ_1;
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*pALE = 0;
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*pALE = 0;
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*pALE = (uint8_t)((addr & 0x00FF));
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*pALE = (uint8_t)((addr & 0xFF00) >> 8);
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*pCLE = K9FXX_READ_2;
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WAIT_READY();
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for (i = 0; i < pageSize; i++) {
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*pageBuf++ = *pData;
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}
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return TRUE;
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}
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/******************************************************************************
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*
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* Description:
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* Write a page of data to the NAND memory
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*
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* Params:
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* block - block number to write to
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* page - page within block to write to
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* pageBuf - data is copied from this buffer. The size must be at least
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* pageSize.
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*
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* Returns:
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* TRUE if write successful; otherwise FALSE
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*
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*****************************************************************************/
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uint32_t nand_writePage(uint32_t block, uint32_t page, uint8_t* pageBuf)
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{
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uint32_t i = 0;
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uint32_t addr = 0;
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volatile uint8_t *pCLE;
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volatile uint8_t *pALE;
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volatile uint8_t *pData;
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pCLE = K9F1G_CLE;
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pALE = K9F1G_ALE;
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pData = K9F1G_DATA;
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if (block >= NAND_NUM_BLOCKS) {
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return FALSE;
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}
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if (page >= blockSize/pageSize) {
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return FALSE;
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}
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addr = block * (blockSize/pageSize) + page;
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/*
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* Always writing to start of a page address.
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* This means that the column address is always 0.
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*/
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*pCLE = K9FXX_BLOCK_PROGRAM_1;
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*pALE = 0;
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*pALE = 0;
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*pALE = (uint8_t)((addr & 0x00FF));
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*pALE = (uint8_t)((addr & 0xFF00) >> 8);
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for (i = 0; i < pageSize; i++) {
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*pData = *pageBuf++;
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}
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*pCLE = K9FXX_BLOCK_PROGRAM_2;
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TIM_Waitus(700);
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nandWaitReady();
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return ((nandStatus() & 0x01) != 0x01);
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}
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/******************************************************************************
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*
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* Description:
|
||
* Erase a block
|
||
*
|
||
* Params:
|
||
* block - block number to erase
|
||
*
|
||
* Returns:
|
||
* TRUE if eras successful; otherwise FALSE
|
||
*
|
||
*****************************************************************************/
|
||
uint32_t nand_eraseBlock(uint32_t block)
|
||
{
|
||
uint32_t addr = 0;
|
||
|
||
volatile uint8_t *pCLE;
|
||
volatile uint8_t *pALE;
|
||
|
||
pCLE = K9F1G_CLE;
|
||
pALE = K9F1G_ALE;
|
||
|
||
if (block >= NAND_NUM_BLOCKS) {
|
||
return FALSE;
|
||
}
|
||
|
||
addr = block * (blockSize/pageSize);
|
||
|
||
*pCLE = K9FXX_BLOCK_ERASE_1;
|
||
*pALE = (uint8_t)(addr & 0x00FF);
|
||
*pALE = (uint8_t)((addr & 0xFF00) >> 8);
|
||
*pCLE = K9FXX_BLOCK_ERASE_2;
|
||
|
||
TIM_Waitus(700);
|
||
nandWaitReady();
|
||
|
||
return ((nandStatus() & 0x01) != 0x01);
|
||
}
|
||
|
||
#endif
|