135 lines
4.0 KiB
C
135 lines
4.0 KiB
C
/*
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* @brief LPC18xx_43xx ROM API declarations and functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __ROMAPI_18XX_43XX_H_
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#define __ROMAPI_18XX_43XX_H_
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#include "iap_18xx_43xx.h"
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#include "error.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup ROMAPI_18XX_43XX CHIP: LPC18xx_43xx ROM API declarations and functions
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* @ingroup CHIP_18XX_43XX_Drivers
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* @{
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*/
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/**
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* @brief LPC18XX_43XX OTP API structure
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*/
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typedef struct {
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uint32_t (*Init)(void); /*!< Initializes OTP controller. */
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uint32_t (*ProgBootSrc)(CHIP_OTP_BOOT_SRC_T BootSrc);
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uint32_t (*ProgJTAGDis)(void);
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uint32_t (*ProgUSBID)(uint32_t ProductID, uint32_t VendorID);
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uint32_t reserved01;
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uint32_t reserved02;
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uint32_t reserved03;
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uint32_t reserved04;
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uint32_t (*ProgGP0)(uint32_t data, uint32_t mask);
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uint32_t (*ProgGP1)(uint32_t data, uint32_t mask);
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uint32_t (*ProgGP2)(uint32_t data, uint32_t mask);
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uint32_t (*ProgKey1)(uint8_t *key);
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uint32_t (*ProgKey2)(uint8_t *key);
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uint32_t (*GenRand)(void);
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} OTP_API_T;
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/**
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* @brief LPC18XX_43XX AES API structure
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*/
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typedef struct {
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uint32_t (*Init)(void);
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uint32_t (*SetMode)(uint32_t mode);
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uint32_t (*LoadKey1)(void);
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uint32_t (*LoadKey2)(void);
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uint32_t (*LoadKeyRNG)(void);
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uint32_t (*LoadKeySW)(uint8_t *pKey);
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uint32_t (*LoadIV_SW)(uint8_t *pVector);
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uint32_t (*LoadIV_IC)(void);
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uint32_t (*Operate)(uint8_t *pOutput, uint8_t *pInput, uint32_t size);
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uint32_t (*ProgramKey1)(uint8_t *pKey);
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uint32_t (*ProgramKey2)(uint8_t *pKey);
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} AES_API_T;
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/**
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* @brief LPC18XX High level ROM API structure
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*/
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typedef struct {
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void(*const iap_entry) (uint32_t *, uint32_t *); /*!< IAP API entry function available on Flash parts only*/
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const OTP_API_T *pOtp;
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const AES_API_T *pAes;
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uint32_t reserved[3];
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const uint32_t spifiApiBase; /*!< SPIFI API function table base address*/
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const uint32_t usbdApiBase; /*!< USBD API function table base address*/
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const uint32_t endMarker; /*!< API table end marker = 0x87654321 */
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} LPC_ROM_API_T;
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/* Pointer to ROM API function address */
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#define LPC_ROM_API_BASE_LOC 0x10400100
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#define LPC_ROM_API ((LPC_ROM_API_T *) LPC_ROM_API_BASE)
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/* Pointer to ROM IAP entry functions */
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#define IAP_ENTRY_LOCATION (*((uint32_t *) 0x10400100))
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/**
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* @brief IAP flash bank definitions
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*/
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#define IAP_FLASH_BANK_A 0
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#define IAP_FLASH_BANK_B 1
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/**
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* @}
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*/
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static INLINE void iap_entry(unsigned int cmd_param[], unsigned int status_result[])
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{
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((IAP_ENTRY_T) IAP_ENTRY_LOCATION)(cmd_param, status_result);
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}
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ROMAPI_18XX_43XX_H_ */
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