106 lines
3.2 KiB
C
106 lines
3.2 KiB
C
/*
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* @brief LPC18xx/43xx Power Management Controller driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __PMC_18XX_43XX_H_
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#define __PMC_18XX_43XX_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup PMC_18XX_43XX CHIP: LPC18xx/43xx Power Management Controller driver
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* @ingroup CHIP_18XX_43XX_Drivers
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* @{
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*/
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/**
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* @brief Power Management Controller register block structure
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*/
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typedef struct { /*!< PMC Structure */
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__IO uint32_t PD0_SLEEP0_HW_ENA; /*!< Hardware sleep event enable register */
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__I uint32_t RESERVED0[6];
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__IO uint32_t PD0_SLEEP0_MODE; /*!< Sleep power mode register */
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} LPC_PMC_T;
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/**
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* @brief Power Management Controller power modes
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* Setting this mode will not make IO loose the state
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*/
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#define PMC_PWR_DEEP_SLEEP_MODE 0x3000AA
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#define PMC_PWR_POWER_DOWN_MODE 0x30FCBA
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#define PMC_PWR_DEEP_POWER_DOWN_MODE 0x30FF7F
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/**
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* @brief Power Management Controller power modes (IO powerdown)
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* Setting this mode will make the IO loose the state
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*/
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#define PMC_PWR_DEEP_SLEEP_MODE_NO_IO 0x3F00AA
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#define PMC_PWR_POWER_DOWN_MODE_NO_IO 0x3FFCBA
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#define PMC_PWR_DEEP_POWER_DOWN_MODE_NO_IO 0x3FFF7F
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/*
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* @brief PMC power states
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*/
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typedef enum {
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PMC_DeepSleep = PMC_PWR_DEEP_SLEEP_MODE, /*!< Deep sleep state */
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PMC_PowerDown = PMC_PWR_POWER_DOWN_MODE, /*!< Power Down state */
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PMC_DeepPowerDown = PMC_PWR_DEEP_POWER_DOWN_MODE, /*!< Power Down state */
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} CHIP_PMC_PWR_STATE_T;
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/**
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* @brief Set to sleep power state
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* @return Nothing
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*/
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void Chip_PMC_Sleep(void);
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/**
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* @brief Set to sleep power mode
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* @param PwrState : Power State as specified in /a CHIP_PMC_PWR_STATE_T enum
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* @return Nothing
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*/
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void Chip_PMC_Set_PwrState(CHIP_PMC_PWR_STATE_T PwrState);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __PMC_18XX_43XX_H_ */
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