151 lines
5.1 KiB
C
151 lines
5.1 KiB
C
/*
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* @brief LPC18xx/43xx OTP Controller driver
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2012
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#ifndef __OTP_18XX_43XX_H_
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#define __OTP_18XX_43XX_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @defgroup OTP_18XX_43XX CHIP: LPC18xx/43xx OTP Controller driver
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* @ingroup CHIP_18XX_43XX_Drivers
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* @{
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*/
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/**
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* @brief OTP Register block
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*/
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typedef struct {
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__IO uint32_t OTP0_0; /*!< (@ 0x40045000) OTP content */
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__IO uint32_t OTP0_1; /*!< (@ 0x40045004) OTP content */
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__IO uint32_t OTP0_2; /*!< (@ 0x40045008) OTP content */
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__IO uint32_t OTP0_3; /*!< (@ 0x4004500C) OTP content */
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__IO uint32_t OTP1_0; /*!< (@ 0x40045010) OTP content */
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__IO uint32_t OTP1_1; /*!< (@ 0x40045014) OTP content */
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__IO uint32_t OTP1_2; /*!< (@ 0x40045018) OTP content */
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__IO uint32_t OTP1_3; /*!< (@ 0x4004501C) OTP content */
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__IO uint32_t OTP2_0; /*!< (@ 0x40045020) OTP content */
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__IO uint32_t OTP2_1; /*!< (@ 0x40045024) OTP content */
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__IO uint32_t OTP2_2; /*!< (@ 0x40045028) OTP content */
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__IO uint32_t OTP2_3; /*!< (@ 0x4004502C) OTP content */
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__IO uint32_t OTP3_0; /*!< (@ 0x40045030) OTP content */
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__IO uint32_t OTP3_1; /*!< (@ 0x40045034) OTP content */
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__IO uint32_t OTP3_2; /*!< (@ 0x40045038) OTP content */
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__IO uint32_t OTP3_3; /*!< (@ 0x4004503C) OTP content */
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} LPC_OTP_T;
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/**
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* @brief OTP Boot Source selection used in Chip driver
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*/
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typedef enum CHIP_OTP_BOOT_SRC {
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CHIP_OTP_BOOTSRC_PINS, /*!< Boot source - External pins */
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CHIP_OTP_BOOTSRC_UART0, /*!< Boot source - UART0 */
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CHIP_OTP_BOOTSRC_SPIFI, /*!< Boot source - EMC 8-bit memory */
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CHIP_OTP_BOOTSRC_EMC8, /*!< Boot source - EMC 16-bit memory */
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CHIP_OTP_BOOTSRC_EMC16, /*!< Boot source - EMC 32-bit memory */
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CHIP_OTP_BOOTSRC_EMC32, /*!< Boot source - EMC 32-bit memory */
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CHIP_OTP_BOOTSRC_USB0, /*!< Boot source - DFU USB0 boot */
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CHIP_OTP_BOOTSRC_USB1, /*!< Boot source - DFU USB1 boot */
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CHIP_OTP_BOOTSRC_SPI, /*!< Boot source - SPI boot */
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CHIP_OTP_BOOTSRC_UART3 /*!< Boot source - UART3 */
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} CHIP_OTP_BOOT_SRC_T;
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/**
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* @brief Initialize for OTP Controller functions
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* @return Status of Otp_Init function
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* This function will initialise all the OTP driver function pointers
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* and call the ROM OTP Initialisation function.
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*/
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uint32_t Chip_OTP_Init(void);
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/**
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* @brief Program boot source in OTP Controller
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* @param BootSrc : Boot Source enum value
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* @return Status
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*/
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uint32_t Chip_OTP_ProgBootSrc(CHIP_OTP_BOOT_SRC_T BootSrc);
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/**
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* @brief Program the JTAG bit in OTP Controller
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* @return Status
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*/
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uint32_t Chip_OTP_ProgJTAGDis(void);
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/**
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* @brief Program USB ID in OTP Controller
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* @param ProductID : USB Product ID
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* @param VendorID : USB Vendor ID
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* @return Status
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*/
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uint32_t Chip_OTP_ProgUSBID(uint32_t ProductID, uint32_t VendorID);
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/**
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* @brief Program OTP GP Word memory
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* @param WordNum : Word Number (Select word 0 or word 1 or word 2)
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* @param Data : Data value
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* @param Mask : Mask value
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* @return Status
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* This function available in devices which are not AES capable
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*/
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uint32_t Chip_OTP_ProgGPWord(uint32_t WordNum, uint32_t Data, uint32_t Mask);
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/**
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* @brief Program AES Key
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* @param KeyNum : Key Number (Select 0 or 1)
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* @param key : Pointer to AES Key (16 bytes required)
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* @return Status
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* This function available in devices which are AES capable
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*/
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uint32_t Chip_OTP_ProgKey(uint32_t KeyNum, uint8_t *key);
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/**
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* @brief Generate Random Number using HW Random Number Generator
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* @return Error code of the random number generation. To load the random number into AES, call Chip_AES_LoadKeyRNG
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*/
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uint32_t Chip_OTP_GenRand(void);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __OTP_18XX_43XX_H_ */
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