436 lines
14 KiB
C
436 lines
14 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2018 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#include "tusb_option.h"
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#if TUSB_OPT_DEVICE_ENABLED && (CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAMD21)
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#include "sam.h"
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#include "device/dcd.h"
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/*------------------------------------------------------------------*/
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/* MACRO TYPEDEF CONSTANT ENUM
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*------------------------------------------------------------------*/
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static TU_ATTR_ALIGNED(4) UsbDeviceDescBank sram_registers[8][2];
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static TU_ATTR_ALIGNED(4) uint8_t _setup_packet[8];
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// ready for receiving SETUP packet
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static inline void prepare_setup(void)
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{
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// Only make sure the EP0 OUT buffer is ready
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sram_registers[0][0].ADDR.reg = (uint32_t) _setup_packet;
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sram_registers[0][0].PCKSIZE.bit.MULTI_PACKET_SIZE = sizeof(_setup_packet);
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sram_registers[0][0].PCKSIZE.bit.BYTE_COUNT = 0;
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}
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// Setup the control endpoint 0.
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static void bus_reset(void)
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{
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// Max size of packets is 64 bytes.
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UsbDeviceDescBank* bank_out = &sram_registers[0][TUSB_DIR_OUT];
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bank_out->PCKSIZE.bit.SIZE = 0x3;
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UsbDeviceDescBank* bank_in = &sram_registers[0][TUSB_DIR_IN];
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bank_in->PCKSIZE.bit.SIZE = 0x3;
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UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[0];
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ep->EPCFG.reg = USB_DEVICE_EPCFG_EPTYPE0(0x1) | USB_DEVICE_EPCFG_EPTYPE1(0x1);
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ep->EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0 | USB_DEVICE_EPINTENSET_TRCPT1 | USB_DEVICE_EPINTENSET_RXSTP;
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// Prepare for setup packet
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prepare_setup();
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}
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/*------------------------------------------------------------------*/
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/* Controller API
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*------------------------------------------------------------------*/
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void dcd_init (uint8_t rhport)
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{
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(void) rhport;
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// Reset to get in a clean state.
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USB->DEVICE.CTRLA.bit.SWRST = true;
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while (USB->DEVICE.SYNCBUSY.bit.SWRST == 0) {}
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while (USB->DEVICE.SYNCBUSY.bit.SWRST == 1) {}
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USB->DEVICE.PADCAL.bit.TRANSP = (*((uint32_t*) USB_FUSES_TRANSP_ADDR) & USB_FUSES_TRANSP_Msk) >> USB_FUSES_TRANSP_Pos;
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USB->DEVICE.PADCAL.bit.TRANSN = (*((uint32_t*) USB_FUSES_TRANSN_ADDR) & USB_FUSES_TRANSN_Msk) >> USB_FUSES_TRANSN_Pos;
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USB->DEVICE.PADCAL.bit.TRIM = (*((uint32_t*) USB_FUSES_TRIM_ADDR) & USB_FUSES_TRIM_Msk) >> USB_FUSES_TRIM_Pos;
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USB->DEVICE.QOSCTRL.bit.CQOS = 3; // High Quality
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USB->DEVICE.QOSCTRL.bit.DQOS = 3; // High Quality
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// Configure registers
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USB->DEVICE.DESCADD.reg = (uint32_t) &sram_registers;
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USB->DEVICE.CTRLB.reg = USB_DEVICE_CTRLB_SPDCONF_FS;
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USB->DEVICE.CTRLA.reg = USB_CTRLA_MODE_DEVICE | USB_CTRLA_ENABLE | USB_CTRLA_RUNSTDBY;
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while (USB->DEVICE.SYNCBUSY.bit.ENABLE == 1) {}
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USB->DEVICE.INTFLAG.reg |= USB->DEVICE.INTFLAG.reg; // clear pending
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USB->DEVICE.INTENSET.reg = /* USB_DEVICE_INTENSET_SOF | */ USB_DEVICE_INTENSET_EORST;
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}
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#if CFG_TUSB_MCU == OPT_MCU_SAMD51
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void dcd_int_enable(uint8_t rhport)
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{
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(void) rhport;
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NVIC_EnableIRQ(USB_0_IRQn);
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NVIC_EnableIRQ(USB_1_IRQn);
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NVIC_EnableIRQ(USB_2_IRQn);
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NVIC_EnableIRQ(USB_3_IRQn);
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}
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void dcd_int_disable(uint8_t rhport)
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{
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(void) rhport;
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NVIC_DisableIRQ(USB_3_IRQn);
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NVIC_DisableIRQ(USB_2_IRQn);
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NVIC_DisableIRQ(USB_1_IRQn);
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NVIC_DisableIRQ(USB_0_IRQn);
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}
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#elif CFG_TUSB_MCU == OPT_MCU_SAMD21
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void dcd_int_enable(uint8_t rhport)
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{
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(void) rhport;
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NVIC_EnableIRQ(USB_IRQn);
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}
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void dcd_int_disable(uint8_t rhport)
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{
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(void) rhport;
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NVIC_DisableIRQ(USB_IRQn);
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}
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#endif
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void dcd_set_address (uint8_t rhport, uint8_t dev_addr)
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{
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(void) dev_addr;
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// Response with zlp status
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dcd_edpt_xfer(rhport, 0x80, NULL, 0);
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// DCD can only set address after status for this request is complete
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// do it at dcd_edpt0_status_complete()
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// Enable SUSPEND interrupt since the bus signal D+/D- are stable now.
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USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTENCLR_SUSPEND; // clear pending
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USB->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SUSPEND;
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}
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void dcd_set_config (uint8_t rhport, uint8_t config_num)
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{
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(void) rhport;
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(void) config_num;
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// Nothing to do
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}
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void dcd_remote_wakeup(uint8_t rhport)
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{
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(void) rhport;
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USB->DEVICE.CTRLB.bit.UPRSM = 1;
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}
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/*------------------------------------------------------------------*/
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/* DCD Endpoint port
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*------------------------------------------------------------------*/
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// Invoked when a control transfer's status stage is complete.
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// May help DCD to prepare for next control transfer, this API is optional.
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void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request)
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{
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(void) rhport;
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if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
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request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
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request->bRequest == TUSB_REQ_SET_ADDRESS )
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{
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uint8_t const dev_addr = (uint8_t) request->wValue;
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USB->DEVICE.DADD.reg = USB_DEVICE_DADD_DADD(dev_addr) | USB_DEVICE_DADD_ADDEN;
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}
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// Just finished status stage, prepare for next setup packet
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// Note: we may already prepare setup when the last EP0 OUT complete.
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// but it has no harm to do it again here
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prepare_setup();
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}
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bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
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{
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(void) rhport;
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uint8_t const epnum = tu_edpt_number(desc_edpt->bEndpointAddress);
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uint8_t const dir = tu_edpt_dir(desc_edpt->bEndpointAddress);
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UsbDeviceDescBank* bank = &sram_registers[epnum][dir];
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uint32_t size_value = 0;
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while (size_value < 7) {
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if (1 << (size_value + 3) == desc_edpt->wMaxPacketSize.size) {
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break;
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}
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size_value++;
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}
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// unsupported endpoint size
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if ( size_value == 7 && desc_edpt->wMaxPacketSize.size != 1023 ) return false;
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bank->PCKSIZE.bit.SIZE = size_value;
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UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
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if ( dir == TUSB_DIR_OUT )
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{
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ep->EPCFG.bit.EPTYPE0 = desc_edpt->bmAttributes.xfer + 1;
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ep->EPINTENSET.bit.TRCPT0 = true;
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}else
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{
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ep->EPCFG.bit.EPTYPE1 = desc_edpt->bmAttributes.xfer + 1;
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ep->EPINTENSET.bit.TRCPT1 = true;
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}
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return true;
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}
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bool dcd_edpt_xfer (uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t total_bytes)
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{
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(void) rhport;
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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UsbDeviceDescBank* bank = &sram_registers[epnum][dir];
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UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
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bank->ADDR.reg = (uint32_t) buffer;
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if ( dir == TUSB_DIR_OUT )
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{
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bank->PCKSIZE.bit.MULTI_PACKET_SIZE = total_bytes;
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bank->PCKSIZE.bit.BYTE_COUNT = 0;
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ep->EPSTATUSCLR.reg |= USB_DEVICE_EPSTATUSCLR_BK0RDY;
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ep->EPINTFLAG.reg |= USB_DEVICE_EPINTFLAG_TRFAIL0;
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} else
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{
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bank->PCKSIZE.bit.MULTI_PACKET_SIZE = 0;
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bank->PCKSIZE.bit.BYTE_COUNT = total_bytes;
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ep->EPSTATUSSET.reg |= USB_DEVICE_EPSTATUSSET_BK1RDY;
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ep->EPINTFLAG.reg |= USB_DEVICE_EPINTFLAG_TRFAIL1;
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}
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return true;
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}
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void dcd_edpt_stall (uint8_t rhport, uint8_t ep_addr)
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{
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(void) rhport;
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uint8_t const epnum = tu_edpt_number(ep_addr);
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UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
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if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
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ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ1;
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} else {
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ep->EPSTATUSSET.reg = USB_DEVICE_EPSTATUSSET_STALLRQ0;
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}
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}
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void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
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{
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(void) rhport;
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uint8_t const epnum = tu_edpt_number(ep_addr);
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UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
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if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
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ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ1 | USB_DEVICE_EPSTATUSCLR_DTGLIN;
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} else {
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ep->EPSTATUSCLR.reg = USB_DEVICE_EPSTATUSCLR_STALLRQ0 | USB_DEVICE_EPSTATUSCLR_DTGLOUT;
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}
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}
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//--------------------------------------------------------------------+
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// Interrupt Handler
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//--------------------------------------------------------------------+
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void maybe_transfer_complete(void) {
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uint32_t epints = USB->DEVICE.EPINTSMRY.reg;
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for (uint8_t epnum = 0; epnum < USB_EPT_NUM; epnum++) {
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if ((epints & (1 << epnum)) == 0) {
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continue;
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}
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UsbDeviceEndpoint* ep = &USB->DEVICE.DeviceEndpoint[epnum];
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uint32_t epintflag = ep->EPINTFLAG.reg;
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// Handle IN completions
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if ((epintflag & USB_DEVICE_EPINTFLAG_TRCPT1) != 0) {
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UsbDeviceDescBank* bank = &sram_registers[epnum][TUSB_DIR_IN];
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uint16_t total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT;
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dcd_event_xfer_complete(0, epnum | TUSB_DIR_IN_MASK, total_transfer_size, XFER_RESULT_SUCCESS, true);
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ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1;
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}
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// Handle OUT completions
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if ((epintflag & USB_DEVICE_EPINTFLAG_TRCPT0) != 0) {
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UsbDeviceDescBank* bank = &sram_registers[epnum][TUSB_DIR_OUT];
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uint16_t total_transfer_size = bank->PCKSIZE.bit.BYTE_COUNT;
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// A SETUP token can occur immediately after an OUT packet
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// so make sure we have a valid buffer for the control endpoint.
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if (epnum == 0) {
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prepare_setup();
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}
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dcd_event_xfer_complete(0, epnum, total_transfer_size, XFER_RESULT_SUCCESS, true);
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ep->EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0;
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}
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}
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}
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void dcd_isr (uint8_t rhport)
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{
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(void) rhport;
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uint32_t int_status = USB->DEVICE.INTFLAG.reg & USB->DEVICE.INTENSET.reg;
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/*------------- Interrupt Processing -------------*/
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if ( int_status & USB_DEVICE_INTFLAG_SOF )
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{
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USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SOF;
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dcd_event_bus_signal(0, DCD_EVENT_SOF, true);
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}
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// SAMD doesn't distinguish between Suspend and Disconnect state.
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// Both condition will cause SUSPEND interrupt triggered.
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// To prevent being triggered when D+/D- are not stable, SUSPEND interrupt is only
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// enabled when we received SET_ADDRESS request and cleared on Bus Reset
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if ( int_status & USB_DEVICE_INTFLAG_SUSPEND )
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{
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USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SUSPEND;
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// Enable wakeup interrupt
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USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_WAKEUP; // clear pending
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USB->DEVICE.INTENSET.reg = USB_DEVICE_INTFLAG_WAKEUP;
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dcd_event_bus_signal(0, DCD_EVENT_SUSPEND, true);
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}
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// Wakeup interrupt is only enabled when we got suspended.
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// Wakeup interrupt will disable itself
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if ( int_status & USB_DEVICE_INTFLAG_WAKEUP )
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{
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USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_WAKEUP;
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// disable wakeup interrupt itself
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USB->DEVICE.INTENCLR.reg = USB_DEVICE_INTFLAG_WAKEUP;
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dcd_event_bus_signal(0, DCD_EVENT_RESUME, true);
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}
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if ( int_status & USB_DEVICE_INTFLAG_EORST )
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{
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USB->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_EORST;
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// Disable both suspend and wakeup interrupt
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USB->DEVICE.INTENCLR.reg = USB_DEVICE_INTFLAG_WAKEUP | USB_DEVICE_INTFLAG_SUSPEND;
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bus_reset();
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dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
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}
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// Handle SETUP packet
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if (USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.bit.RXSTP)
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{
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// This copies the data elsewhere so we can reuse the buffer.
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dcd_event_setup_received(0, _setup_packet, true);
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USB->DEVICE.DeviceEndpoint[0].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP;
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}
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// Handle complete transfer
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maybe_transfer_complete();
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}
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#if CFG_TUSB_MCU == OPT_MCU_SAMD51
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/*
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*------------------------------------------------------------------*/
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/* USB_EORSM_DNRSM, USB_EORST_RST, USB_LPMSUSP_DDISC, USB_LPM_DCONN,
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USB_MSOF, USB_RAMACER, USB_RXSTP_TXSTP_0, USB_RXSTP_TXSTP_1,
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USB_RXSTP_TXSTP_2, USB_RXSTP_TXSTP_3, USB_RXSTP_TXSTP_4,
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USB_RXSTP_TXSTP_5, USB_RXSTP_TXSTP_6, USB_RXSTP_TXSTP_7,
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USB_STALL0_STALL_0, USB_STALL0_STALL_1, USB_STALL0_STALL_2,
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USB_STALL0_STALL_3, USB_STALL0_STALL_4, USB_STALL0_STALL_5,
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USB_STALL0_STALL_6, USB_STALL0_STALL_7, USB_STALL1_0, USB_STALL1_1,
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USB_STALL1_2, USB_STALL1_3, USB_STALL1_4, USB_STALL1_5, USB_STALL1_6,
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USB_STALL1_7, USB_SUSPEND, USB_TRFAIL0_TRFAIL_0, USB_TRFAIL0_TRFAIL_1,
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USB_TRFAIL0_TRFAIL_2, USB_TRFAIL0_TRFAIL_3, USB_TRFAIL0_TRFAIL_4,
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USB_TRFAIL0_TRFAIL_5, USB_TRFAIL0_TRFAIL_6, USB_TRFAIL0_TRFAIL_7,
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USB_TRFAIL1_PERR_0, USB_TRFAIL1_PERR_1, USB_TRFAIL1_PERR_2,
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USB_TRFAIL1_PERR_3, USB_TRFAIL1_PERR_4, USB_TRFAIL1_PERR_5,
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USB_TRFAIL1_PERR_6, USB_TRFAIL1_PERR_7, USB_UPRSM, USB_WAKEUP */
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void USB_0_Handler(void) {
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dcd_isr(0);
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}
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/* USB_SOF_HSOF */
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void USB_1_Handler(void) {
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dcd_isr(0);
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}
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// Bank zero is for OUT and SETUP transactions.
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/* USB_TRCPT0_0, USB_TRCPT0_1, USB_TRCPT0_2,
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USB_TRCPT0_3, USB_TRCPT0_4, USB_TRCPT0_5,
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USB_TRCPT0_6, USB_TRCPT0_7 */
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void USB_2_Handler(void) {
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dcd_isr(0);
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}
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// Bank one is used for IN transactions.
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/* USB_TRCPT1_0, USB_TRCPT1_1, USB_TRCPT1_2,
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USB_TRCPT1_3, USB_TRCPT1_4, USB_TRCPT1_5,
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USB_TRCPT1_6, USB_TRCPT1_7 */
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void USB_3_Handler(void) {
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dcd_isr(0);
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}
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#elif CFG_TUSB_MCU == OPT_MCU_SAMD21
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void USB_Handler(void) {
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dcd_isr(0);
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}
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#endif
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#endif
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