William D. Jones
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ea0e799df6
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dcd_msp430x5xx: Fix clear stall logic.
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2019-09-29 02:17:59 -04:00 |
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William D. Jones
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529efcc0d2
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dcd_msp430x5xx: Implement dcd_edpt_open.
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2019-09-29 00:21:40 -04:00 |
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William D. Jones
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5d9f833915
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dcd_msp430x5xx: Implement STALL logic for EP 0.
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2019-09-28 02:09:03 -04:00 |
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William D. Jones
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63c94ff684
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dcd_msp430x5xx: Improve EP0 IN handling (reuse short_packet field).
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2019-09-28 01:51:05 -04:00 |
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William D. Jones
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030560792d
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dcd_msp430x5xx: Implement dcd_set_address.
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2019-09-27 21:59:45 -04:00 |
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William D. Jones
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3ac43076da
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dcd_msp430x5xx: Implement EP0 IN xfers, clean up.
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2019-09-27 21:22:19 -04:00 |
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William D. Jones
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01b4115b0b
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dcd_msp430x5xx: Fix Setup packet delay by actually enabling
corresponding interrupt.
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2019-09-24 04:06:34 -04:00 |
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William D. Jones
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550e8215f3
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dcd_msp430x5xx: Setup packets are now received successfully (with delay).
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2019-09-24 03:43:51 -04:00 |
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William D. Jones
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d2e4af5a7b
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msp430f5529: Change EP0 size to 8, implement interrupt logic up to bus
reset detection.
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2019-09-24 02:41:11 -04:00 |
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William D. Jones
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950614a841
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msp430f5529: Implement dcd_int_enable/disable.
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2019-09-23 22:58:49 -04:00 |
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William D. Jones
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a6a79df9fb
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msp430f5529: Enable clocks/PLL for msp_exp430f5529lp and enable USB
module in dcd_msp430x5xx; device does not enumerate.
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2019-09-23 18:53:31 -04:00 |
|
William D. Jones
|
907bc3df9b
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msp430f5529: Ensure cdc_msc demo compiles.
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2019-09-23 17:48:18 -04:00 |
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William D. Jones
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6280e4e7cb
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msp430f5529: Add empty msp_exp430f5529lp BSP and DCD.
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2019-09-14 18:02:17 -04:00 |