FIFO is limited to 64 bytes yet MCU is capable of transmitting
larger packets provided that FIFO will be filled on the fly
and USB_USB_TXCx_REG_USB_LAST_Msk bit is set after FIFO is
filled with all the data that should be transmitted.
This change allows to use FIFO level warning interrupt to fill
FIFO. When DMA is available it will be used instead of interrupts.
Some function names were changed to better reflect what each function
does.
Closing endpoints can be important when there are alternate
instances. This adds functionality of closing endpoints
similar to what exists in other drivers.
Internal FIFO for each endpoint is limited to 64 bytes.
It is possible to have longer packets if respective FIFO
is read during actual packet transmission.
This change updates receive data path to allow packets (and
endpoint size) larger then 64 bytes.
If DMA is not used yet DMA is setup for reception of big packets.
If DMA is already assigned to some transfer, code enables FIFO level
warning interrupts and tries to read data before FIFO is filled up.
ISO endpoints were not covered so far by the driver code.
This adds support for ISO IN and OUT endpoint handling.
Registers for ISO IN(OUT) endpoints are placed just after normal IN(OUT)
so in some cases common code could be used for handling all type of
transfers.
Generally code synchronizes ISO endpoint handling to SOF interrupt.
This code does not change the way of how non-ISO endpoints are treated.
Code uses strategy outlined in nRF52840 Produce Specification v1.0
sections 6.35.11.1 and 6.35.11.2.
Closing endpoints can be important when there are alternate
instances. This adds functionality of closing endpoints
similar to what exists in other drivers.
Currently number of endpoints was hard coded to 8.
NRF52 has 9 IN and 9 OUT endpoints.
ISO endpoints are 0x08 and 0x88 and without this change those
two ISO endpoint could not be used.
Current implementation always sets odd/even bit for ISO transactions.
This is a good strategy only if interval is 1.
For ISO endpoint interval in (micro)frames is computed as
2^(interval-1), which means that odd/frame number should stay
same for interval values > 1.
With this change only when interval is 1 odd/even bit is modified.
dcd_edpt_close() no longer modifies FIFO distribution.
Code that that was commented out is removed along with
variables that are no longer used.
FIFO distribution among endpoints is handled upfront
and does not need to be modified in open and close endpoint
functions.
This allow to build with single FIFO for devices with multiple channels.
Having just one FIFO greatly reduces time needed to feed endpoint.
This change also allows to have one FIFO with 24 bit samples that
is not rounded up to 32 bit elements.
CFG_TUD_AUDIO_RX_ITEMSIZE and CFG_TUD_AUDIO_TX_ITEMSIZE can be manually
defined. This allows to use FIFO more efficiently when 24 bits samples
are already using 3 bytes, in this case there is no need to put them
into FIFO one by one.
For 8, 16, 32 bits samples size efficient FIFO access is always used
when single FIFO is selected.
This also changes FIFO element size to 1, FIFO usage was confusing
in some place it treated content as byte base in other it looked like
ITEM size is to be used. Also bufsize that in most (maybe all) cases
was really meaning item count.
bufsize now mean buffer size in bytes so there is no confusion.
hathach