Commit Graph

9 Commits

Author SHA1 Message Date
hathach a6efe475e7 use cmsis 5 for all stm32 2020-10-30 14:14:28 +07:00
hathach 3659d8e89a h7 use offical st driver repo 2020-10-30 13:28:14 +07:00
hathach ec018fbf4e clean up jlink default interface 2020-10-08 17:17:37 +07:00
hathach 9a290febcd
change default port some stm bsp
- f769disco default port is highspeed port1
- remove PORT0 on stlink since the board only populated HS connector
2020-07-02 11:58:40 +07:00
hathach e92118635c adding speed detect on bus reset 2020-06-01 13:40:18 +07:00
hathach 227bffe04b adding h743 uart, but not enabled yet since it conflict with OTG_FS2 2020-05-27 01:14:52 +07:00
hathach 0482f0d686 update h743eval with rhport=1 highspeed 2020-05-26 22:15:00 +07:00
hathach 62a746bdc7 wip 2020-05-26 12:18:36 +07:00
hathach ba9c774a2a board test work fine 2020-05-23 13:29:30 +07:00