hathach
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4494720dbc
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clean up HSE_VALUE for stm32
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2020-01-10 15:14:37 +07:00 |
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hathach
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04cf337b79
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clean up flash-stlink
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2020-01-10 15:09:59 +07:00 |
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Ha Thach
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0b540fa55d
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Merge pull request #234 from hathach/stm32f4-blackpill
move VBUS sense out of dcd_synosys to bsp
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2019-12-12 10:00:17 +07:00 |
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hathach
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88bdb12ee5
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close #204 define HSE_VALUE in _hal_conf instead of board.mk
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2019-12-11 15:19:51 +07:00 |
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hathach
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96a9eca6a0
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move VBUS sense out of dcd_synosys to bsp
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2019-12-11 14:03:36 +07:00 |
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hathach
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f638594536
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move -flto to board.mk
current board that doesn work with flto is spresense and mimxrt10xx (due
to xip image_vector_table is optimized out).
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2019-11-20 16:06:40 +07:00 |
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hathach
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6f952a8e84
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fix missing board uart read/write()
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2019-10-24 12:20:06 +07:00 |
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hathach
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6183dbd0ce
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add -Wextra for more warnings to example
non-stack warning (probably mcu driver) should be suppressed in the
board.mk
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2019-09-27 00:15:43 +07:00 |
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hathach
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ff7261600c
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ported stm32f2, added board stm32f207zg nucleo
close #127
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2019-09-12 10:41:03 +07:00 |
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hathach
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de659be83e
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tested all the stm32f4 board, work great
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2019-09-11 17:37:23 +07:00 |
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William D. Jones
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1385d7c494
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stm32: Refactor so F4 and H7 use a single Synopsys IP source file.
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2019-09-09 10:48:14 -04:00 |
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hathach
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4663f9084d
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ported board stm32f412g discovery
- added soft connect for enable pull up register dcd stm32f4
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2019-09-08 21:57:02 +07:00 |
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hathach
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8fd7836ff6
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added board stm32f412 discovery, board_test exmaple run
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2019-09-06 17:31:37 +07:00 |