refractor ehci_data_t
separate tests for pipe open & pipe xfer
This commit is contained in:
hathach
parent
97a4a41b82
commit
ef1cef5019
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@ -54,11 +54,10 @@ LPC_USB0_Type lpc_usb0;
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LPC_USB1_Type lpc_usb1;
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uint8_t const control_max_packet_size = 64;
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uint8_t const hub_addr = 2;
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uint8_t const hub_port = 2;
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uint8_t dev_addr;
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uint8_t hub_addr;
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uint8_t hub_port;
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uint8_t hostid;
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uint8_t xfer_data [100];
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ehci_qhd_t *async_head;
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@ -82,16 +81,12 @@ void setUp(void)
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memclr_(usbh_device_info_pool, sizeof(usbh_device_info_t)*(TUSB_CFG_HOST_DEVICE_MAX+1));
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memclr_(&ehci_data, sizeof(ehci_data_t));
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memclr_(xfer_data, sizeof(xfer_data));
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hcd_init();
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dev_addr = 1;
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hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX;
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hub_addr = 2;
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hub_port = 2;
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for (uint8_t i=0; i<TUSB_CFG_HOST_DEVICE_MAX; i++)
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{
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usbh_device_info_pool[i].core_id = hostid;
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@ -231,78 +226,3 @@ void test_open_bulk_qhd_data(void)
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TEST_ASSERT_FALSE(async_head->next.terminate);
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TEST_ASSERT_EQUAL(EHCI_QUEUE_ELEMENT_QHD, async_head->next.type);
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}
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//--------------------------------------------------------------------+
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// CONTROL TRANSFER
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//--------------------------------------------------------------------+
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tusb_std_request_t request_get_dev_desc =
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{
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.bmRequestType = { .direction = TUSB_DIR_DEV_TO_HOST, .type = TUSB_REQUEST_TYPE_STANDARD, .recipient = TUSB_REQUEST_RECIPIENT_DEVICE },
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.bRequest = TUSB_REQUEST_GET_DESCRIPTOR,
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.wValue = (TUSB_DESC_DEVICE << 8),
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.wLength = 18
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};
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void test_control_xfer_get(void)
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{
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ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].control.qhd;
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hcd_pipe_control_open(dev_addr, control_max_packet_size);
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//------------- Code Under TEST -------------//
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hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
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ehci_qtd_t *p_setup = &ehci_data.device[dev_addr].control.qtd[0];
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ehci_qtd_t *p_data = &ehci_data.device[dev_addr].control.qtd[1];
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ehci_qtd_t *p_status = &ehci_data.device[dev_addr].control.qtd[2];
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
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TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
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TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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}
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void test_control_addr0_xfer_get(void)
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{
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dev_addr = 0;
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ehci_qhd_t * const p_qhd = async_head;
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hcd_pipe_control_open(dev_addr, control_max_packet_size);
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//------------- Code Under TEST -------------//
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hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
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ehci_qtd_t *p_setup = &ehci_data.controller.addr0_qtd[0];
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ehci_qtd_t *p_data = &ehci_data.controller.addr0_qtd[1];
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ehci_qtd_t *p_status = &ehci_data.controller.addr0_qtd[2];
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
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TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
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TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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}
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void test_control_xfer_set(void)
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{
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tusb_std_request_t request_set_dev_addr =
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{
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.bmRequestType = { .direction = TUSB_DIR_HOST_TO_DEV, .type = TUSB_REQUEST_TYPE_STANDARD, .recipient = TUSB_REQUEST_RECIPIENT_DEVICE },
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.bRequest = TUSB_REQUEST_SET_ADDRESS,
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.wValue = 3
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};
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ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].control.qhd;
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hcd_pipe_control_open(dev_addr, control_max_packet_size);
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//------------- Code Under TEST -------------//
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hcd_pipe_control_xfer(dev_addr, &request_set_dev_addr, xfer_data);
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ehci_qtd_t *p_setup = &ehci_data.device[dev_addr].control.qtd[0];
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ehci_qtd_t *p_data = &ehci_data.device[dev_addr].control.qtd[1];
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ehci_qtd_t *p_status = &ehci_data.device[dev_addr].control.qtd[2];
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
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TEST_ASSERT_EQUAL_HEX( p_status , p_setup->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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}
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@ -0,0 +1,197 @@
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/*
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* test_ehci_pipe_xfer.c
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*
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* Created on: Feb 27, 2013
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* Author: hathach
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*/
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/*
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* Software License Agreement (BSD License)
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* Copyright (c) 2012, hathach (tinyusb.net)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
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* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
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* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*
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* This file is part of the tiny usb stack.
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*/
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#include "unity.h"
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#include "tusb_option.h"
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#include "errors.h"
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#include "binary.h"
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#include "hal.h"
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#include "mock_osal.h"
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#include "hcd.h"
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#include "usbh_hcd.h"
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#include "ehci.h"
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#include "test_ehci.h"
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extern ehci_data_t ehci_data;
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usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1];
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LPC_USB0_Type lpc_usb0;
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LPC_USB1_Type lpc_usb1;
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uint8_t const control_max_packet_size = 64;
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uint8_t const hub_addr = 2;
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uint8_t const hub_port = 2;
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uint8_t dev_addr;
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uint8_t hostid;
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uint8_t xfer_data [100];
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ehci_qhd_t *async_head;
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ehci_qtd_t *p_setup;
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ehci_qtd_t *p_data;
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ehci_qtd_t *p_status;
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tusb_descriptor_endpoint_t const desc_ept_bulk_in =
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{
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.bLength = sizeof(tusb_descriptor_endpoint_t),
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.bDescriptorType = TUSB_DESC_ENDPOINT,
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.bEndpointAddress = 0x81,
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.bmAttributes = { .xfer = TUSB_XFER_BULK },
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.wMaxPacketSize = 512,
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.bInterval = 0
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};
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//--------------------------------------------------------------------+
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// Setup/Teardown + helper declare
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//--------------------------------------------------------------------+
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void setUp(void)
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{
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memclr_(&lpc_usb0, sizeof(LPC_USB0_Type));
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memclr_(&lpc_usb1, sizeof(LPC_USB1_Type));
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memclr_(usbh_device_info_pool, sizeof(usbh_device_info_t)*(TUSB_CFG_HOST_DEVICE_MAX+1));
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memclr_(&ehci_data, sizeof(ehci_data_t));
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memclr_(xfer_data, sizeof(xfer_data));
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hcd_init();
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dev_addr = 1;
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hostid = RANDOM(CONTROLLER_HOST_NUMBER) + TEST_CONTROLLER_HOST_START_INDEX;
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for (uint8_t i=0; i<TUSB_CFG_HOST_DEVICE_MAX; i++)
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{
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usbh_device_info_pool[i].core_id = hostid;
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usbh_device_info_pool[i].hub_addr = hub_addr;
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usbh_device_info_pool[i].hub_port = hub_port;
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}
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async_head = get_async_head( hostid );
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p_setup = &ehci_data.device[dev_addr].control.qtd[0];
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p_data = &ehci_data.device[dev_addr].control.qtd[1];
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p_status = &ehci_data.device[dev_addr].control.qtd[2];
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}
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void tearDown(void)
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{
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}
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//--------------------------------------------------------------------+
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// CONTROL TRANSFER
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//--------------------------------------------------------------------+
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tusb_std_request_t request_get_dev_desc =
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{
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.bmRequestType = { .direction = TUSB_DIR_DEV_TO_HOST, .type = TUSB_REQUEST_TYPE_STANDARD, .recipient = TUSB_REQUEST_RECIPIENT_DEVICE },
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.bRequest = TUSB_REQUEST_GET_DESCRIPTOR,
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.wValue = (TUSB_DESC_DEVICE << 8),
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.wLength = 18
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};
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void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
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{
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dev_addr = 0;
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ehci_qhd_t * const p_qhd = async_head;
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hcd_pipe_control_open(dev_addr, control_max_packet_size);
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//------------- Code Under TEST -------------//
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hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
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p_setup = &ehci_data.addr0.qtd[0];
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p_data = &ehci_data.addr0.qtd[1];
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p_status = &ehci_data.addr0.qtd[2];
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
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TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
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TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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}
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void test_control_xfer_get(void)
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{
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ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].control.qhd;
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hcd_pipe_control_open(dev_addr, control_max_packet_size);
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//------------- Code Under TEST -------------//
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hcd_pipe_control_xfer(dev_addr, &request_get_dev_desc, xfer_data);
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
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TEST_ASSERT_EQUAL_HEX( p_data , p_setup->next.address);
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TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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// ehci_qtd_t *p_qtd = p_setup;
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// TEST_ASSERT_TRUE(p_qtd->alternate.terminate); // not used, always invalid
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// TEST_ASSERT_FALSE(p_qtd->pingstate_err);
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// TEST_ASSERT_FALSE(p_qtd->split_state);
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// TEST_ASSERT_FALSE(p_qtd->missed_uframe);
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// TEST_ASSERT_FALSE(p_qtd->xact_err);
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// TEST_ASSERT_FALSE(p_qtd->babble_err);
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// TEST_ASSERT_FALSE(p_qtd->buffer_err);
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// TEST_ASSERT_FALSE(p_qtd->halted);
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// TEST_ASSERT_TRUE(p_qtd->active);
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// // error count
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// TEST_ASSERT_EQUAL(0, p_qtd->current_page);
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// TEST_ASSERT_FALSE(p_qtd->int_on_complete);
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// TEST_ASSERT_EQUAL(8, p_qtd->total_bytes);
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// TEST_ASSERT_FALSE(p_qtd->data_toggle);
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//
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//// TEST_ASSERT_EQUAL_HEX(request)
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//
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// TEST_ASSERT_EQUAL(EHCI_PID_SETUP, p_qtd->pid);
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}
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void test_control_xfer_set(void)
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{
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tusb_std_request_t request_set_dev_addr =
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{
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.bmRequestType = { .direction = TUSB_DIR_HOST_TO_DEV, .type = TUSB_REQUEST_TYPE_STANDARD, .recipient = TUSB_REQUEST_RECIPIENT_DEVICE },
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.bRequest = TUSB_REQUEST_SET_ADDRESS,
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.wValue = 3
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};
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ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].control.qhd;
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hcd_pipe_control_open(dev_addr, control_max_packet_size);
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//------------- Code Under TEST -------------//
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hcd_pipe_control_xfer(dev_addr, &request_set_dev_addr, xfer_data);
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TEST_ASSERT_EQUAL_HEX( p_setup , p_qhd->p_qtd_list);
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TEST_ASSERT_EQUAL_HEX( p_status , p_setup->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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}
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@ -101,13 +101,13 @@ STATIC_ INLINE_ uint8_t hostid_to_data_idx(uint8_t hostid)
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STATIC_ INLINE_ ehci_qhd_t* const get_async_head(uint8_t hostid) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
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STATIC_ INLINE_ ehci_qhd_t* const get_async_head(uint8_t hostid)
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{
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return &ehci_data.controller.async_head[hostid_to_data_idx(hostid)];
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return &ehci_data.async_head[ hostid_to_data_idx(hostid) ];
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}
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STATIC_ INLINE_ ehci_qhd_t* const get_period_head(uint8_t hostid) ATTR_ALWAYS_INLINE ATTR_PURE ATTR_WARN_UNUSED_RESULT;
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STATIC_ INLINE_ ehci_qhd_t* const get_period_head(uint8_t hostid)
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{
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return &ehci_data.controller.period_head[hostid_to_data_idx(hostid)];
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return &ehci_data.period_head[ hostid_to_data_idx(hostid) ];
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}
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tusb_error_t hcd_controller_init(uint8_t hostid) ATTR_WARN_UNUSED_RESULT;
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@ -337,7 +337,7 @@ static inline ehci_qhd_t* const get_control_qhd(uint8_t dev_addr)
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static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr)
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{
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return (dev_addr == 0) ?
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ehci_data.controller.addr0_qtd :
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ehci_data.addr0.qtd :
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ehci_data.device[ dev_addr ].control.qtd;
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}
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@ -435,21 +435,27 @@ typedef volatile struct {
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// EHCI Data Organization
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//--------------------------------------------------------------------+
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typedef struct {
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//------------- Static Async/Period List Head, Each for one controller -------------//
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ehci_qhd_t async_head[CONTROLLER_HOST_NUMBER]; /// head qhd of async list, also is used as control endpoint for address 0
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ehci_qhd_t period_head[CONTROLLER_HOST_NUMBER];
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//------------- Data for Address 0 -------------//
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struct {
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// qhd: addr0 use async head (dummy) as Queue Head
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ehci_qtd_t qtd[3];
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tusb_std_request_t request;
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} addr0;
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struct {
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ehci_qhd_t async_head[CONTROLLER_HOST_NUMBER]; /// head qhd of async list, also is used as control endpoint for address 0
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ehci_qhd_t period_head[CONTROLLER_HOST_NUMBER];
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ehci_qtd_t addr0_qtd[3];
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}controller; ///< Static Interrupt Queue Head
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struct {
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// ehci_itd_t itd[EHCI_MAX_ITD] ; ///< Iso Transfer Pool
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struct {
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ehci_qhd_t qhd;
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ehci_qtd_t qtd[3];
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tusb_std_request_t request;
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}control;
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ehci_qhd_t qhd[EHCI_MAX_QHD] ; ///< Queue Head Pool
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ehci_qtd_t qtd[EHCI_MAX_QTD] ; ///< Queue Element Transfer Pool
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// ehci_itd_t itd[EHCI_MAX_ITD] ; ///< Iso Transfer Pool
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// ehci_sitd_t sitd[EHCI_MAX_SITD] ; ///< Split (FS) Isochronous Transfer Pool
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}device[TUSB_CFG_HOST_DEVICE_MAX];
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