add test for hcd/host init
- TT control - usb cmd complete hcd/host initialization code
This commit is contained in:
hathach
parent
74e6b545e1
commit
d644eaeb5c
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@ -315,7 +315,7 @@ void test_ehci_data(void)
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}
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//--------------------------------------------------------------------+
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// Initalization
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// Initialization
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//--------------------------------------------------------------------+
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void test_hcd_init_data(void)
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{
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@ -375,7 +375,6 @@ void test_hcd_init_async_list(void)
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TEST_ASSERT(async_head->qtd_overlay.alternate.terminate);
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TEST_ASSERT(async_head->qtd_overlay.halted);
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}
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}
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void test_hcd_init_period_list(void)
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@ -406,6 +405,43 @@ void test_hcd_init_period_list(void)
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}
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#endif
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}
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void test_hcd_init_tt_control(void)
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{
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hcd_init();
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for(uint32_t i=0; i<TUSB_CFG_HOST_CONTROLLER_NUM; i++)
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{
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uint8_t const hostid = i+TUSB_CFG_HOST_CONTROLLER_START_INDEX;
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ehci_registers_t* const regs = get_operational_register(hostid);
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TEST_ASSERT_EQUAL(0, regs->tt_control);
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}
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}
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void test_hcd_init_usbcmd(void)
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{
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hcd_init();
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for(uint32_t i=0; i<TUSB_CFG_HOST_CONTROLLER_NUM; i++)
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{
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uint8_t const hostid = i+TUSB_CFG_HOST_CONTROLLER_START_INDEX;
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ehci_registers_t* const regs = get_operational_register(hostid);
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TEST_ASSERT(regs->usb_cmd_bit.async_enable);
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#if EHCI_PERIODIC_LIST
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TEST_ASSERT(regs->usb_cmd_bit.periodic_enable);
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#else
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TEST_ASSERT_FALSE(regs->usb_cmd_bit.periodic_enable);
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#endif
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//------------- Framelist size (NXP specific) -------------//
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TEST_ASSERT_BITS(BIN8(11), EHCI_CFG_FRAMELIST_SIZE_BITS, regs->usb_cmd_bit.framelist_size);
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TEST_ASSERT_EQUAL(EHCI_CFG_FRAMELIST_SIZE_BITS >> 2, regs->usb_cmd_bit.nxp_framelist_size_msb);
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}
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}
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//--------------------------------------------------------------------+
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// Helper
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//--------------------------------------------------------------------+
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@ -61,12 +61,14 @@ extern "C"
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//--------------------------------------------------------------------+
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// Compile-time Assert
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//--------------------------------------------------------------------+
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#ifdef __COUNTER__
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#define STATIC_ASSSERT(const_expr) enum { XSTRING_CONCAT(static_assert_, __COUNTER__) = 1/(!!(const_expr)) }
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#if defined __COUNTER__ && __COUNTER__ != __COUNTER__
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#define _ASSERT_COUNTER __COUNTER__
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#else
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#define STATIC_ASSSERT(const_expr) enum { XSTRING_CONCAT(static_assert_, __LINE__) = 1/(!!(const_expr)) }
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#define _ASSERT_COUNTER __LINE__
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#endif
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#define STATIC_ASSSERT(const_expr) enum { XSTRING_CONCAT(static_assert_, _ASSERT_COUNTER) = 1/(!!(const_expr)) }
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//#if ( defined CFG_PRINTF_UART || defined CFG_PRINTF_USBCDC || defined CFG_PRINTF_DEBUG )
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#if TUSB_CFG_DEBUG == 3
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#define _PRINTF(...) printf(__VA_ARGS__)
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@ -123,7 +123,7 @@ tusb_error_t hcd_controller_init(uint8_t hostid)
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regs->usb_sts = EHCI_INT_MASK_ALL; // 2. clear all status
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regs->usb_int_enable =
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/*EHCI_INT_MASK_USB |*/ EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | EHCI_INT_MASK_ASYNC_ADVANCE
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#if 1
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#if 1 // TODO enable usbint olny
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| EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC
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#endif
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;
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@ -164,8 +164,19 @@ tusb_error_t hcd_controller_init(uint8_t hostid)
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#else
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regs->periodic_list_base = 0;
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#endif
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//------------- TT Control (NXP only) -------------//
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regs->tt_control = 0;
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//------------- USB CMD Register -------------//
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regs->usb_cmd = BIT_(EHCI_USBCMD_POS_ASYNC_ENABLE)
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#if EHCI_PERIODIC_LIST
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| BIT_(EHCI_USBCMD_POS_PERIOD_ENABLE)
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#endif
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| ((EHCI_CFG_FRAMELIST_SIZE_BITS & BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE)
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| ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB);
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//------------- ConfigFlag Register (skip) -------------//
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return TUSB_ERROR_NONE;
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@ -83,9 +83,14 @@
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#define EHCI_MAX_ITD 4
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#define EHCI_MAX_SITD 16
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#define EHCI_CFG_FRAMELIST_SIZE_BITS 5 /// (0:1024) - (1:512) - (2:256) - (3:128) - (4:64) - (5:32) - (6:16) - (7:8)
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#define EHCI_CFG_FRAMELIST_SIZE_BITS 7 /// Framelist Size (NXP specific) (0:1024) - (1:512) - (2:256) - (3:128) - (4:64) - (5:32) - (6:16) - (7:8)
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#define EHCI_FRAMELIST_SIZE (1024 >> EHCI_CFG_FRAMELIST_SIZE_BITS)
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//------------- Validation -------------//
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#if EHCI_CFG_FRAMELIST_SIZE_BITS > 7
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#error EHCI_CFG_FRAMELIST_SIZE_BITS must be from 0-7
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#endif
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//--------------------------------------------------------------------+
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// EHCI Data Structure
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//--------------------------------------------------------------------+
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@ -308,6 +313,14 @@ enum ehci_interrupt_mask_{
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EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC
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};
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enum ehci_usbcmd_pos_ {
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EHCI_USBCMD_POS_FRAMELIST_SZIE = 2,
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EHCI_USBCMD_POS_PERIOD_ENABLE = 4,
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EHCI_USBCMD_POS_ASYNC_ENABLE = 5,
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EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB = 15,
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EHCI_USBCMD_POS_INTERRUPT_THRESHOLD = 16
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};
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typedef volatile struct {
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union {
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uint32_t usb_cmd ; ///< The Command Register indicates the command to be executed by the serial bus host controller. Writing to the register causes a command to be executed
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