fix -wconversion-int and add minor comment

This commit is contained in:
hathach 2022-11-04 16:14:35 +07:00
parent b554c2ed83
commit d2c9b8bcfb
2 changed files with 16 additions and 10 deletions

View File

@ -513,15 +513,19 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpo
return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0); return tu_le16toh(desc_ep->wMaxPacketSize) & TU_GENMASK(10, 0);
} }
static inline const char *tu_edpt_dir_str(tusb_dir_t dir) { #if CFG_TUSB_DEBUG
TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_dir_str(tusb_dir_t dir)
{
static const char *str[] = {"out", "in"}; static const char *str[] = {"out", "in"};
return str[dir]; return str[dir];
} }
static inline const char *tu_edpt_type_str(tusb_xfer_type_t t) { TU_ATTR_ALWAYS_INLINE static inline const char *tu_edpt_type_str(tusb_xfer_type_t t)
{
static const char *str[] = {"control", "isochronous", "bulk", "interrupt"}; static const char *str[] = {"control", "isochronous", "bulk", "interrupt"};
return str[t]; return str[t];
} }
#endif
//--------------------------------------------------------------------+ //--------------------------------------------------------------------+
// Descriptor helper // Descriptor helper

View File

@ -138,10 +138,10 @@ static void __tusb_irq_path_func(hw_handle_buff_status)(void)
_handle_buff_status_bit(bit, ep); _handle_buff_status_bit(bit, ep);
} }
// Check interrupt endpoints // Check "interrupt" (asynchronous) endpoints for both IN and OUT
for (uint i = 1; i <= USB_HOST_INTERRUPT_ENDPOINTS && remaining_buffers; i++) for (uint i = 1; i <= USB_HOST_INTERRUPT_ENDPOINTS && remaining_buffers; i++)
{ {
// EPX is bit 0 // EPX is bit 0 & 1
// IEP1 IN is bit 2 // IEP1 IN is bit 2
// IEP1 OUT is bit 3 // IEP1 OUT is bit 3
// IEP2 IN is bit 4 // IEP2 IN is bit 4
@ -149,7 +149,8 @@ static void __tusb_irq_path_func(hw_handle_buff_status)(void)
// IEP3 IN is bit 6 // IEP3 IN is bit 6
// IEP3 OUT is bit 7 // IEP3 OUT is bit 7
// etc // etc
for(int j = 0; j < 2; j++){ for(uint j = 0; j < 2; j++)
{
bit = 1 << (i*2+j); bit = 1 << (i*2+j);
if (remaining_buffers & bit) if (remaining_buffers & bit)
{ {
@ -279,6 +280,8 @@ static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
if (transfer_type != TUSB_XFER_CONTROL) if (transfer_type != TUSB_XFER_CONTROL)
{ {
// Note: even though datasheet name these "Interrupt" endpoints. These are actually
// "Asynchronous" endpoints and can be used for other type such as: Bulk (ISO need confirmation)
ep = _next_free_interrupt_ep(); ep = _next_free_interrupt_ep();
pico_info("Allocate %s ep %d\n", tu_edpt_type_str(transfer_type), ep->interrupt_num); pico_info("Allocate %s ep %d\n", tu_edpt_type_str(transfer_type), ep->interrupt_num);
assert(ep); assert(ep);
@ -344,11 +347,10 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
if (ep != &epx) if (ep != &epx)
{ {
// Endpoint has its own addr_endp and interrupt bits to be setup! // Endpoint has its own addr_endp and interrupt bits to be setup!
// This is an interrupt endpoint // This is an interrupt/async endpoint. so need to set up ADDR_ENDP register with:
// so need to set up interrupt endpoint address control register with: // - device address
// device address // - endpoint number / direction
// endpoint number / direction // - preamble
// preamble
uint32_t reg = (uint32_t) (dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB)); uint32_t reg = (uint32_t) (dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB));
if (dir == TUSB_DIR_OUT) if (dir == TUSB_DIR_OUT)