minor clean up
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aa682d7301
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b809429873
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@ -936,16 +936,16 @@ static void handle_rxflvl_irq(uint8_t rhport)
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dwc2_epout_t* epout = &dwc2->epout[epnum];
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dwc2_epout_t* epout = &dwc2->epout[epnum];
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#if CFG_TUSB_DEBUG >= (DWC2_DEBUG + 1)
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//#if CFG_TUSB_DEBUG >= DWC2_DEBUG
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const char * pktsts_str[] =
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// const char * pktsts_str[] =
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{
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// {
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"ASSERT", "Global NAK (ISR)", "Out Data Received", "Out Transfer Complete (ISR)",
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// "ASSERT", "Global NAK (ISR)", "Out Data Received", "Out Transfer Complete (ISR)",
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"Setup Complete (ISR)", "ASSERT", "Setup Data Received"
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// "Setup Complete (ISR)", "ASSERT", "Setup Data Received"
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};
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// };
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TU_LOG_LOCATION();
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// TU_LOG_LOCATION();
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TU_LOG(DWC2_DEBUG, " EP %02X, Byte Count %u, %s\r\n", epnum, bcnt, pktsts_str[pktsts]);
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// TU_LOG(DWC2_DEBUG, " EP %02X, Byte Count %u, %s\r\n", epnum, bcnt, pktsts_str[pktsts]);
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TU_LOG(DWC2_DEBUG, " daint = %08lX, doepint = %04lX\r\n", dwc2->daint, epout->doepint);
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// TU_LOG(DWC2_DEBUG, " daint = %08lX, doepint = %04X\r\n", (unsigned long) dwc2->daint, (unsigned int) epout->doepint);
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#endif
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//#endif
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switch ( pktsts )
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switch ( pktsts )
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{
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{
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@ -1008,17 +1008,19 @@ static void handle_rxflvl_irq(uint8_t rhport)
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// - complete the data stage of control write is complete
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// - complete the data stage of control write is complete
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if ((epnum == 0) && (bcnt == 0) && (dwc2->gsnpsid >= DWC2_CORE_REV_3_00a))
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if ((epnum == 0) && (bcnt == 0) && (dwc2->gsnpsid >= DWC2_CORE_REV_3_00a))
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{
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{
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if (epout->doepint & DOEPINT_STPKTRX)
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uint32_t doepint = epout->doepint;
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{
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// skip this "no-data" transfer complete event
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// STPKTRX will be clear later by setup received handler
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epout->doepint = DOEPINT_XFRC;
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}
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if (epout->doepint & DOEPINT_OTEPSPR)
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if (doepint & (DOEPINT_STPKTRX | DOEPINT_OTEPSPR))
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{
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{
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// skip this "no-data" transfer complete event
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// skip this "no-data" transfer complete event
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epout->doepint = DOEPINT_XFRC | DOEPINT_OTEPSPR;
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// Note: STPKTRX will be clear later by setup received handler
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uint32_t clear_flags = DOEPINT_XFRC;
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if (doepint & DOEPINT_OTEPSPR) clear_flags |= DOEPINT_OTEPSPR;
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epout->doepint = clear_flags;
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// TU_LOG(DWC2_DEBUG, " FIX extra transfer complete on setup/data compete\r\n");
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}
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}
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}
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}
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break;
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break;
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@ -1163,8 +1165,6 @@ void dcd_int_handler(uint8_t rhport)
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uint32_t const int_status = dwc2->gintsts & dwc2->gintmsk;
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uint32_t const int_status = dwc2->gintsts & dwc2->gintmsk;
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// TU_LOG_HEX(DWC2_DEBUG, int_status);
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if(int_status & GINTSTS_USBRST)
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if(int_status & GINTSTS_USBRST)
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{
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{
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// USBRST is start of reset.
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// USBRST is start of reset.
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