- addd p_qtd_list_tail to qhd structure for easy queue TD
- move control_request from ehci_data to usbh_device_info_pool - add test for bulk transfer double (2 consecutive xfers) - use table (array) structure for class driver, currently included - refractor extract to function insert_qtd_to_qhd + init function + install_subtask --> all class driver function must be declared with WEAK
This commit is contained in:
hathach
parent
b146730306
commit
b1db85dedf
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@ -114,6 +114,7 @@ void verify_open_qhd(ehci_qhd_t *p_qhd, uint8_t endpoint_addr, uint16_t max_pack
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//------------- HCD -------------//
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TEST_ASSERT(p_qhd->used);
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TEST_ASSERT_NULL(p_qhd->p_qtd_list_head);
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TEST_ASSERT_NULL(p_qhd->p_qtd_list_tail);
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}
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//--------------------------------------------------------------------+
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@ -59,6 +59,7 @@ uint8_t const hub_port = 2;
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uint8_t dev_addr;
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uint8_t hostid;
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uint8_t xfer_data [18000]; // 18K to test buffer pointer list
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uint8_t data2[100];
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ehci_qhd_t *async_head;
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ehci_qhd_t *p_qhd_bulk;
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@ -128,9 +129,11 @@ void verify_qtd(ehci_qtd_t *p_qtd, uint8_t p_data[], uint16_t length)
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TEST_ASSERT_FALSE(p_qtd->halted);
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TEST_ASSERT_TRUE(p_qtd->active);
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TEST_ASSERT_FALSE(p_qtd->data_toggle);
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TEST_ASSERT_EQUAL(3, p_qtd->cerr);
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TEST_ASSERT_EQUAL(0, p_qtd->current_page);
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TEST_ASSERT_EQUAL(length, p_qtd->total_bytes);
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TEST_ASSERT_TRUE(p_qtd->used);
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TEST_ASSERT_EQUAL_HEX( p_data, p_qtd->buffer[0] );
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for(uint8_t i=1; i<5; i++)
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@ -149,24 +152,29 @@ void test_bulk_xfer(void)
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TEST_ASSERT_NOT_NULL(p_qtd);
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verify_qtd( p_qtd, xfer_data, sizeof(xfer_data));
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TEST_ASSERT_TRUE(p_qtd->used);
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TEST_ASSERT_EQUAL_HEX(p_qhd_bulk->qtd_overlay.next.address, p_qtd);
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TEST_ASSERT_TRUE(p_qtd->next.terminate);
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TEST_ASSERT_EQUAL(EHCI_PID_IN, p_qtd->pid);
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TEST_ASSERT_TRUE(p_qtd->int_on_complete);
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TEST_ASSERT_FALSE(p_qtd->data_toggle);
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}
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void test_bulk_xfer_double(void)
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{
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uint8_t data2[100];
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//------------- Code Under Test -------------//
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hcd_pipe_xfer(pipe_hdl_bulk, xfer_data, sizeof(xfer_data));
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hcd_pipe_xfer(pipe_hdl_bulk, data2, sizeof(data2));
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ehci_qtd_t* p_qtd = p_qhd_bulk->p_qtd_list_head;
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TEST_ASSERT_NOT_NULL(p_qtd);
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ehci_qtd_t* p_head = p_qhd_bulk->p_qtd_list_head;
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ehci_qtd_t* p_tail = p_qhd_bulk->p_qtd_list_head;
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TEST_ASSERT_FALSE(p_qtd->next.terminate);
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//------------- list head -------------//
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TEST_ASSERT_NOT_NULL(p_head);
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verify_qtd(p_head, xfer_data, sizeof(xfer_data));
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TEST_ASSERT_EQUAL_HEX(p_qhd_bulk->qtd_overlay.next.address, p_head);
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TEST_ASSERT_EQUAL(EHCI_PID_IN, p_head->pid);
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TEST_ASSERT_FALSE(p_head->next.terminate);
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TEST_ASSERT_FALSE(p_head->int_on_complete);
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//------------- list tail -------------//
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}
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@ -162,7 +162,7 @@ void test_control_addr0_xfer_get_check_qhd_qtd_mapping(void)
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TEST_ASSERT_EQUAL_HEX( p_status , p_data->next.address );
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TEST_ASSERT_TRUE( p_status->next.terminate );
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verify_qtd(p_setup, &ehci_data.control_request[0], 8);
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verify_qtd(p_setup, &usbh_device_info_pool[0].control_request, 8);
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}
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@ -181,7 +181,7 @@ void test_control_xfer_get(void)
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TEST_ASSERT_TRUE( p_status->next.terminate );
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//------------- SETUP -------------//
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uint8_t* p_request = (uint8_t *) &ehci_data.control_request[dev_addr];
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uint8_t* p_request = (uint8_t *) &usbh_device_info_pool[dev_addr].control_request;
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verify_qtd(p_setup, p_request, 8);
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TEST_ASSERT_EQUAL_MEMORY(&request_get_dev_desc, p_request, sizeof(tusb_std_request_t));
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@ -90,6 +90,13 @@ uint8_t tusbh_hid_keyboard_no_instances(tusb_handle_device_t const device_hdl)
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//--------------------------------------------------------------------+
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// CLASS-USBD API (don't require to verify parameters)
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//--------------------------------------------------------------------+
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void hidh_init(void)
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{
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#if TUSB_CFG_HOST_HID_KEYBOARD
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hidh_keyboard_init();
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#endif
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}
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void hidh_keyboard_init(void)
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{
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memclr_(&keyboard_info_pool, sizeof(class_hid_keyboard_info_t)*TUSB_CFG_HOST_DEVICE_MAX);
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@ -84,19 +84,11 @@ typedef struct {
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void hidh_keyboard_init(void);
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tusb_error_t hidh_keyboard_install(uint8_t dev_addr, uint8_t const *descriptor) ATTR_WARN_UNUSED_RESULT;
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#ifndef _TEST_
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static inline void hidh_init(void) ATTR_ALWAYS_INLINE;
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static inline void hidh_init(void)
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{
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#if TUSB_CFG_HOST_HID_KEYBOARD
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hidh_keyboard_init();
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#endif
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}
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#else
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void hidh_init(void);
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#endif
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tusb_error_t hidh_install_subtask(uint8_t dev_addr, uint8_t const *descriptor, uint16_t *p_length) ATTR_WARN_UNUSED_RESULT;
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//--------------------------------------------------------------------+
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// CLASS DRIVER FUNCTION (all declared with WEAK)
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//--------------------------------------------------------------------+
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void hidh_init(void) ATTR_WEAK;
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tusb_error_t hidh_install_subtask(uint8_t dev_addr, uint8_t const *descriptor, uint16_t *p_length) ATTR_WEAK ATTR_WARN_UNUSED_RESULT;
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#endif
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@ -136,6 +136,8 @@ typedef enum {
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TUSB_CLASS_PERSONAL_HEALTHCARE = 15 , ///< 15
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TUSB_CLASS_AUDIO_VIDEO = 16 , ///< 16
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TUSB_CLASS_MAX_CONSEC_NUMBER = 17 , // TODO compact & minimize this number
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TUSB_CLASS_DIAGNOSTIC = 0xDC ,
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TUSB_CLASS_WIRELESS_CONTROLLER = 0xE0 ,
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TUSB_CLASS_MISC = 0xEF ,
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@ -273,10 +273,10 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
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queue_head_init(p_qhd, dev_addr, max_packet_size, 0, TUSB_XFER_CONTROL);
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//------------- insert to async list -------------//
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// TODO might need to to disable async list first
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if (dev_addr != 0)
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{
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//------------- insert to async list -------------//
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// TODO might need to to disable async list first
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list_insert( (ehci_link_t*) get_async_head(usbh_device_info_pool[dev_addr].core_id),
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(ehci_link_t*) p_qhd, EHCI_QUEUE_ELEMENT_QHD);
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}
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@ -351,6 +351,7 @@ tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const *
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tusb_error_t hcd_pipe_control_close(uint8_t dev_addr)
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{
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//------------- TODO pipe handle validate -------------//
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ehci_qhd_t * const p_qhd = get_control_qhd(dev_addr);
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p_qhd->qtd_overlay.halted = 1;
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@ -400,9 +401,24 @@ pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const *
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return (pipe_handle_t) { .dev_addr = dev_addr, .xfer_type = p_endpoint_desc->bmAttributes.xfer, .index = index};
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}
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static inline void insert_qtd_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new) ATTR_ALWAYS_INLINE;
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static inline void insert_qtd_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new)
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{
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if (p_qhd->p_qtd_list_head == NULL) // empty list
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{
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p_qhd->p_qtd_list_head = p_qhd->p_qtd_list_tail = p_qtd_new;
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p_qhd->qtd_overlay.next.address = (uint32_t) p_qhd->p_qtd_list_head;
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}else
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{
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p_qhd->p_qtd_list_tail->next.address = (uint32_t) p_qtd_new;
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p_qhd->p_qtd_list_tail = p_qtd_new;
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}
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}
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes)
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{
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//------------- pipe handle validate -------------//
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//------------- TODO pipe handle validate -------------//
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//------------- find a free qtd -------------//
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uint8_t index=0;
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@ -413,16 +429,15 @@ tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t t
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ASSERT( index < EHCI_MAX_QTD, TUSB_ERROR_EHCI_NOT_ENOUGH_QTD);
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//------------- set up QTD -------------//
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ehci_qhd_t *p_qhd = &ehci_data.device[pipe_hdl.dev_addr].qhd[index];
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ehci_qhd_t *p_qhd = &ehci_data.device[pipe_hdl.dev_addr].qhd[pipe_hdl.index];
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ehci_qtd_t *p_qtd = &ehci_data.device[pipe_hdl.dev_addr].qtd[index];
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queue_td_init(p_qtd, (uint32_t) buffer, total_bytes);
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p_qtd->pid = p_qhd->pid_non_control;
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p_qtd->int_on_complete = 1;
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p_qhd->p_qtd_list_head = p_qtd;
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p_qhd->qtd_overlay.next.address = (uint32_t) p_qtd;
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//------------- insert TD to TD list -------------//
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insert_qtd_to_qhd(p_qhd, p_qtd);
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return TUSB_ERROR_NONE;
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}
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@ -445,7 +460,7 @@ static inline ehci_qtd_t* get_control_qtds(uint8_t dev_addr)
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static inline tusb_std_request_t* const get_control_request_ptr(uint8_t dev_addr)
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{
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return &ehci_data.control_request[dev_addr];
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return &usbh_device_info_pool[dev_addr].control_request;
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}
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// TODO subject to pure function
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@ -483,7 +498,8 @@ static void queue_head_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_pa
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//------------- HCD Management Data -------------//
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p_qhd->used = 1;
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p_qhd->p_qtd_list_head = NULL;
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p_qhd->p_qtd_list_head = NULL;
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p_qhd->p_qtd_list_tail = NULL;
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p_qhd->pid_non_control = (endpoint_addr & 0x80) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint
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}
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@ -201,10 +201,10 @@ typedef struct {
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uint8_t list_index;
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uint8_t reserved;
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ehci_qtd_t *p_qtd_list_head; // head of the TD list scheduled
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ehci_qtd_t *p_qtd_list_head; // head of the scheduled TD list
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ehci_qtd_t *p_qtd_list_tail; // tail of the scheduled TD list
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uint32_t reserved_2;
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volatile uint32_t status; // TODO will remove volatile after remove all HcdQHD function
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uint16_t *pActualTransferCount; /* total transferred bytes of a usb request */
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}ATTR_ALIGNED(32) ehci_qhd_t;
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/// Highspeed Isochronous Transfer Descriptor (section 3.3)
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@ -440,8 +440,7 @@ typedef struct {
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ehci_qhd_t async_head[CONTROLLER_HOST_NUMBER]; /// head qhd of async list, also is used as control endpoint for address 0
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ehci_qhd_t period_head[CONTROLLER_HOST_NUMBER];
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//------------- Data for Address 0 -------------//
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// qhd: addr0 use async head (dummy) as Queue Head
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//------------- Data for Address 0 (use async head as its queue head) -------------//
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ehci_qtd_t addr0_qtd[3];
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struct {
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@ -450,13 +449,11 @@ typedef struct {
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ehci_qtd_t qtd[3];
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}control;
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ehci_qhd_t qhd[EHCI_MAX_QHD] ; ///< Queue Head Pool
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ehci_qtd_t qtd[EHCI_MAX_QTD] ; ///< Queue Element Transfer Pool
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// ehci_itd_t itd[EHCI_MAX_ITD] ; ///< Iso Transfer Pool
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// ehci_sitd_t sitd[EHCI_MAX_SITD] ; ///< Split (FS) Isochronous Transfer Pool
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ehci_qhd_t qhd[EHCI_MAX_QHD] ; ///< Queue Head Pool
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ehci_qtd_t qtd[EHCI_MAX_QTD] ATTR_ALIGNED(32) ; ///< Queue Element Transfer Pool
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// ehci_itd_t itd[EHCI_MAX_ITD] ; ///< Iso Transfer Pool
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// ehci_sitd_t sitd[EHCI_MAX_SITD] ; ///< Split (FS) Isochronous Transfer Pool
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}device[TUSB_CFG_HOST_DEVICE_MAX];
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tusb_std_request_t control_request[TUSB_CFG_HOST_DEVICE_MAX+1]; // including address zero, 32-byte alignment breaker
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}ehci_data_t;
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#ifdef __cplusplus
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@ -52,11 +52,24 @@
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//--------------------------------------------------------------------+
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#define ENUM_QUEUE_DEPTH 5
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// TODO fix number of class driver
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class_driver_t const class_host_drivers[TUSB_CLASS_MAX_CONSEC_NUMBER] =
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{
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[TUSB_CLASS_HID] = {
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.init = hidh_init,
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.install_subtask = hidh_install_subtask
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},
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[TUSB_CLASS_MSC] = {
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.init = msch_init,
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.install_subtask = msch_install_subtask
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}
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};
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//--------------------------------------------------------------------+
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// INTERNAL OBJECT & FUNCTION DECLARATION
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//--------------------------------------------------------------------+
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usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1]; // including zero-address
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usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1] TUSB_CFG_ATTR_USBRAM; // including zero-address
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//------------- Enumeration Task Data -------------//
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OSAL_TASK_DEF(enum_task, usbh_enumeration_task, 128, OSAL_PRIO_HIGH);
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@ -94,9 +107,11 @@ tusb_error_t usbh_init(void)
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ASSERT_PTR(enum_queue_hdl, TUSB_ERROR_OSAL_QUEUE_FAILED);
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//------------- class init -------------//
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#if HOST_CLASS_HID
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hidh_init();
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#endif
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for (uint8_t class_code = 1; class_code < TUSB_CLASS_MAX_CONSEC_NUMBER; class_code++)
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{
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if (class_host_drivers[class_code].init)
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class_host_drivers[class_code].init();
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}
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return TUSB_ERROR_NONE;
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}
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@ -108,7 +123,9 @@ tusb_error_t usbh_control_xfer_subtask(uint8_t dev_addr, tusb_std_request_t cons
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OSAL_SUBTASK_BEGIN
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usbh_device_info_pool[dev_addr].control_request = *p_request;
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(void) hcd_pipe_control_xfer(dev_addr, p_request, data);
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osal_semaphore_wait(usbh_device_info_pool[dev_addr].sem_hdl, OSAL_TIMEOUT_NORMAL, &error); // careful of local variable without static
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SUBTASK_ASSERT_STATUS_WITH_HANDLER(error, tusbh_device_mount_failed_cb(TUSB_ERROR_USBH_MOUNT_DEVICE_NOT_RESPOND, NULL) );
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@ -242,7 +259,7 @@ OSAL_TASK_DECLARE(usbh_enumeration_task)
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// update configuration info
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usbh_device_info_pool[new_addr].interface_count = ((tusb_descriptor_configuration_t*) enum_data_buffer)->bNumInterfaces;
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//------------- parse configuration -------------//
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//------------- parse configuration & install drivers -------------//
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p_desc = enum_data_buffer + sizeof(tusb_descriptor_configuration_t);
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// parse each interfaces
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@ -250,21 +267,20 @@ OSAL_TASK_DECLARE(usbh_enumeration_task)
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{
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TASK_ASSERT( TUSB_DESC_INTERFACE == ((tusb_descriptor_interface_t*) p_desc)->bDescriptorType ); // TODO should we skip this descriptor and advance
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// NOTE: cannot use switch (conflicted with OSAL_NONE task)
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if (TUSB_CLASS_UNSPECIFIED == ((tusb_descriptor_interface_t*) p_desc)->bInterfaceClass)
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uint8_t class_code = ((tusb_descriptor_interface_t*) p_desc)->bInterfaceClass;
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if (class_code == 0)
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{
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TASK_ASSERT( false ); // corrupted data
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}
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#if HOST_CLASS_HID
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else if ( TUSB_CLASS_HID == ((tusb_descriptor_interface_t*) p_desc)->bInterfaceClass)
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TASK_ASSERT( false ); // corrupted data, abort enumeration
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} else if ( class_code < TUSB_CLASS_MAX_CONSEC_NUMBER)
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{
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uint16_t length;
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OSAL_SUBTASK_INVOKED_AND_WAIT ( hidh_install_subtask(new_addr, p_desc, &length) );
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p_desc += length;
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}
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#endif
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// unsupported class
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else
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if ( class_host_drivers[class_code].install_subtask )
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{
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uint16_t length;
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OSAL_SUBTASK_INVOKED_AND_WAIT ( // parameters in task/sub_task must be static storage (static or global)
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class_host_drivers[ ((tusb_descriptor_interface_t*) p_desc)->bInterfaceClass ].install_subtask(new_addr, p_desc, &length) );
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p_desc += length;
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}
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} else // unsupported class (not enable or yet implemented)
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{
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do
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{
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@ -63,6 +63,36 @@
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//--------------------------------------------------------------------+
|
||||
// MACRO CONSTANT TYPEDEF
|
||||
//--------------------------------------------------------------------+
|
||||
#define CLASS_TABLE(ENTRY_EXPANDER) \
|
||||
ENTRY_EXPANDER(TUSB_CLASS_AUDIO)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_CDC)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_HID)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_PHYSICAL)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_IMAGE)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_PRINTER)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_MSC)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_HUB)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_CDC_DATA)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_SMART_CARD)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_CONTENT_SECURITY)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_VIDEO)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_PERSONAL_HEALTHCARE)\
|
||||
ENTRY_EXPANDER(TUSB_CLASS_AUDIO_VIDEO)\
|
||||
|
||||
#define CLASS_LOOKUP_EXPAND(class_code)
|
||||
|
||||
#define CLASS_LOOKUP_INIT_FUNCTION(class_code)\
|
||||
|
||||
#define CLASS_EXPANDER_INIT(class_code)\
|
||||
|
||||
|
||||
|
||||
// TUSB_CLASS_DIAGNOSTIC = 0xDC ,
|
||||
// TUSB_CLASS_WIRELESS_CONTROLLER = 0xE0 ,
|
||||
// TUSB_CLASS_MISC = 0xEF ,
|
||||
// TUSB_CLASS_APPLICATION_SPECIFIC = 0xEF ,
|
||||
// TUSB_CLASS_VENDOR_SPECIFIC = 0xFF
|
||||
|
||||
enum {
|
||||
TUSB_FLAGS_CLASS_UNSPECIFIED = BIT_(0) , ///< 0
|
||||
TUSB_FLAGS_CLASS_AUDIO = BIT_(1) , ///< 1
|
||||
|
|
@ -119,6 +149,10 @@ typedef uint32_t tusbh_flag_class_t;
|
|||
typedef uint32_t tusb_handle_device_t;
|
||||
typedef uint8_t tusbh_device_status_t;
|
||||
|
||||
typedef struct {
|
||||
void (* const init) (void);
|
||||
tusb_error_t (* const install_subtask)(uint8_t, uint8_t const *, uint16_t*);
|
||||
} class_driver_t;
|
||||
//--------------------------------------------------------------------+
|
||||
// INTERNAL OBJECT & FUNCTION DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
|
|
|
|||
|
|
@ -80,7 +80,7 @@ typedef struct { // TODO internal structure, re-order members
|
|||
//------------- device descriptor info -------------//
|
||||
uint16_t vendor_id;
|
||||
uint16_t product_id;
|
||||
uint8_t configure_count; // bNumConfigurations alias
|
||||
uint8_t configure_count; // bNumConfigurations alias
|
||||
|
||||
//------------- configuration descriptor info -------------//
|
||||
uint8_t interface_count; // bNumInterfaces alias
|
||||
|
|
@ -88,7 +88,7 @@ typedef struct { // TODO internal structure, re-order members
|
|||
uint8_t status; // value from enum tusbh_device_status_
|
||||
|
||||
// pipe_handle_t pipe_control; NOTE: use device address/handle instead
|
||||
tusb_std_request_t request_control;
|
||||
tusb_std_request_t control_request;
|
||||
OSAL_SEM_DEF(semaphore);
|
||||
osal_semaphore_handle_t sem_hdl;
|
||||
|
||||
|
|
|
|||
|
|
@ -58,6 +58,12 @@
|
|||
#ifdef HOST_CLASS_HID
|
||||
#include "class/hid_host.h"
|
||||
#endif
|
||||
|
||||
#define HOST_CLASS_MSC
|
||||
#ifdef HOST_CLASS_MSC
|
||||
#include "class/msc_host.h"
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#if MODE_DEVICE_SUPPORTED
|
||||
|
|
|
|||
Loading…
Reference in New Issue