stm32fsdev: dynamic allocation of PMA.
This commit is contained in:
Nathan Conrad
parent
16f65890eb
commit
b0270f499b
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@ -63,10 +63,7 @@
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* Current driver limitations (i.e., a list of features for you to add):
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* - STALL handled, but not tested.
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* - Does it work? No clue.
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* - All EP BTABLE buffers are created as fixed 64 bytes.
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* - Smaller can be requested:
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* - Must be a multiple of 8 bytes
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* - All EP must have identical buffer size.
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* - All EP BTABLE buffers are created based on max packet size of first EP opened with that address.
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* - No isochronous endpoints
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* - Endpoint index is the ID of the endpoint
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* - This means that priority is given to endpoints with lower ID numbers
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@ -76,7 +73,6 @@
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* - DMA may be the best choice, but it could also be pushed to the USBD task.
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* - No double-buffering
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* - No DMA
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* - No provision to control the D+ pull-up using GPIO on devices without an internal pull-up.
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* - Minimal error handling
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* - Perhaps error interrupts should be reported to the stack, or cause a device reset?
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* - Assumes a single USB peripheral; I think that no hardware has multiple so this is fine.
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@ -135,11 +131,7 @@
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// HW supports max of 8 bidirectional endpoints, but this can be reduced to save RAM
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// (8u here would mean 8 IN and 8 OUT)
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#ifndef MAX_EP_COUNT
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# if (PMA_LENGTH == 512U)
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# define MAX_EP_COUNT 3U
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# else
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# define MAX_EP_COUNT 7U
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# endif
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# define MAX_EP_COUNT 8U
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#endif
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// If sharing with CAN, one can set this to be non-zero to give CAN space where it wants it
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@ -152,11 +144,6 @@
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# define DCD_STM32_BTABLE_LENGTH (PMA_LENGTH - DCD_STM32_BTABLE_BASE)
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#endif
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// Below is used by the static PMA allocator
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#ifndef DCD_STM32_PMA_ALLOC_SIZE
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# define DCD_STM32_PMA_ALLOC_SIZE 64U
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#endif
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/***************************************************
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* Checks, structs, defines, function definitions, etc.
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*/
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@ -168,21 +155,15 @@ TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) + (DCD_STM32_BTABLE_LENGTH))<=(PMA_LEN
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TU_VERIFY_STATIC(((DCD_STM32_BTABLE_BASE) % 8) == 0, "BTABLE base must be aligned to 8 bytes");
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// With static allocation of 64 bytes per endpoint, ensure there is enough packet buffer space
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// 8 bytes are required for control data for each EP.
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TU_VERIFY_STATIC(((MAX_EP_COUNT*2u*DCD_STM32_PMA_ALLOC_SIZE + 8*MAX_EP_COUNT) <= DCD_STM32_BTABLE_LENGTH), "Packed buffer not long enough for count of endpoints");
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TU_VERIFY_STATIC((DCD_STM32_PMA_ALLOC_SIZE % 8) == 0, "Packet buffer allocation must be a multiple of 8 bytes");
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TU_VERIFY_STATIC(CFG_TUD_ENDPOINT0_SIZE <= DCD_STM32_PMA_ALLOC_SIZE,"EP0 size is more than PMA allocation size");
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// One of these for every EP IN & OUT, uses a bit of RAM....
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typedef struct
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{
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uint8_t * buffer;
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uint16_t total_len;
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uint16_t queued_len;
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uint16_t max_packet_size;
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uint16_t pma_ptr;
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uint8_t max_packet_size;
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uint8_t pma_alloc_size;
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} xfer_ctl_t;
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static xfer_ctl_t xfer_status[MAX_EP_COUNT][2];
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@ -196,14 +177,19 @@ static TU_ATTR_ALIGNED(4) uint32_t _setup_packet[6];
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static uint8_t remoteWakeCountdown; // When wake is requested
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// EP Buffers assigned from end of memory location, to minimize their chance of crashing
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// into the stack.
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static void dcd_handle_bus_reset(void);
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static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes);
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static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes);
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static void dcd_transmit_packet(xfer_ctl_t * xfer, uint16_t ep_ix);
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static void dcd_ep_ctr_handler(void);
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// PMA allocation/access
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static uint8_t open_ep_count;
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static uint16_t ep_buf_ptr; ///< Points to first free memory location
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static void dcd_pma_alloc_reset(void);
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static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length);
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static void dcd_pma_free(uint8_t ep_addr);
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static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, size_t wNBytes);
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static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, size_t wNBytes);
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// Using a function due to better type checks
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// This seems better than having to do type casts everywhere else
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@ -237,7 +223,7 @@ void dcd_init (uint8_t rhport)
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asm("NOP");
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}
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USB->CNTR = 0; // Enable USB
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USB->BTABLE = DCD_STM32_BTABLE_BASE;
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reg16_clear_bits(&USB->ISTR, USB_ISTR_ALL_EVENTS); // Clear pending interrupts
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@ -249,12 +235,6 @@ void dcd_init (uint8_t rhport)
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pcd_set_endpoint(USB,i,0u);
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}
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// Initialize the BTABLE for EP0 at this point (though setting up the EP0R is unneeded)
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// This is actually not necessary, but helps debugging to start with a blank RAM area
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for(uint32_t i=0;i<(DCD_STM32_BTABLE_LENGTH>>1); i++)
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{
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pma[PMA_STRIDE*(DCD_STM32_BTABLE_BASE + i)] = 0u;
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}
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USB->CNTR |= USB_CNTR_RESETM | USB_CNTR_SOFM | USB_CNTR_ESOFM | USB_CNTR_CTRM | USB_CNTR_SUSPM | USB_CNTR_WKUPM;
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dcd_handle_bus_reset();
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@ -386,6 +366,7 @@ static void dcd_handle_bus_reset(void)
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pcd_set_endpoint(USB,i,0u);
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}
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dcd_pma_alloc_reset();
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dcd_edpt_open (0, &ep0OUT_desc);
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dcd_edpt_open (0, &ep0IN_desc);
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@ -609,28 +590,85 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * re
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}
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}
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static void dcd_pma_alloc_reset(void)
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{
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ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8*MAX_EP_COUNT; // 8 bytes per endpoint (two TX and two RX words, each)
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//TU_LOG2("dcd_pma_alloc_reset()\r\n");
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for(uint32_t i=0; i<MAX_EP_COUNT; i++)
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{
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xfer_ctl_ptr(i,TUSB_DIR_OUT)->pma_alloc_size = 0U;
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xfer_ctl_ptr(i,TUSB_DIR_IN)->pma_alloc_size = 0U;
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xfer_ctl_ptr(i,TUSB_DIR_OUT)->pma_ptr = 0U;
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xfer_ctl_ptr(i,TUSB_DIR_IN)->pma_ptr = 0U;
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}
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}
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/***
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* Allocate a section of PMA
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* Currently statitically allocates 64 bytes for each EP.
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*
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* stm32fsdev have 512 or 1024 bytes of packet RAM, and support 16 EP (8 in and 8 out),
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* Static checks above have verified that there is enough packet memory space, so
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* this should NEVER fail.
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* If the EP number has already been allocated, and the new allocation
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* is larger than the old allocation, then this will fail with a TU_ASSERT.
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* (This is done to simplify the code. More complicated algorithms could be used)
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*
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* During failure, TU_ASSERT is used. If this happens, rework/reallocate memory manually.
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*/
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static uint16_t dcd_pma_alloc(uint8_t ep_addr, size_t length)
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{
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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xfer_ctl_t* epXferCtl = xfer_ctl_ptr(epnum,dir);
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(void)length;
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if(epXferCtl->pma_alloc_size != 0U)
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{
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//TU_LOG2("dcd_pma_alloc(%x,%x)=%x (cached)\r\n",ep_addr,length,epXferCtl->pma_ptr);
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// Previously allocated
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TU_ASSERT(length <= epXferCtl->pma_alloc_size, 0xFFFF); // Verify no larger than previous alloc
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return epXferCtl->pma_ptr;
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}
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TU_ASSERT(length <= DCD_STM32_PMA_ALLOC_SIZE);
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uint16_t addr = ep_buf_ptr;
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ep_buf_ptr = (uint16_t)(ep_buf_ptr + length); // increment buffer pointer
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// Verify no overflow
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TU_ASSERT(ep_buf_ptr <= PMA_LENGTH, 0xFFFF);
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epXferCtl->pma_ptr = addr;
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epXferCtl->pma_alloc_size = length;
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//TU_LOG2("dcd_pma_alloc(%x,%x)=%x\r\n",ep_addr,length,addr);
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uint16_t addr = DCD_STM32_BTABLE_BASE + 8*MAX_EP_COUNT; // Each EP needs 8 bytes to store control data
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addr += ((2*epnum + dir) * DCD_STM32_PMA_ALLOC_SIZE);
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return addr;
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}
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/***
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* Free a block of PMA space
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*/
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static void dcd_pma_free(uint8_t ep_addr)
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{
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uint8_t const epnum = tu_edpt_number(ep_addr);
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uint8_t const dir = tu_edpt_dir(ep_addr);
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// Presently, this should never be called for EP0 IN/OUT
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TU_ASSERT(open_ep_count > 2, /**/);
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TU_ASSERT(xfer_ctl_ptr(epnum,dir)->max_packet_size != 0, /**/);
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open_ep_count--;
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// If count is 2, only EP0 should be open, so allocations can be mostly reset.
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if(open_ep_count == 2)
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{
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ep_buf_ptr = DCD_STM32_BTABLE_BASE + 8*MAX_EP_COUNT + 2*CFG_TUD_ENDPOINT0_SIZE; // 8 bytes per endpoint (two TX and two RX words, each), and EP0
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// Skip EP0
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for(uint32_t i=1; i<MAX_EP_COUNT; i++)
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{
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xfer_ctl_ptr(i,TUSB_DIR_OUT)->pma_alloc_size = 0U;
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xfer_ctl_ptr(i,TUSB_DIR_IN)->pma_alloc_size = 0U;
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xfer_ctl_ptr(i,TUSB_DIR_OUT)->pma_ptr = 0U;
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xfer_ctl_ptr(i,TUSB_DIR_IN)->pma_ptr = 0U;
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}
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}
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}
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// The STM32F0 doesn't seem to like |= or &= to manipulate the EP#R registers,
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// so I'm using the #define from HAL here, instead.
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@ -640,28 +678,30 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
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uint8_t const epnum = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
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uint8_t const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
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const uint16_t epMaxPktSize = p_endpoint_desc->wMaxPacketSize.size;
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uint16_t pma_addr;
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uint32_t wType;
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// Isochronous not supported (yet), and some other driver assumptions.
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TU_ASSERT(p_endpoint_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS);
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TU_ASSERT(epnum < MAX_EP_COUNT);
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// Set type
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switch(p_endpoint_desc->bmAttributes.xfer) {
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case TUSB_XFER_CONTROL:
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pcd_set_eptype(USB, epnum, USB_EP_CONTROL);
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wType = USB_EP_CONTROL;
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break;
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#if (0)
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case TUSB_XFER_ISOCHRONOUS: // FIXME: Not yet supported
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pcd_set_eptype(USB, epnum, USB_EP_ISOCHRONOUS); break;
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wType = USB_EP_ISOCHRONOUS;
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break;
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#endif
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case TUSB_XFER_BULK:
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pcd_set_eptype(USB, epnum, USB_EP_BULK);
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wType = USB_EP_CONTROL;
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break;
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case TUSB_XFER_INTERRUPT:
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pcd_set_eptype(USB, epnum, USB_EP_INTERRUPT);
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wType = USB_EP_INTERRUPT;
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break;
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default:
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@ -669,21 +709,24 @@ bool dcd_edpt_open (uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc
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return false;
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}
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pcd_set_eptype(USB, epnum, wType);
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pcd_set_ep_address(USB, epnum, epnum);
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// Be normal, for now, instead of only accepting zero-byte packets (on control endpoint)
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// or being double-buffered (bulk endpoints)
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pcd_clear_ep_kind(USB,0);
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pma_addr = dcd_pma_alloc(p_endpoint_desc->bEndpointAddress, p_endpoint_desc->wMaxPacketSize.size);
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if(dir == TUSB_DIR_IN)
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{
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*pcd_ep_tx_address_ptr(USB, epnum) = dcd_pma_alloc(p_endpoint_desc->bEndpointAddress, p_endpoint_desc->wMaxPacketSize.size);
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*pcd_ep_tx_address_ptr(USB, epnum) = pma_addr;
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pcd_set_ep_tx_cnt(USB, epnum, p_endpoint_desc->wMaxPacketSize.size);
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pcd_clear_tx_dtog(USB, epnum);
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pcd_set_ep_tx_status(USB,epnum,USB_EP_TX_NAK);
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}
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else
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{
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*pcd_ep_rx_address_ptr(USB, epnum) = dcd_pma_alloc(p_endpoint_desc->bEndpointAddress, p_endpoint_desc->wMaxPacketSize.size);
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*pcd_ep_rx_address_ptr(USB, epnum) = pma_addr;
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pcd_set_ep_rx_cnt(USB, epnum, p_endpoint_desc->wMaxPacketSize.size);
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pcd_clear_rx_dtog(USB, epnum);
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pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_NAK);
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@ -707,10 +750,6 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
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uint32_t const epnum = tu_edpt_number(ep_addr);
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uint32_t const dir = tu_edpt_dir(ep_addr);
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#ifndef NDEBUG
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TU_ASSERT(epnum < MAX_EP_COUNT, /**/);
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#endif
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if(dir == TUSB_DIR_IN)
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{
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pcd_set_ep_tx_status(USB,epnum,USB_EP_TX_DIS);
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@ -719,6 +758,8 @@ void dcd_edpt_close (uint8_t rhport, uint8_t ep_addr)
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{
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pcd_set_ep_rx_status(USB, epnum, USB_EP_RX_DIS);
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}
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dcd_pma_free(ep_addr);
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}
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// Currently, single-buffered, and only 64 bytes at a time (max)
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