add hcd attr, add note for ehci framelist on NXP derivative

src/host/hcd.h

@@ -30,6 +30,7 @@
 #include "common/tusb_common.h"
 #include "osal/osal.h"
 #include "common/tusb_fifo.h"
+#include "hcd_attr.h"
 
 #ifdef __cplusplus
  extern "C" {
@@ -62,6 +63,7 @@ typedef struct
     struct {
       uint8_t hub_addr;
       uint8_t hub_port;
+      uint8_t speed;
     } connection;
 
     // XFER_COMPLETE
@@ -140,7 +142,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
 bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr);
 
 //--------------------------------------------------------------------+
-// Event API (implemented by stack)
+// USBH implemented API
 //--------------------------------------------------------------------+
 
 // Called by HCD to notify stack

src/host/hcd_attr.h

@@ -0,0 +1,104 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_HCD_ATTR_H_
+#define TUSB_HCD_ATTR_H_
+
+#include "tusb_option.h"
+
+// Attribute includes
+// - ENDPOINT_MAX: max (logical) number of endpoint
+// - PORT_HIGHSPEED: mask to indicate which port support highspeed mode, bit0 for port0 and so on.
+
+//------------- NXP -------------//
+#if TU_CHECK_MCU(LPC175X_6X) || TU_CHECK_MCU(LPC177X_8X) || TU_CHECK_MCU(LPC40XX)
+
+#elif TU_CHECK_MCU(LPC18XX) || TU_CHECK_MCU(LPC43XX)
+  #define HCD_ATTR_EHCI_TRANSDIMENSION
+
+#elif TU_CHECK_MCU(LPC54XXX)
+  // #define HCD_ATTR_EHCI_NXP_PTD
+
+#elif TU_CHECK_MCU(LPC55XX)
+  // #define HCD_ATTR_EHCI_NXP_PTD
+
+#elif TU_CHECK_MCU(MIMXRT10XX)
+  #define HCD_ATTR_EHCI_TRANSDIMENSION
+
+#elif TU_CHECK_MCU(MKL25ZXX)
+
+//------------- Microchip -------------//
+#elif TU_CHECK_MCU(SAMD21) || TU_CHECK_MCU(SAMD51) || TU_CHECK_MCU(SAME5X) || \
+      TU_CHECK_MCU(SAMD11) || TU_CHECK_MCU(SAML21) || TU_CHECK_MCU(SAML22)
+
+#elif TU_CHECK_MCU(SAMG)
+
+#elif TU_CHECK_MCU(SAMX7X)
+
+//------------- ST -------------//
+#elif TU_CHECK_MCU(STM32F0) || TU_CHECK_MCU(STM32F1) || TU_CHECK_MCU(STM32F3) || \
+      TU_CHECK_MCU(STM32L0) || TU_CHECK_MCU(STM32L1) || TU_CHECK_MCU(STM32L4)
+
+#elif TU_CHECK_MCU(STM32F2) || TU_CHECK_MCU(STM32F4) || TU_CHECK_MCU(STM32F3)
+
+#elif TU_CHECK_MCU(STM32F7)
+
+#elif TU_CHECK_MCU(STM32H7)
+
+//------------- Sony -------------//
+#elif TU_CHECK_MCU(CXD56)
+
+//------------- Nuvoton -------------//
+#elif TU_CHECK_MCU(NUC505)
+
+//------------- Espressif -------------//
+#elif TU_CHECK_MCU(ESP32S2) || TU_CHECK_MCU(ESP32S3)
+
+//------------- Raspberry Pi -------------//
+#elif TU_CHECK_MCU(RP2040)
+
+//------------- Silabs -------------//
+#elif TU_CHECK_MCU(EFM32GG) || TU_CHECK_MCU(EFM32GG11) || TU_CHECK_MCU(EFM32GG12)
+
+//------------- Renesas -------------//
+#elif TU_CHECK_MCU(RX63X) || TU_CHECK_MCU(RX65X) || TU_CHECK_MCU(RX72N)
+
+//#elif TU_CHECK_MCU(MM32F327X)
+//  #define DCD_ATTR_ENDPOINT_MAX not known yet
+
+//------------- GigaDevice -------------//
+#elif TU_CHECK_MCU(GD32VF103)
+
+#else
+//  #warning "DCD_ATTR_ENDPOINT_MAX is not defined for this MCU, default to 8"
+#endif
+
+// Default to fullspeed if not defined
+//#ifndef PORT_HIGHSPEED
+//  #define DCD_ATTR_PORT_HIGHSPEED 0x00
+//#endif
+
+#endif

src/host/hub.c

@@ -45,8 +45,8 @@ typedef struct
   hub_port_status_response_t port_status;
 } hub_interface_t;
 
-CFG_TUSB_MEM_SECTION static hub_interface_t hub_data[CFG_TUH_DEVICE_MAX];
+CFG_TUSB_MEM_SECTION static hub_interface_t hub_data[CFG_TUH_HUB];
-TU_ATTR_ALIGNED(4) CFG_TUSB_MEM_SECTION static uint8_t _hub_buffer[sizeof(descriptor_hub_desc_t)];
+CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t _hub_buffer[sizeof(descriptor_hub_desc_t)];
 
 #if CFG_TUSB_DEBUG
 static char const* const _hub_feature_str[] =
@@ -144,7 +144,7 @@ bool hub_port_get_status(uint8_t hub_addr, uint8_t hub_port, void* resp, tuh_con
 //--------------------------------------------------------------------+
 void hub_init(void)
 {
-  tu_memclr(hub_data, CFG_TUH_DEVICE_MAX*sizeof(hub_interface_t));
+  tu_memclr(hub_data, sizeof(hub_data));
 }
 
 bool hub_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t max_len)

src/host/usbh.c

@@ -128,7 +128,8 @@ enum { CONFIG_NUM = 1 }; // default to use configuration 1
 
 static bool _usbh_initialized = false;
 
-// including zero-address
+// all devices including hub and zero-address TODO exclude device0 to save space
+// hub address start from CFG_TUH_DEVICE_MAX
 CFG_TUSB_MEM_SECTION usbh_device_t _usbh_devices[CFG_TUH_DEVICE_MAX+1];
 
 // Event queue

src/portable/ehci/ehci.c

@@ -24,11 +24,9 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "common/tusb_common.h"
+#include "host/hcd_attr.h"
 
-#if TUSB_OPT_HOST_ENABLED && \
+#if TUSB_OPT_HOST_ENABLED && defined(HCD_ATTR_EHCI_TRANSDIMENSION)
-   (CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || \
-    CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX )
 
 //--------------------------------------------------------------------+
 // INCLUDE
@@ -47,21 +45,27 @@
 // Debug level of EHCI
 #define EHCI_DBG     2
 
-// Framelist size as small as possible
+// Framelist size as small as possible to save SRAM
-// - Standard EHCI : 256 elements
+#ifdef HCD_ATTR_EHCI_TRANSDIMENSION
-// - NXP Transdimension:  8 elements
+  // NXP Transdimension: 8 elements
-#define	EHCI_CFG_FRAMELIST_SIZE_BITS		7
+  #define FRAMELIST_SIZE_BIT_VALUE      7u
-#define EHCI_FRAMELIST_SIZE             (1024 >> EHCI_CFG_FRAMELIST_SIZE_BITS)
+  #define FRAMELIST_SIZE_USBCMD_VALUE   (((FRAMELIST_SIZE_BIT_VALUE &  3) << EHCI_USBCMD_POS_FRAMELIST_SIZE) | \
-
+                                         ((FRAMELIST_SIZE_BIT_VALUE >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB))
-TU_VERIFY_STATIC(EHCI_CFG_FRAMELIST_SIZE_BITS <= 7, "incorrect value");
+#else
+  // STD EHCI: 256 elements
+  #define FRAMELIST_SIZE_BIT_VALUE      2u
+  #define FRAMELIST_SIZE_USBCMD_VALUE   ((FRAMELIST_SIZE_BIT_VALUE &  3) << EHCI_USBCMD_POS_FRAMELIST_SIZE)
+#endif
 
+#define FRAMELIST_SIZE                  (1024 >> FRAMELIST_SIZE_BIT_VALUE)
 
 typedef struct
 {
-  ehci_link_t period_framelist[EHCI_FRAMELIST_SIZE];
+  ehci_link_t period_framelist[FRAMELIST_SIZE];
 
-  // for NXP ECHI, only implement 1 ms & 2 ms & 4 ms, 8 ms (framelist)
+  // TODO only implement 1 ms & 2 ms & 4 ms, 8 ms (framelist)
   // [0] : 1ms, [1] : 2ms, [2] : 4ms, [3] : 8 ms
+  // TODO better implementation without dummy head to save SRAM
   ehci_qhd_t period_head_arr[4];
 
   // Note control qhd of dev0 is used as head of async list
@@ -84,10 +88,10 @@ CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data;
 //--------------------------------------------------------------------+
 // PROTOTYPE
 //--------------------------------------------------------------------+
-static inline ehci_link_t* get_period_head(uint8_t rhport, uint8_t interval_ms)
+static inline ehci_link_t* get_period_head(uint8_t rhport, uint32_t interval_ms)
 {
   (void) rhport;
-  return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min8(EHCI_FRAMELIST_SIZE, interval_ms) ) ];
+  return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min32(FRAMELIST_SIZE, interval_ms) ) ];
 }
 
 static inline ehci_qhd_t* qhd_control(uint8_t dev_addr)
@@ -260,37 +264,38 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
 
   //------------- Periodic List -------------//
   // Build the polling interval tree with 1 ms, 2 ms, 4 ms and 8 ms (framesize) only
-  for(uint32_t i=0; i<4; i++)
+  for ( uint32_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++ )
   {
-    ehci_data.period_head_arr[i].int_smask    = 1; // queue head in period list must have smask non-zero
+    ehci_data.period_head_arr[i].int_smask          = 1; // queue head in period list must have smask non-zero
     ehci_data.period_head_arr[i].qtd_overlay.halted = 1; // dummy node, always inactive
   }
 
   ehci_link_t * const framelist  = ehci_data.period_framelist;
-  ehci_link_t * const period_1ms = get_period_head(rhport, 1);
+  ehci_link_t * const period_1ms = get_period_head(rhport, 1u);
+
   // all links --> period_head_arr[0] (1ms)
   // 0, 2, 4, 6 etc --> period_head_arr[1] (2ms)
   // 1, 5 --> period_head_arr[2] (4ms)
   // 3 --> period_head_arr[3] (8ms)
 
   // TODO EHCI_FRAMELIST_SIZE with other size than 8
-  for(uint32_t i=0; i<EHCI_FRAMELIST_SIZE; i++)
+  for(uint32_t i=0; i<FRAMELIST_SIZE; i++)
   {
     framelist[i].address = (uint32_t) period_1ms;
     framelist[i].type    = EHCI_QTYPE_QHD;
   }
 
-  for(uint32_t i=0; i<EHCI_FRAMELIST_SIZE; i+=2)
+  for(uint32_t i=0; i<FRAMELIST_SIZE; i+=2)
   {
-    list_insert(framelist + i, get_period_head(rhport, 2), EHCI_QTYPE_QHD);
+    list_insert(framelist + i, get_period_head(rhport, 2u), EHCI_QTYPE_QHD);
   }
 
-  for(uint32_t i=1; i<EHCI_FRAMELIST_SIZE; i+=4)
+  for(uint32_t i=1; i<FRAMELIST_SIZE; i+=4)
   {
-    list_insert(framelist + i, get_period_head(rhport, 4), EHCI_QTYPE_QHD);
+    list_insert(framelist + i, get_period_head(rhport, 4u), EHCI_QTYPE_QHD);
   }
 
-  list_insert(framelist+3, get_period_head(rhport, 8), EHCI_QTYPE_QHD);
+  list_insert(framelist+3, get_period_head(rhport, 8u), EHCI_QTYPE_QHD);
 
   period_1ms->terminate    = 1;
 
@@ -300,10 +305,9 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
   regs->nxp_tt_control = 0;
 
   //------------- USB CMD Register -------------//
-  regs->command |= TU_BIT(EHCI_USBCMD_POS_RUN_STOP) | TU_BIT(EHCI_USBCMD_POS_ASYNC_ENABLE)
+  regs->command |= TU_BIT(EHCI_USBCMD_POS_RUN_STOP) | TU_BIT(EHCI_USBCMD_POS_ASYNC_ENABLE) |
-                | TU_BIT(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint
+                   TU_BIT(EHCI_USBCMD_POS_PERIOD_ENABLE) |  // TODO enable period list only there is int/iso endpoint
-                | ((EHCI_CFG_FRAMELIST_SIZE_BITS & TU_BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE)
+                   FRAMELIST_SIZE_USBCMD_VALUE;
-                | ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB);
 
   //------------- ConfigFlag Register (skip) -------------//
   regs->portsc_bm.port_power = 1; // enable port power
@@ -530,10 +534,10 @@ static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head)
   }while(p_qhd != async_head); // async list traversal, stop if loop around
 }
 
-static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms)
+static void period_list_xfer_complete_isr(uint8_t hostid, uint32_t interval_ms)
 {
   uint16_t max_loop = 0;
-  uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1);
+  uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1u);
   ehci_link_t next_item = * get_period_head(hostid, interval_ms);
 
   // TODO abstract max loop guard for period
@@ -616,8 +620,8 @@ static void xfer_error_isr(uint8_t hostid)
   }while(p_qhd != async_head); // async list traversal, stop if loop around
 
   //------------- TODO refractor period list -------------//
-  uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1);
+  uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1u);
-  for (uint8_t interval_ms=1; interval_ms <= EHCI_FRAMELIST_SIZE; interval_ms *= 2)
+  for (uint32_t interval_ms=1; interval_ms <= FRAMELIST_SIZE; interval_ms *= 2)
   {
     ehci_link_t next_item = * get_period_head(hostid, interval_ms);
 
@@ -660,7 +664,7 @@ void hcd_int_handler(uint8_t rhport)
 
   if (int_status & EHCI_INT_MASK_FRAMELIST_ROLLOVER)
   {
-    ehci_data.uframe_number += (EHCI_FRAMELIST_SIZE << 3);
+    ehci_data.uframe_number += (FRAMELIST_SIZE << 3);
   }
 
   if (int_status & EHCI_INT_MASK_PORT_CHANGE)
@@ -690,7 +694,7 @@ void hcd_int_handler(uint8_t rhport)
 
   if (int_status & EHCI_INT_MASK_NXP_PERIODIC)
   {
-    for (uint8_t i=1; i <= EHCI_FRAMELIST_SIZE; i *= 2)
+    for (uint32_t i=1; i <= FRAMELIST_SIZE; i *= 2)
     {
       period_list_xfer_complete_isr( rhport, i );
     }

src/portable/ehci/ehci.h

@@ -289,7 +289,7 @@ enum ehci_interrupt_mask_{
 
 enum ehci_usbcmd_pos_ {
   EHCI_USBCMD_POS_RUN_STOP               = 0,
-  EHCI_USBCMD_POS_FRAMELIST_SZIE         = 2,
+  EHCI_USBCMD_POS_FRAMELIST_SIZE         = 2,
   EHCI_USBCMD_POS_PERIOD_ENABLE          = 4,
   EHCI_USBCMD_POS_ASYNC_ENABLE           = 5,
   EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB = 15,