try to fix racing condition with setup
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hathach
parent
1b3d1b52c9
commit
a40d1e800d
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@ -60,18 +60,23 @@ typedef struct {
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static const char *TAG = "TUSB:DCD";
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static intr_handle_t usb_ih;
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static volatile TU_ATTR_ALIGNED(4) uint32_t _setup_packet[6];
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static volatile uint8_t s_setup_phase = 0; /* 00 - got setup,
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01 - got done setup,
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02 - setup cmd sent*/
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static uint32_t _setup_packet[2];
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#define XFER_CTL_BASE(_ep, _dir) &xfer_status[_ep][_dir]
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static xfer_ctl_t xfer_status[EP_MAX][2];
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#if 0
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static volatile uint8_t s_setup_phase = 0; /* 00 - got setup,
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01 - got done setup,
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02 - setup cmd sent*/
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static inline void readyfor1setup_pkg(int ep_num)
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{
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USB0.out_ep_reg[ep_num].doeptsiz |= (1 << USB_SUPCNT0_S); // doeptsiz 29:30 will decremented on every setup received
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}
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#endif
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// Setup the control endpoint 0.
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static void bus_reset(void)
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@ -83,6 +88,10 @@ static void bus_reset(void)
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USB0.dcfg &= ~USB_DEVADDR_M; // reset address
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USB0.daintmsk |= USB_OUTEPMSK0_M | USB_INEPMSK0_M;
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USB0.doepmsk |= USB_SETUPMSK_M | USB_XFERCOMPLMSK;
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USB0.diepmsk |= USB_TIMEOUTMSK_M | USB_DI_XFERCOMPLMSK_M /*| USB_INTKNTXFEMPMSK_M*/;
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// "USB Data FIFOs" section in reference manual
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// Peripheral FIFO architecture
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//
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@ -115,28 +124,16 @@ static void bus_reset(void)
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USB0.grstctl |= USB_TXFFLSH_M; // Flush fifo
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USB0.grxfsiz = 52;
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USB0.gintmsk = USB_MODEMISMSK_M |
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#if USE_SOF
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USB_SOFMSK_M |
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#endif
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USB_RXFLVIMSK_M |
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USB_ERLYSUSPMSK_M |
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USB_USBSUSPMSK_M |
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USB_USBRSTMSK_M |
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USB_ENUMDONEMSK_M |
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USB_IEPINTMSK_M |
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USB_OEPINTMSK_M |
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USB_RESETDETMSK_M |
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USB_DISCONNINTMSK_M;
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USB0.daintmsk |= USB_OUTEPMSK0_M | USB_INEPMSK0_M;
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USB0.doepmsk |= USB_SETUPMSK_M | USB_XFERCOMPLMSK;
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USB0.diepmsk |= USB_TIMEOUTMSK_M | USB_DI_XFERCOMPLMSK_M /*| USB_INTKNTXFEMPMSK_M*/;
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// Control IN uses FIFO 0 with 64 bytes ( 16 32-bit word )
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USB0.gnptxfsiz = (16 << USB_NPTXFDEP_S) | (USB0.grxfsiz & 0x0000ffffUL);
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#if 0
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readyfor1setup_pkg(0);
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#else
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USB0.out_ep_reg[0].doeptsiz |= USB_SUPCNT0_M;
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#endif
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USB0.gintmsk |= USB_IEPINTMSK_M | USB_OEPINTMSK_M;
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}
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static void enum_done_processing(void)
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@ -162,13 +159,13 @@ static void enum_done_processing(void)
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}
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/*------------------------------------------------------------------*/
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/* Controller API
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*------------------------------------------------------------------*/
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void dcd_init(uint8_t rhport)
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{
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(void)rhport;
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ESP_LOGV(TAG, "DCD init - Start");
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// A. Disconnect
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@ -198,9 +195,7 @@ void dcd_init(uint8_t rhport)
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for (int n = 0; n < USB_OUT_EP_NUM; n++) {
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USB0.out_ep_reg[n].doepctl |= USB_DO_SNAK0_M; // DOEPCTL0_SNAK
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}
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ESP_LOGV(TAG, "DCD init - Soft CONNECT");
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USB0.dctl &= ~USB_SFTDISCON_M; // Connect
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// D. Interruption masking
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USB0.gintmsk = 0; //mask all
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USB0.gotgint = ~0U; //clear OTG ints
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@ -216,6 +211,10 @@ void dcd_init(uint8_t rhport)
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USB_ENUMDONEMSK_M |
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USB_RESETDETMSK_M |
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USB_DISCONNINTMSK_M;
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ESP_LOGV(TAG, "DCD init - Soft CONNECT");
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USB0.dctl &= ~USB_SFTDISCON_M; // Connect
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ets_delay_us(100);
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}
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@ -240,6 +239,18 @@ void dcd_remote_wakeup(uint8_t rhport)
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(void)rhport;
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}
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// disconnect by disabling internal pull-up resistor on D+/D-
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void dcd_disconnect(uint8_t rhport)
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{
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USB0.dctl |= USB_SFTDISCON_M;
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}
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// connect by enabling internal pull-up resistor on D+/D-
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void dcd_connect(uint8_t rhport)
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{
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USB0.dctl &= ~USB_SFTDISCON_M;
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}
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/*------------------------------------------------------------------*/
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/* DCD Endpoint port
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*------------------------------------------------------------------*/
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@ -312,7 +323,6 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *desc_edpt)
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bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t total_bytes)
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{
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(void)rhport;
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uint8_t const epnum = tu_edpt_number(ep_addr);
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@ -447,7 +457,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
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static void receive_packet(xfer_ctl_t *xfer, /* usb_out_endpoint_t * out_ep, */ uint16_t xfer_size)
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{
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ESP_EARLY_LOGV(TAG, "USB - receive_packet");
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uint32_t *rx_fifo = USB0.fifo[0];
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volatile uint32_t *rx_fifo = USB0.fifo[0];
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// See above TODO
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// uint16_t remaining = (out_ep->DOEPTSIZ & UsbDOEPTSIZ_XFRSIZ_Msk) >> UsbDOEPTSIZ_XFRSIZ_Pos;
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@ -549,35 +559,47 @@ static void transmit_packet(xfer_ctl_t *xfer, volatile usb_in_endpoint_t *in_ep,
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static void read_rx_fifo(void)
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{
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volatile uint32_t *rx_fifo = USB0.fifo[0];
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// Pop control word off FIFO (completed xfers will have 2 control words,
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// we only pop one ctl word each interrupt).
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uint32_t ctl_word = USB0.grxstsp;
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uint8_t pktsts = (ctl_word & USB_PKTSTS_M) >> USB_PKTSTS_S;
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uint8_t epnum = (ctl_word & USB_CHNUM_M) >> USB_CHNUM_S;
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uint16_t bcnt = (ctl_word & USB_BCNT_M) >> USB_BCNT_S;
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uint32_t const ctl_word = USB0.grxstsp;
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uint8_t const pktsts = (ctl_word & USB_PKTSTS_M) >> USB_PKTSTS_S;
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uint8_t const epnum = (ctl_word & USB_CHNUM_M ) >> USB_CHNUM_S;
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uint16_t const bcnt = (ctl_word & USB_BCNT_M ) >> USB_BCNT_S;
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switch (pktsts) {
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case 0x01: // Global OUT NAK (Interrupt)
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case 0x01: // Global OUT NAK (Interrupt)
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ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX type : Global OUT NAK");
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break;
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case 0x02: { // Out packet recvd
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case 0x02: { // Out packet recvd
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ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX type : Out packet");
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xfer_ctl_t *xfer = XFER_CTL_BASE(epnum, TUSB_DIR_OUT);
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receive_packet(xfer, bcnt);
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}
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break;
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case 0x03: // Out packet done (Interrupt)
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}
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break;
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case 0x03: // Out packet done (Interrupt)
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ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX type : Out packet done");
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break;
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case 0x04: // Setup packet done (Interrupt)
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case 0x04: // Step 2: Setup transaction completed (Interrupt)
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// After this event, OEPINT interrupt will occur with SETUP bit set
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#if 0
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if (s_setup_phase == 0) { // only if setup is started
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s_setup_phase = 1;
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ESP_EARLY_LOGV(TAG, "TUSB IRQ - setup_phase 1"); //finished
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ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX : Setup packet done");
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s_setup_phase = 1;
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ESP_EARLY_LOGV(TAG, "TUSB IRQ - setup_phase 1"); //finished
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ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX : Setup packet done");
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}
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#else
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USB0.out_ep_reg[epnum].doeptsiz |= USB_SUPCNT0_M;
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#endif
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break;
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case 0x06: { // Setup packet recvd
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case 0x06: { // Step1: Setup data packet received
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#if 0
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s_setup_phase = 0;
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ESP_EARLY_LOGV(TAG, "TUSB IRQ - setup_phase 0"); // new setup process
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// For some reason, it's possible to get a mismatch between
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@ -588,11 +610,18 @@ static void read_rx_fifo(void)
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// only accepting one setup packet at a time for now.
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_setup_packet[0] = (USB0.grxstsp);
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_setup_packet[1] = (USB0.grxstsp);
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ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX : Setup packet : 0x%08x 0x%08x",
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_setup_packet[0], _setup_packet[1]);
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}
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break;
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default: // Invalid, do something here, like breakpoint?
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ESP_EARLY_LOGV(TAG, "TUSB IRQ - RX : Setup packet : 0x%08x 0x%08x", _setup_packet[0], _setup_packet[1]);
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#else
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// We can receive up to three setup packets in succession, but
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// only the last one is valid. Therefore we just overwrite it
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_setup_packet[0] = (*rx_fifo);
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_setup_packet[1] = (*rx_fifo);
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#endif
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}
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break;
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default: // Invalid, do something here, like breakpoint?
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TU_BREAKPOINT();
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break;
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}
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}
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@ -604,9 +633,11 @@ static void handle_epout_ints(void)
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// DOEPINT will be cleared when DAINT's out bits are cleared.
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for (int n = 0; n < USB_OUT_EP_NUM; n++) {
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xfer_ctl_t *xfer = XFER_CTL_BASE(n, TUSB_DIR_OUT);
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if (USB0.daint & (1 << (16 + n))) {
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// SETUP packet Setup Phase done.
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if ((USB0.out_ep_reg[n].doepint & USB_SETUP0_M)) {
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#if 0
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USB0.out_ep_reg[n].doepint |= USB_STUPPKTRCVD0_M | USB_SETUP0_M; // clear
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if (s_setup_phase == 1) { // only if setup is done, but not handled
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s_setup_phase = 2;
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@ -615,6 +646,10 @@ static void handle_epout_ints(void)
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dcd_event_setup_received(0, (uint8_t *)&_setup_packet[0], true);
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}
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readyfor1setup_pkg(0);
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#else
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USB0.out_ep_reg[n].doepint = USB_STUPPKTRCVD0_M | USB_SETUP0_M; // clear
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dcd_event_setup_received(0, (uint8_t *)&_setup_packet[0], true);
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#endif
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}
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// OUT XFER complete (single packet).q
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@ -668,18 +703,21 @@ static void handle_epin_ints(void)
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}
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static void dcd_int_handler(void)
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static void dcd_int_handler(void* arg)
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{
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(void) arg;
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const uint32_t int_status = USB0.gintsts;
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const uint32_t int_msk = USB0.gintmsk;
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//const uint32_t int_msk = USB0.gintmsk;
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if (int_status & USB_DISCONNINT_M) {
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - disconnected");
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USB0.gintsts = USB_DISCONNINT_M;
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dcd_event_bus_signal(0, DCD_EVENT_UNPLUGGED, true);
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}
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if (int_status & USB_USBRST_M) {
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// start of reset
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - reset");
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USB0.gintsts = USB_USBRST_M;
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bus_reset();
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@ -707,9 +745,12 @@ static void dcd_int_handler(void)
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}
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#endif
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if ((int_status & USB_RXFLVI_M) & (int_msk & USB_RXFLVIMSK_M)) {
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if ((int_status & USB_RXFLVI_M) /*& (int_msk & USB_RXFLVIMSK_M)*/) {
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ESP_EARLY_LOGV(TAG, "dcd_int_handler - rx!");
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USB0.gintmsk &= ~USB_RXFLVIMSK_M;
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read_rx_fifo();
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USB0.gintmsk |= USB_RXFLVIMSK_M;
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USB0.gintsts = USB_RXFLVI_M;
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}
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// OUT endpoint interrupt handling.
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