clean up
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hathach
parent
a2a267ddfa
commit
8b7c4ade71
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@ -1 +1 @@
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Please check out this repo https://github.com/hathach/mynewt-tinyusb-exmaple For mynewt example
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Please check out this repo https://github.com/hathach/mynewt-tinyusb-example For mynewt example
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@ -68,16 +68,9 @@ uint32_t tusb_hal_millis(void)
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/*------------------------------------------------------------------*/
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/* BOARD API
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*------------------------------------------------------------------*/
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enum {
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QSPI_CMD_RSTEN = 0x66,
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QSPI_CMD_RST = 0x99,
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QSPI_CMD_WRSR = 0x01,
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QSPI_CMD_READID = 0x90
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};
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/* tinyusb function that handles power event (detected, ready, removed)
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* We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
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*/
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// tinyusb function that handles power event (detected, ready, removed)
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// We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
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extern void tusb_hal_nrf_power_event(uint32_t event);
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void board_init(void)
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@ -98,79 +91,6 @@ void board_init(void)
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SysTick_Config(SystemCoreClock/1000);
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#endif
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// 64 Mbit qspi flash
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#if 0 // def BOARD_MSC_FLASH_QSPI
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nrfx_qspi_config_t qspi_cfg = {
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.xip_offset = 0,
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.pins = {
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.sck_pin = 19,
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.csn_pin = 17,
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.io0_pin = 20,
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.io1_pin = 21,
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.io2_pin = 22,
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.io3_pin = 23,
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},
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.prot_if = {
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.readoc = NRF_QSPI_READOC_READ4IO,
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.writeoc = NRF_QSPI_WRITEOC_PP4IO,
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.addrmode = NRF_QSPI_ADDRMODE_24BIT,
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.dpmconfig = false, // deep power down
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},
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.phy_if = {
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.sck_freq = NRF_QSPI_FREQ_32MDIV1,
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.sck_delay = 1,
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.spi_mode = NRF_QSPI_MODE_0,
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.dpmen = false
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},
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.irq_priority = 7,
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};
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// NULL callback for blocking API
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nrfx_qspi_init(&qspi_cfg, NULL, NULL);
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nrf_qspi_cinstr_conf_t cinstr_cfg = {
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.opcode = 0,
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.length = 0,
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.io2_level = true,
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.io3_level = true,
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.wipwait = false,
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.wren = false
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};
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// Send reset enable
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cinstr_cfg.opcode = QSPI_CMD_RSTEN;
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cinstr_cfg.length = NRF_QSPI_CINSTR_LEN_1B;
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nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL);
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// Send reset command
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cinstr_cfg.opcode = QSPI_CMD_RST;
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cinstr_cfg.length = NRF_QSPI_CINSTR_LEN_1B;
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nrfx_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL);
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NRFX_DELAY_US(100); // wait for flash reset
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// Send (Read ID + 3 dummy bytes) + Receive 2 bytes of Manufacture + Device ID
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uint8_t dummy[6] = { 0 };
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uint8_t id_resp[6] = { 0 };
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cinstr_cfg.opcode = QSPI_CMD_READID;
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cinstr_cfg.length = 6;
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// Bug with -nrf_qspi_cinstrdata_get() didn't combine data.
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// https://devzone.nordicsemi.com/f/nordic-q-a/38540/bug-nrf_qspi_cinstrdata_get-didn-t-collect-data-from-both-cinstrdat1-and-cinstrdat0
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nrfx_qspi_cinstr_xfer(&cinstr_cfg, dummy, id_resp);
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// Due to the bug, we collect data manually
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uint8_t dev_id = (uint8_t) NRF_QSPI->CINSTRDAT1;
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uint8_t mfgr_id = (uint8_t) ( NRF_QSPI->CINSTRDAT0 >> 24 );
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// Switch to quad mode
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uint16_t sr_quad_en = 0x40;
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cinstr_cfg.opcode = QSPI_CMD_WRSR;
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cinstr_cfg.length = 3;
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cinstr_cfg.wipwait = cinstr_cfg.wren = true;
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nrfx_qspi_cinstr_xfer(&cinstr_cfg, &sr_quad_en, NULL);
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#endif
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NVIC_SetPriority(USBD_IRQn, 2);
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// USB power may already be ready at this time -> no event generated
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@ -178,23 +98,6 @@ void board_init(void)
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uint32_t usb_reg;
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#ifdef SOFTDEVICE_PRESENT
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// Enable to test enable SD before USB scenario
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#if 1
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extern void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info);
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nrf_clock_lf_cfg_t clock_cfg =
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{
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// LFXO
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.source = NRF_CLOCK_LF_SRC_XTAL,
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.rc_ctiv = 0,
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.rc_temp_ctiv = 0,
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.accuracy = NRF_CLOCK_LF_ACCURACY_20_PPM
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};
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sd_softdevice_enable(&clock_cfg, nrf_error_cb);
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NVIC_EnableIRQ(SD_EVT_IRQn);
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#endif
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uint8_t sd_en = false;
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sd_softdevice_is_enabled(&sd_en);
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@ -220,13 +123,8 @@ void board_init(void)
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usb_reg = NRF_POWER->USBREGSTATUS;
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}
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if ( usb_reg & POWER_USBREGSTATUS_VBUSDETECT_Msk ) {
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tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_DETECTED);
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}
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if ( usb_reg & POWER_USBREGSTATUS_OUTPUTRDY_Msk ) {
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tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_READY);
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}
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if ( usb_reg & POWER_USBREGSTATUS_VBUSDETECT_Msk ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_DETECTED);
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if ( usb_reg & POWER_USBREGSTATUS_OUTPUTRDY_Msk ) tusb_hal_nrf_power_event(NRFX_POWER_USB_EVT_READY);
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}
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void board_led_control(bool state)
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@ -262,7 +160,6 @@ int board_uart_write(void const * buf, int len)
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}
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#ifdef SOFTDEVICE_PRESENT
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// process SOC event from SD
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uint32_t proc_soc(void)
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{
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