fix nrf52 freeRTOS interrupt priority
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c65e5b406f
commit
87d89cf5cb
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@ -112,7 +112,10 @@
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do {\
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do {\
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if ( !(_exp) ) { \
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if ( !(_exp) ) { \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
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if ( (*ARM_CM_DHCSR) & 1UL ) __asm("BKPT #0\n"); /* Only halt mcu if debugger is attached */\
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if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \
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taskDISABLE_INTERRUPTS(); \
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__asm("BKPT #0\n"); \
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}\
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}\
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}\
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} while(0)
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} while(0)
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#else
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#else
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@ -136,7 +139,7 @@
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/* The lowest interrupt priority that can be used in a call to a "set priority"
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/* The lowest interrupt priority that can be used in a call to a "set priority"
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function. */
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function. */
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#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 0x0f
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#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
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/* The highest interrupt priority that can be used by any interrupt service
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/* The highest interrupt priority that can be used by any interrupt service
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
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@ -155,10 +158,10 @@ PRIORITY THAN THIS! (higher priorities are lower numeric values. */
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/* Interrupt priorities used by the kernel port layer itself. These are generic
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/* Interrupt priorities used by the kernel port layer itself. These are generic
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to all Cortex-M ports, and do not rely on any particular library functions. */
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to all Cortex-M ports, and do not rely on any particular library functions. */
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#define configKERNEL_INTERRUPT_PRIORITY configLIBRARY_LOWEST_INTERRUPT_PRIORITY
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#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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#endif /* __FREERTOS_CONFIG__H */
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#endif /* __FREERTOS_CONFIG__H */
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@ -553,7 +553,7 @@ void dcd_event_handler(dcd_event_t const * event, bool in_isr)
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.rhport = rhport,
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.rhport = rhport,
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.event_id = DCD_EVENT_SOF,
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.event_id = DCD_EVENT_SOF,
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};
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};
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osal_queue_send(_usbd_q, &task_event, true);
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osal_queue_send(_usbd_q, &task_event, in_isr);
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#endif
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#endif
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}
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}
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break;
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break;
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@ -582,11 +582,11 @@ void dcd_event_handler(dcd_event_t const * event, bool in_isr)
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if (event->xfer_complete.len)
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if (event->xfer_complete.len)
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{
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{
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(void) event->xfer_complete.result; // TODO handle control error/stalled
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(void) event->xfer_complete.result; // TODO handle control error/stalled
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osal_semaphore_post( _usbd_ctrl_sem, true);
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osal_semaphore_post( _usbd_ctrl_sem, in_isr);
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}
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}
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}else
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}else
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{
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{
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osal_queue_send(_usbd_q, event, true);
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osal_queue_send(_usbd_q, event, in_isr);
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}
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}
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TU_ASSERT(event->xfer_complete.result == DCD_XFER_SUCCESS,);
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TU_ASSERT(event->xfer_complete.result == DCD_XFER_SUCCESS,);
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break;
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break;
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