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starting to add support for IAR workbench

This commit is contained in:
hathach 2013-09-19 16:11:11 +07:00
parent 61c591b9ac
commit 86681fe442
20 changed files with 2859 additions and 57 deletions
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298
demos/bsp/lpc43xx/startup_iar/startup_LPC43xx.s Normal file
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@ -0,0 +1,298 @@
/**************************************************
*
* Part one of the system initialization code, contains low-level
* initialization, plain thumb variant.
*
* Copyright 2011 IAR Systems. All rights reserved.
*
* $Revision: 50291 $
*
**************************************************/
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
PUBLIC __vector_table
PUBLIC __vector_table_0x1c
PUBLIC __Vectors
PUBLIC __Vectors_End
PUBLIC __Vectors_Size
DATA
__vector_table
DCD sfe(CSTACK)
DCD Reset_Handler
DCD NMI_Handler
DCD HardFault_Handler
DCD MemManage_Handler
DCD BusFault_Handler
DCD UsageFault_Handler
__vector_table_0x1c
DCD 0
DCD 0
DCD 0
DCD 0
DCD SVC_Handler
DCD DebugMon_Handler
DCD 0
DCD PendSV_Handler
DCD SysTick_Handler
; External Interrupts
DCD DAC_IRQHandler ; 16 D/A Converter
DCD M0CORE_IRQHandler ; 17 CortexM0
DCD DMA_IRQHandler ; 18 General Purpose DMA
DCD 0 ; 19 Reserved
DCD 0 ; 20 Reserved
DCD ETH_IRQHandler ; 21 Ethernet
DCD SDIO_IRQHandler ; 22 SD/MMC
DCD LCD_IRQHandler ; 23 LCD
DCD USB0_IRQHandler ; 24 USB0
DCD USB1_IRQHandler ; 25 USB1
DCD SCT_IRQHandler ; 26 State Configurable Timer
DCD RITIMER_IRQHandler ; 27 Repetitive Interrupt Timer
DCD TIMER0_IRQHandler ; 28 Timer0
DCD TIMER1_IRQHandler ; 29 Timer1
DCD TIMER2_IRQHandler ; 30 Timer2
DCD TIMER3_IRQHandler ; 31 Timer3
DCD MCPWM_IRQHandler ; 32 Motor Control PWM
DCD ADC0_IRQHandler ; 33 A/D Converter 0
DCD I2C0_IRQHandler ; 34 I2C0
DCD I2C1_IRQHandler ; 35 I2C1
DCD SPI_IRQHandler ; 36 Reserved
DCD ADC1_IRQHandler ; 37 A/D Converter 1
DCD SSP0_IRQHandler ; 38 SSP0
DCD SSP1_IRQHandler ; 39 SSP1
DCD USART0_IRQHandler ; 40 UART0
DCD UART1_IRQHandler ; 41 UART1
DCD UART2_IRQHandler ; 42 UART2
DCD UART3_IRQHandler ; 43 UART3
DCD I2S0_IRQHandler ; 44 I2S0
DCD I2S1_IRQHandler ; 45 I2S1
DCD SPIFI_IRQHandler ; 46 SPIFI
DCD SGPIO_IRQHandler ; 47 SGPIO
DCD GPIO0_IRQHandler ; 48 GPIO0
DCD GPIO1_IRQHandler ; 49 GPIO1
DCD GPIO2_IRQHandler ; 50 GPIO2
DCD GPIO3_IRQHandler ; 51 GPIO3
DCD GPIO4_IRQHandler ; 52 GPIO4
DCD GPIO5_IRQHandler ; 53 GPIO5
DCD GPIO6_IRQHandler ; 54 GPIO6
DCD GPIO7_IRQHandler ; 55 GPIO7
DCD GINT0_IRQHandler ; 56 GINT0
DCD GINT1_IRQHandler ; 57 GINT1
DCD EVENTROUTER_IRQHandler ; 58 Event Router
DCD C_CAN1_IRQHandler ; 59 CCAN1
DCD 0
DCD 0
DCD ATIMER_IRQHandler ; 62 Alarm Timer
DCD RTC_IRQHandler ; 63 RTC
DCD 0
DCD WWDT_IRQHandler ; 65 WWDT
DCD 0
DCD C_CAN0_IRQHandler ; 67 CCAN0
DCD QEI_IRQHandler ; 68 QEI
__Vectors_End
__Vectors EQU __vector_table
__Vectors_Size EQU __Vectors_End - __Vectors
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
THUMB
PUBWEAK Reset_Handler
SECTION .text:CODE:REORDER(2)
Reset_Handler
LDR R0, =__iar_program_start
BX R0
PUBWEAK NMI_Handler
PUBWEAK HardFault_Handler
PUBWEAK MemManage_Handler
PUBWEAK BusFault_Handler
PUBWEAK UsageFault_Handler
PUBWEAK SVC_Handler
PUBWEAK DebugMon_Handler
PUBWEAK PendSV_Handler
PUBWEAK SysTick_Handler
PUBWEAK DAC_IRQHandler
PUBWEAK M0CORE_IRQHandler
PUBWEAK DMA_IRQHandler
PUBWEAK ETH_IRQHandler
PUBWEAK SDIO_IRQHandler
PUBWEAK LCD_IRQHandler
PUBWEAK USB0_IRQHandler
PUBWEAK USB1_IRQHandler
PUBWEAK SCT_IRQHandler
PUBWEAK RITIMER_IRQHandler
PUBWEAK TIMER0_IRQHandler
PUBWEAK TIMER1_IRQHandler
PUBWEAK TIMER2_IRQHandler
PUBWEAK TIMER3_IRQHandler
PUBWEAK MCPWM_IRQHandler
PUBWEAK ADC0_IRQHandler
PUBWEAK I2C0_IRQHandler
PUBWEAK I2C1_IRQHandler
PUBWEAK SPI_IRQHandler
PUBWEAK ADC1_IRQHandler
PUBWEAK SSP0_IRQHandler
PUBWEAK SSP1_IRQHandler
PUBWEAK USART0_IRQHandler
PUBWEAK UART1_IRQHandler
PUBWEAK UART2_IRQHandler
PUBWEAK UART3_IRQHandler
PUBWEAK I2S0_IRQHandler
PUBWEAK I2S1_IRQHandler
PUBWEAK SPIFI_IRQHandler
PUBWEAK SGPIO_IRQHandler
PUBWEAK GPIO0_IRQHandler
PUBWEAK GPIO1_IRQHandler
PUBWEAK GPIO2_IRQHandler
PUBWEAK GPIO3_IRQHandler
PUBWEAK GPIO4_IRQHandler
PUBWEAK GPIO5_IRQHandler
PUBWEAK GPIO6_IRQHandler
PUBWEAK GPIO7_IRQHandler
PUBWEAK GINT0_IRQHandler
PUBWEAK GINT1_IRQHandler
PUBWEAK EVENTROUTER_IRQHandler
PUBWEAK C_CAN1_IRQHandler
PUBWEAK ATIMER_IRQHandler
PUBWEAK RTC_IRQHandler
PUBWEAK WWDT_IRQHandler
PUBWEAK C_CAN0_IRQHandler
PUBWEAK QEI_IRQHandler
SECTION .text:CODE:REORDER(1)
NMI_Handler
B NMI_Handler
SVC_Handler
B SVC_Handler
DebugMon_Handler
B DebugMon_Handler
PendSV_Handler
B PendSV_Handler
SysTick_Handler
B SysTick_Handler
HardFault_Handler
B HardFault_Handler
MemManage_Handler
B MemManage_Handler
BusFault_Handler
B BusFault_Handler
UsageFault_Handler
DAC_IRQHandler
M0CORE_IRQHandler
DMA_IRQHandler
ETH_IRQHandler
SDIO_IRQHandler
LCD_IRQHandler
USB0_IRQHandler
USB1_IRQHandler
SCT_IRQHandler
RITIMER_IRQHandler
TIMER0_IRQHandler
TIMER1_IRQHandler
TIMER2_IRQHandler
TIMER3_IRQHandler
MCPWM_IRQHandler
ADC0_IRQHandler
I2C0_IRQHandler
I2C1_IRQHandler
SPI_IRQHandler
ADC1_IRQHandler
SSP0_IRQHandler
SSP1_IRQHandler
USART0_IRQHandler
UART1_IRQHandler
UART2_IRQHandler
UART3_IRQHandler
I2S0_IRQHandler
I2S1_IRQHandler
SPIFI_IRQHandler
SGPIO_IRQHandler
GPIO0_IRQHandler
GPIO1_IRQHandler
GPIO2_IRQHandler
GPIO3_IRQHandler
GPIO4_IRQHandler
GPIO5_IRQHandler
GPIO6_IRQHandler
GPIO7_IRQHandler
GINT0_IRQHandler
GINT1_IRQHandler
EVENTROUTER_IRQHandler
C_CAN1_IRQHandler
ATIMER_IRQHandler
RTC_IRQHandler
WWDT_IRQHandler
C_CAN0_IRQHandler
QEI_IRQHandler
Default_IRQHandler
B Default_IRQHandler
THUMB
PUBLIC getPC
SECTION .text:CODE:REORDER(2)
getPC
MOV R0,LR
BX LR
/* CRP Section - not needed for flashless devices */
;;; SECTION .crp:CODE:ROOT(2)
;;; DATA
/* Code Read Protection
NO_ISP 0x4E697370 - Prevents sampling of pin PIO0_1 for entering ISP mode
CRP1 0x12345678 - Write to RAM command cannot access RAM below 0x10000300.
- Copy RAM to flash command can not write to Sector 0.
- Erase command can erase Sector 0 only when all sectors
are selected for erase.
- Compare command is disabled.
- Read Memory command is disabled.
CRP2 0x87654321 - Read Memory is disabled.
- Write to RAM is disabled.
- "Go" command is disabled.
- Copy RAM to flash is disabled.
- Compare is disabled.
CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
by pulling PIO0_1 LOW is disabled if a valid user code is
present in flash sector 0.
Caution: If CRP3 is selected, no future factory testing can be
performed on the device.
*/
;;; DCD 0xFFFFFFFF
;;;
END

11
demos/host/host_os_none/.project
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@ -103,7 +103,16 @@
</linkedResources>
<filteredResources>
<filter>
<id>1379174455764</id>
<id>1379572492985</id>
<name></name>
<type>26</type>
<matcher>
<id>org.eclipse.ui.ide.multiFilter</id>
<arguments>1.0-name-matches-false-false-startup_iar</arguments>
</matcher>
</filter>
<filter>
<id>1379572492997</id>
<name></name>
<type>26</type>
<matcher>

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demos/host/host_os_none/host_os_none.ewd Normal file
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1058
demos/host/host_os_none/host_os_none.ewp Normal file
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10
demos/host/host_os_none/host_os_none.eww Normal file
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@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\host_os_none.ewp</path>
</project>
<batchBuild/>
</workspace>

32
demos/host/host_os_none/host_os_none.uvopt
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@ -389,7 +389,7 @@
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@ -405,8 +405,8 @@
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@ -493,7 +493,7 @@
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@ -509,7 +509,7 @@
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@ -709,8 +709,8 @@
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<PathWithFileName>..\..\..\tinyusb\host\usbh.c</PathWithFileName>
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@ -725,8 +725,8 @@
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<PathWithFileName>..\..\..\tinyusb\host\ehci\ehci.c</PathWithFileName>
<FilenameWithoutPath>ehci.c</FilenameWithoutPath>
@ -773,7 +773,7 @@
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@ -835,10 +835,10 @@
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@ -851,10 +851,10 @@
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<FilenameWithoutPath>cdc_rndis_host.c</FilenameWithoutPath>

6
demos/host/src/cdc_serial_app.c
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@ -93,7 +93,7 @@ void tusbh_cdc_xfer_isr(uint8_t dev_addr, tusb_event_t event, cdc_pipeid_t pipe_
case TUSB_EVENT_XFER_STALLED:
default :
ASSERT(false, (void) 0); // error
ASSERT(false, VOID_RETURN); // error
break;
}
}else if (pipe_id == CDC_PIPE_DATA_OUT)
@ -113,9 +113,9 @@ void cdc_serial_app_init(void)
memclr_(buffer_in, sizeof(buffer_in));
queue_hdl = osal_queue_create( OSAL_QUEUE_REF(queue_def) );
ASSERT_PTR( queue_hdl, (void) 0 );
ASSERT_PTR( queue_hdl, VOID_RETURN);
ASSERT( TUSB_ERROR_NONE == osal_task_create(OSAL_TASK_REF(cdc_serial_app_task)), (void) 0 );
ASSERT( TUSB_ERROR_NONE == osal_task_create(OSAL_TASK_REF(cdc_serial_app_task)), VOID_RETURN);
}
//------------- main task -------------//

4
demos/host/src/keyboard_app.c
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@ -108,10 +108,10 @@ void keyboard_app_init(void)
memclr_(&usb_keyboard_report, sizeof(tusb_keyboard_report_t));
queue_kbd_hdl = osal_queue_create( OSAL_QUEUE_REF(queue_kbd_def) );
ASSERT_PTR( queue_kbd_hdl, (void) 0 );
ASSERT_PTR( queue_kbd_hdl, VOID_RETURN );
ASSERT( TUSB_ERROR_NONE == osal_task_create( OSAL_TASK_REF(keyboard_app_task) ) ,
(void) 0 );
VOID_RETURN);
}
//------------- main task -------------//

4
demos/host/src/mouse_app.c
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@ -110,10 +110,10 @@ void mouse_app_init(void)
memclr_(&usb_mouse_report, sizeof(tusb_mouse_report_t));
queue_mouse_hdl = osal_queue_create( OSAL_QUEUE_REF(queue_mouse_def) );
ASSERT_PTR( queue_mouse_hdl, (void) 0 );
ASSERT_PTR( queue_mouse_hdl, VOID_RETURN);
ASSERT( TUSB_ERROR_NONE == osal_task_create( OSAL_TASK_REF(mouse_app_task) ),
(void) 0 );
VOID_RETURN );
}
//------------- main task -------------//

2
demos/host/src/tusb_config.h
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@ -113,6 +113,8 @@
#define TUSB_CFG_ATTR_USBRAM __attribute__ ((section(TUSB_RAM_SECTION)))
#elif defined __CC_ARM // Compiled with Keil armcc
#define TUSB_CFG_ATTR_USBRAM
#elif __ICCARM__ // compiled with IAR
#define TUSB_CFG_ATTR_USBRAM
#else
#error compiler not specified
#endif

2
tinyusb/class/cdc_host.c
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@ -289,7 +289,7 @@ void cdch_close(uint8_t dev_addr)
ASSERT(err1 == TUSB_ERROR_NONE &&
err2 == TUSB_ERROR_NONE &&
err3 == TUSB_ERROR_NONE, (void) 0 );
err3 == TUSB_ERROR_NONE, VOID_RETURN );
}

12
tinyusb/class/cdc_host.h
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@ -70,9 +70,9 @@ tusb_error_t tusbh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t leng
tusb_error_t tusbh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify);
//------------- CDC Application Callback -------------//
void tusbh_cdc_mounted_cb(uint8_t dev_addr) ATTR_WEAK;
void tusbh_cdc_unmounted_isr(uint8_t dev_addr) ATTR_WEAK;
void tusbh_cdc_xfer_isr(uint8_t dev_addr, tusb_event_t event, cdc_pipeid_t pipe_id, uint32_t xferred_bytes) ATTR_WEAK;
ATTR_WEAK void tusbh_cdc_mounted_cb(uint8_t dev_addr);
ATTR_WEAK void tusbh_cdc_unmounted_isr(uint8_t dev_addr);
ATTR_WEAK void tusbh_cdc_xfer_isr(uint8_t dev_addr, tusb_event_t event, cdc_pipeid_t pipe_id, uint32_t xferred_bytes);
#if TUSB_CFG_HOST_CDC_RNDIS
@ -83,9 +83,9 @@ bool tusbh_cdc_rndis_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WARN_UNUSED_RES
tusb_error_t tusbh_cdc_rndis_get_mac_addr(uint8_t dev_addr, uint8_t mac_address[6]);
//------------- RNDIS Application Callback (overshadow CDC callbacks) -------------//
void tusbh_cdc_rndis_mounted_cb(uint8_t dev_addr) ATTR_WEAK;
void tusbh_cdc_rndis_unmounted_isr(uint8_t dev_addr) ATTR_WEAK;
void tusbh_cdc_rndis_xfer_isr(uint8_t dev_addr, tusb_event_t event, cdc_pipeid_t pipe_id, uint32_t xferred_bytes) ATTR_WEAK;
ATTR_WEAK void tusbh_cdc_rndis_mounted_cb(uint8_t dev_addr);
ATTR_WEAK void tusbh_cdc_rndis_unmounted_isr(uint8_t dev_addr);
ATTR_WEAK void tusbh_cdc_rndis_xfer_isr(uint8_t dev_addr, tusb_event_t event, cdc_pipeid_t pipe_id, uint32_t xferred_bytes);

11
tinyusb/class/cdc_rndis_host.c
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@ -55,7 +55,7 @@
#define RNDIS_MSG_PAYLOAD_MAX (1024*4)
static uint8_t msg_notification[TUSB_CFG_HOST_DEVICE_MAX][8] TUSB_CFG_ATTR_USBRAM;
static uint8_t msg_payload[RNDIS_MSG_PAYLOAD_MAX] TUSB_CFG_ATTR_USBRAM ATTR_ALIGNED(4);
ATTR_ALIGNED(4) static uint8_t msg_payload[RNDIS_MSG_PAYLOAD_MAX] TUSB_CFG_ATTR_USBRAM;
STATIC_ rndish_data_t rndish_data[TUSB_CFG_HOST_DEVICE_MAX];
@ -154,7 +154,6 @@ static rndis_msg_query_t const msg_query_permanent_addr =
.oid = OID_802_3_PERMANENT_ADDRESS,
.buffer_length = 6,
.buffer_offset = 20,
.oid_buffer = {0, 0, 0, 0, 0, 0}
};
static rndis_msg_set_t const msg_set_packet_filter =
@ -165,7 +164,6 @@ static rndis_msg_set_t const msg_set_packet_filter =
.oid = OID_GEN_CURRENT_PACKET_FILTER,
.buffer_length = 4,
.buffer_offset = 20,
.oid_buffer = { (uint8_t) (NDIS_PACKET_TYPE_DIRECTED | NDIS_PACKET_TYPE_MULTICAST | NDIS_PACKET_TYPE_BROADCAST), 0, 0, 0}
};
tusb_error_t rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc)
@ -191,7 +189,8 @@ tusb_error_t rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc)
rndish_data[dev_addr-1].max_xfer_size = p_init_cmpt->max_xfer_size;
//------------- Message Query 802.3 Permanent Address -------------//
memcpy(msg_payload, &msg_query_permanent_addr, sizeof(rndis_msg_query_t) + 6); // 6 bytes for MAC address
memcpy(msg_payload, &msg_query_permanent_addr, sizeof(rndis_msg_query_t));
memclr_(msg_payload + sizeof(rndis_msg_query_t), 6); // 6 bytes for MAC address
OSAL_SUBTASK_INVOKED_AND_WAIT(
send_message_get_response_subtask( dev_addr, p_cdc,
@ -206,7 +205,9 @@ tusb_error_t rndish_open_subtask(uint8_t dev_addr, cdch_data_t *p_cdc)
memcpy(rndish_data[dev_addr-1].mac_address, msg_payload + 8 + p_query_cmpt->buffer_offset, 6);
//------------- Set OID_GEN_CURRENT_PACKET_FILTER to (DIRECTED | MULTICAST | BROADCAST) -------------//
memcpy(msg_payload, &msg_set_packet_filter, sizeof(rndis_msg_set_t) + 4); // 4 bytes for filter flags
memcpy(msg_payload, &msg_set_packet_filter, sizeof(rndis_msg_set_t));
memclr_(msg_payload + sizeof(rndis_msg_set_t), 4); // 4 bytes for filter flags
((rndis_msg_set_t*) msg_payload)->oid_buffer[0] = (NDIS_PACKET_TYPE_DIRECTED | NDIS_PACKET_TYPE_MULTICAST | NDIS_PACKET_TYPE_BROADCAST);
OSAL_SUBTASK_INVOKED_AND_WAIT(
send_message_get_response_subtask( dev_addr, p_cdc,

2
tinyusb/class/hid_host.c
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@ -87,7 +87,7 @@ static inline void hidh_interface_close(uint8_t dev_addr, hidh_interface_info_t
if ( pipehandle_is_valid(pipe_hdl) )
{
memclr_(p_hid, sizeof(hidh_interface_info_t));
ASSERT_INT( TUSB_ERROR_NONE, hcd_pipe_close(pipe_hdl), (void) 0 );
ASSERT_INT( TUSB_ERROR_NONE, hcd_pipe_close(pipe_hdl), VOID_RETURN );
}
}

14
tinyusb/class/hid_host.h
View File

@ -63,9 +63,9 @@ bool tusbh_hid_keyboard_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WAR
tusb_error_t tusbh_hid_keyboard_get_report(uint8_t dev_addr, void * report) /*ATTR_WARN_UNUSED_RESULT*/;
tusb_interface_status_t tusbh_hid_keyboard_status(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT;
//------------- Application Callback -------------//
void tusbh_hid_keyboard_isr(uint8_t dev_addr, tusb_event_t event) ATTR_WEAK;
void tusbh_hid_keyboard_mounted_cb(uint8_t dev_addr) ATTR_WEAK;
void tusbh_hid_keyboard_unmounted_isr(uint8_t dev_addr) ATTR_WEAK;
ATTR_WEAK void tusbh_hid_keyboard_isr(uint8_t dev_addr, tusb_event_t event);
ATTR_WEAK void tusbh_hid_keyboard_mounted_cb(uint8_t dev_addr);
ATTR_WEAK void tusbh_hid_keyboard_unmounted_isr(uint8_t dev_addr);
//--------------------------------------------------------------------+
// MOUSE Application API
@ -74,9 +74,9 @@ bool tusbh_hid_mouse_is_mounted(uint8_t dev_addr) ATTR_PURE ATTR_WARN_U
tusb_error_t tusbh_hid_mouse_get_report(uint8_t dev_addr, void* report) /*ATTR_WARN_UNUSED_RESULT*/;
tusb_interface_status_t tusbh_hid_mouse_status(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT;
//------------- Application Callback -------------//
void tusbh_hid_mouse_isr(uint8_t dev_addr, tusb_event_t event) ATTR_WEAK;
void tusbh_hid_mouse_mounted_cb(uint8_t dev_addr) ATTR_WEAK;
void tusbh_hid_mouse_unmounted_isr(uint8_t dev_addr) ATTR_WEAK;
ATTR_WEAK void tusbh_hid_mouse_isr(uint8_t dev_addr, tusb_event_t event);
ATTR_WEAK void tusbh_hid_mouse_mounted_cb(uint8_t dev_addr);
ATTR_WEAK void tusbh_hid_mouse_unmounted_isr(uint8_t dev_addr);
//--------------------------------------------------------------------+
// GENERIC Application API
@ -87,7 +87,7 @@ tusb_error_t tusbh_hid_generic_set_report(uint8_t dev_addr, void* report, bool
tusb_interface_status_t tusbh_hid_generic_get_status(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT;
tusb_interface_status_t tusbh_hid_generic_set_status(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT;
//------------- Application Callback -------------//
void tusbh_hid_generic_isr(uint8_t dev_addr, tusb_event_t event) ATTR_WEAK;
ATTR_WEAK void tusbh_hid_generic_isr(uint8_t dev_addr, tusb_event_t event);
//--------------------------------------------------------------------+
// USBH-CLASS DRIVER API

4
tinyusb/common/assertion.h
View File

@ -60,6 +60,8 @@ extern "C"
#include "tusb_option.h"
#include "hal/hal.h" // TODO find a way to break hal dependency
#define VOID_RETURN
//--------------------------------------------------------------------+
// Compile-time Assert
//--------------------------------------------------------------------+
@ -95,7 +97,7 @@ extern "C"
#ifndef _TEST_ASSERT_
#define ASSERT_ERROR_HANDLER(x, para) \
return (x)
return x
#else
#define ASSERT_ERROR_HANDLER(x, para) Throw(x)
#endif

114
tinyusb/common/compiler/compiler_iar.h
View File

@ -52,11 +52,123 @@
extern "C" {
#endif
#define ALIGN_OF(x) __ALIGNOF__(x)
#define ALIGN_OF(x) __ALIGNOF__(x)
#define ATTR_PACKED_STRUCT(x) __packed x
#define ATTR_PREPACKED __packed
#define ATTR_PACKED
#define ATTR_ALIGNED(Bytes) ATTR_ALIGNED_##Bytes
#define ATTR_ALIGNED_4096 _Pragma("data_alignment=4096")
#define ATTR_ALIGNED_2048 _Pragma("data_alignment=2048")
#define ATTR_ALIGNED_256 _Pragma("data_alignment=256")
#define ATTR_ALIGNED_128 _Pragma("data_alignment=128")
#define ATTR_ALIGNED_64 _Pragma("data_alignment=64")
#define ATTR_ALIGNED_48 _Pragma("data_alignment=48")
#define ATTR_ALIGNED_32 _Pragma("data_alignment=32")
#define ATTR_ALIGNED_4 _Pragma("data_alignment=4")
#ifndef ATTR_ALWAYS_INLINE
/// Generally, functions are not inlined unless optimization is specified. For functions declared inline, this attribute inlines the function even if no optimization level is specified
#define ATTR_ALWAYS_INLINE error
#endif
#define ATTR_PURE // TODO IAR pure function attribute
#define ATTR_CONST // TODO IAR const function attribute
#define ATTR_WEAK __weak
#define ATTR_WARN_UNUSED_RESULT
#define ATTR_USED
#define ATTR_UNUSED
#if 0
/** Indicates to the compiler that the function can not ever return, so that any stack restoring or
* return code may be omitted by the compiler in the resulting binary.
*/
#define ATTR_NO_RETURN
/** Indicates that the specified parameters of the function are pointers which should never be \c NULL.
* When applied as a 1-based comma separated list the compiler will emit a warning if the specified
* parameters are known at compiler time to be \c NULL at the point of calling the function.
*/
#define ATTR_NON_NULL_PTR_ARG(...)
/** Removes any preamble or postamble from the function. When used, the function will not have any
* register or stack saving code. This should be used with caution, and when used the programmer
* is responsible for maintaining stack and register integrity.
*/
#define ATTR_NAKED __attribute__ ((naked))
/** Prevents the compiler from considering a specified function for in-lining. When applied, the given
* function will not be in-lined under any circumstances.
*/
#define ATTR_NO_INLINE __attribute__ ((noinline))
/** Forces the compiler to inline the specified function. When applied, the given function will be
* in-lined under all circumstances.
*/
#define PRAGMA_ALWAYS_INLINE _Pragma("inline=forced")
#define ATTR_ALWAYS_INLINE
/** Indicates that the specified function is pure, in that it has no side-effects other than global
* or parameter variable access.
*/
#define ATTR_PURE __attribute__ ((pure))
/** Indicates that the specified function is constant, in that it has no side effects other than
* parameter access.
*/
#define ATTR_CONST
/** Marks a given function as deprecated, which produces a warning if the function is called. */
#define ATTR_DEPRECATED// __attribute__ ((deprecated))
/** Marks a function as a weak reference, which can be overridden by other functions with an
* identical name (in which case the weak reference is discarded at link time).
*/
#define _PPTOSTR_(x) #x
#define PRAGMA_WEAK(name, vector) _Pragma(_PPTOSTR_(weak name=vector))
#define ATTR_WEAK
/** Marks a function as an alias for another function.
*
* \param[in] Func Name of the function which the given function name should alias.
*/
#define ATTR_ALIAS(Func)
/** Forces the compiler to not automatically zero the given global variable on startup, so that the
* current RAM contents is retained. Under most conditions this value will be random due to the
* behaviour of volatile memory once power is removed, but may be used in some specific circumstances,
* like the passing of values back after a system watchdog reset.
*/
#define ATTR_NO_INIT __attribute__ ((section (".noinit")))
/** Indicates the minimum alignment in bytes for a variable or struct element.
*
* \param[in] Bytes Minimum number of bytes the item should be aligned to.
*/
#define PRAGMA_ALIGN_4096 _Pragma("data_alignment=4096")
#define PRAGMA_ALIGN_2048 _Pragma("data_alignment=2048")
#define PRAGMA_ALIGN_256 _Pragma("data_alignment=256")
#define PRAGMA_ALIGN_128 _Pragma("data_alignment=128")
#define PRAGMA_ALIGN_64 _Pragma("data_alignment=64")
#define PRAGMA_ALIGN_48 _Pragma("data_alignment=48")
#define PRAGMA_ALIGN_32 _Pragma("data_alignment=32")
#define PRAGMA_ALIGN_4 _Pragma("data_alignment=4")
#define ATTR_ALIGNED(Bytes)
//#define ATTR_DEPRECATED __attribute__ ((deprecated))
#define ATTR_ERROR(Message)// __attribute__ (( error(Message) ))
#define ATTR_WARNING(Message) // __attribute__ (( warning(Message) ))
#define ATTR_IAR_PACKED __packed
#define ATTR_PACKED
#endif
#ifdef __cplusplus
}
#endif

20
tinyusb/host/ehci/ehci.c
View File

@ -62,13 +62,19 @@ STATIC_ ehci_data_t ehci_data TUSB_CFG_ATTR_USBRAM;
#if EHCI_PERIODIC_LIST
#if (TUSB_CFG_CONTROLLER0_MODE & TUSB_MODE_HOST)
STATIC_ ehci_link_t period_frame_list0[EHCI_FRAMELIST_SIZE] ATTR_ALIGNED(4096) TUSB_CFG_ATTR_USBRAM;
STATIC_ASSERT( ALIGN_OF(period_frame_list0) == 4096, "Period Framelist must be 4k alginment"); // validation
ATTR_ALIGNED(4096) STATIC_ ehci_link_t period_frame_list0[EHCI_FRAMELIST_SIZE] TUSB_CFG_ATTR_USBRAM;
#ifndef __ICCARM__ // IAR cannot able to determine the alignment with dataalignment pragma
STATIC_ASSERT( ALIGN_OF(period_frame_list0) == 4096, "Period Framelist must be 4k alginment"); // validation
#endif
#endif
#if (TUSB_CFG_CONTROLLER1_MODE & TUSB_MODE_HOST)
STATIC_ ehci_link_t period_frame_list1[EHCI_FRAMELIST_SIZE] ATTR_ALIGNED(4096) TUSB_CFG_ATTR_USBRAM;
STATIC_ASSERT( ALIGN_OF(period_frame_list1) == 4096, "Period Framelist must be 4k alginment"); // validation
#ifndef __ICCARM__ // IAR cannot able to determine the alignment with dataalignment pragma
STATIC_ASSERT( ALIGN_OF(period_frame_list1) == 4096, "Period Framelist must be 4k alginment"); // validation
#endif
#endif
#endif
@ -587,7 +593,7 @@ static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms)
case EHCI_QUEUE_ELEMENT_SITD:
case EHCI_QUEUE_ELEMENT_FSTN:
default:
ASSERT (false, (void) 0); // TODO support hs/fs ISO
ASSERT (false, VOID_RETURN); // TODO support hs/fs ISO
break;
}
@ -667,7 +673,7 @@ static void xfer_error_isr(uint8_t hostid)
case EHCI_QUEUE_ELEMENT_SITD:
case EHCI_QUEUE_ELEMENT_FSTN:
default:
ASSERT (false, (void) 0); // TODO support hs/fs ISO
ASSERT (false, VOID_RETURN); // TODO support hs/fs ISO
break;
}
@ -905,7 +911,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_si
{
if (TUSB_SPEED_HIGH == p_qhd->endpoint_speed)
{
ASSERT_INT_WITHIN(1, 16, interval, (void) 0);
ASSERT_INT_WITHIN(1, 16, interval, VOID_RETURN);
if ( interval < 4) // sub milisecond interval
{
p_qhd->interval_ms = 0;
@ -918,7 +924,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, uint16_t max_packet_si
}
}else
{
ASSERT( 0 != interval, (void) 0);
ASSERT( 0 != interval, VOID_RETURN);
// Full/Low: 4.12.2.1 (EHCI) case 1 schedule start split at 1 us & complete split at 2,3,4 uframes
p_qhd->interrupt_smask = 0x01;
p_qhd->non_hs_interrupt_cmask = BIN8(11100);

2
tinyusb/host/usbh.c
View File

@ -261,7 +261,7 @@ void usbh_xfer_isr(pipe_handle_t pipe_hdl, uint8_t class_code, tusb_event_t even
usbh_class_drivers[class_index].isr(pipe_hdl, event, xferred_bytes);
}else
{
ASSERT(false, (void) 0); // something wrong, no one claims the isr's source
ASSERT(false, VOID_RETURN); // something wrong, no one claims the isr's source
}
}

6
tinyusb/host/usbh.h
View File

@ -98,9 +98,9 @@ uint32_t tusbh_device_get_mounted_class_flag(uint8_t dev_addr);
//--------------------------------------------------------------------+
// APPLICATION CALLBACK
//--------------------------------------------------------------------+
uint8_t tusbh_device_attached_cb (tusb_descriptor_device_t const *p_desc_device) ATTR_WEAK ATTR_WARN_UNUSED_RESULT;
void tusbh_device_mount_succeed_cb (uint8_t dev_addr) ATTR_WEAK;
void tusbh_device_mount_failed_cb(tusb_error_t error, tusb_descriptor_device_t const *p_desc_device) ATTR_WEAK; // TODO refractor remove desc_device
ATTR_WEAK uint8_t tusbh_device_attached_cb (tusb_descriptor_device_t const *p_desc_device) ATTR_WARN_UNUSED_RESULT;
ATTR_WEAK void tusbh_device_mount_succeed_cb (uint8_t dev_addr);
ATTR_WEAK void tusbh_device_mount_failed_cb(tusb_error_t error, tusb_descriptor_device_t const *p_desc_device); // TODO refractor remove desc_device
//--------------------------------------------------------------------+
// CLASS-USBH & INTERNAL API