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add class code to hcd_pipe_open to facilitate usb_complete callback

This commit is contained in:
hathach 2013-03-09 21:37:49 +07:00
parent 96c92afb32
commit 8457585464
7 changed files with 21 additions and 24 deletions
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20
tests/test/host/ehci/test_ehci_pipe.c
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@ -124,6 +124,7 @@ void verify_control_open_qhd(ehci_qhd_t *p_qhd)
{
verify_open_qhd(p_qhd, 0, control_max_packet_size);
TEST_ASSERT_EQUAL(0, p_qhd->class_code);
TEST_ASSERT_EQUAL(1, p_qhd->data_toggle_control);
TEST_ASSERT_EQUAL(0, p_qhd->interrupt_smask);
TEST_ASSERT_EQUAL(0, p_qhd->non_hs_interrupt_cmask);
@ -195,7 +196,7 @@ tusb_descriptor_endpoint_t const desc_ept_bulk_in =
.bInterval = 0
};
void verify_bulk_open_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const * desc_endpoint)
void verify_bulk_open_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const * desc_endpoint, uint8_t class_code)
{
verify_open_qhd(p_qhd, desc_endpoint->bEndpointAddress, desc_endpoint->wMaxPacketSize);
@ -209,6 +210,7 @@ void verify_bulk_open_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const *
TEST_ASSERT_EQUAL(desc_endpoint->bEndpointAddress & 0x80 ? EHCI_PID_IN : EHCI_PID_OUT, p_qhd->pid_non_control);
TEST_ASSERT_EQUAL(class_code, p_qhd->class_code);
//------------- async list check -------------//
TEST_ASSERT_EQUAL_HEX((uint32_t) p_qhd, align32(async_head->next.address));
TEST_ASSERT_FALSE(async_head->next.terminate);
@ -222,13 +224,13 @@ void test_open_bulk_qhd_data(void)
tusb_descriptor_endpoint_t const * desc_endpoint = &desc_ept_bulk_in;
//------------- Code Under TEST -------------//
pipe_hdl = hcd_pipe_open(dev_addr, desc_endpoint);
pipe_hdl = hcd_pipe_open(dev_addr, desc_endpoint, TUSB_CLASS_MSC);
TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl.xfer_type);
p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
verify_bulk_open_qhd(p_qhd, desc_endpoint);
verify_bulk_open_qhd(p_qhd, desc_endpoint, TUSB_CLASS_MSC);
//------------- async list check -------------//
TEST_ASSERT_EQUAL_HEX((uint32_t) p_qhd, align32(async_head->next.address));
@ -248,7 +250,7 @@ tusb_descriptor_endpoint_t const desc_ept_interrupt_out =
.wMaxPacketSize = 16,
.bInterval = 1
};
void verify_int_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const * desc_endpoint)
void verify_int_qhd(ehci_qhd_t *p_qhd, tusb_descriptor_endpoint_t const * desc_endpoint, uint8_t class_code)
{
verify_open_qhd(p_qhd, desc_endpoint->bEndpointAddress, desc_endpoint->wMaxPacketSize);
@ -272,14 +274,14 @@ void test_open_interrupt_qhd_hs(void)
pipe_handle_t pipe_hdl;
//------------- Code Under TEST -------------//
pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out);
pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID);
TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl.xfer_type);
p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
verify_int_qhd(p_qhd, &desc_ept_interrupt_out);
verify_int_qhd(p_qhd, &desc_ept_interrupt_out, TUSB_CLASS_HID);
TEST_ASSERT_EQUAL(0xFF, p_qhd->interrupt_smask);
//TEST_ASSERT_EQUAL(0, p_qhd->non_hs_interrupt_cmask); cmask in high speed is ignored
@ -293,14 +295,14 @@ void test_open_interrupt_qhd_non_hs(void)
usbh_device_info_pool[dev_addr].speed = TUSB_SPEED_FULL;
//------------- Code Under TEST -------------//
pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out);
pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_interrupt_out, TUSB_CLASS_HID);
TEST_ASSERT_EQUAL(dev_addr, pipe_hdl.dev_addr);
TEST_ASSERT_EQUAL(TUSB_XFER_INTERRUPT, pipe_hdl.xfer_type);
p_qhd = &ehci_data.device[ pipe_hdl.dev_addr ].qhd[ pipe_hdl.index ];
verify_int_qhd(p_qhd, &desc_ept_interrupt_out);
verify_int_qhd(p_qhd, &desc_ept_interrupt_out, TUSB_CLASS_HID);
TEST_ASSERT_EQUAL(1, p_qhd->interrupt_smask);
TEST_ASSERT_EQUAL(0x1c, p_qhd->non_hs_interrupt_cmask);
@ -322,6 +324,6 @@ tusb_descriptor_endpoint_t const desc_ept_iso_in =
void test_open_isochronous(void)
{
pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_iso_in);
pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_iso_in, TUSB_CLASS_AUDIO);
TEST_ASSERT_EQUAL(0, pipe_hdl.dev_addr);
}

2
tests/test/host/ehci/test_ehci_pipe_bulk_xfer.c
View File

@ -101,7 +101,7 @@ void setUp(void)
}
async_head = get_async_head( hostid );
pipe_hdl_bulk = hcd_pipe_open(dev_addr, &desc_ept_bulk_in);
pipe_hdl_bulk = hcd_pipe_open(dev_addr, &desc_ept_bulk_in, TUSB_CLASS_MSC);
TEST_ASSERT_EQUAL(dev_addr, pipe_hdl_bulk.dev_addr);
TEST_ASSERT_EQUAL(TUSB_XFER_BULK, pipe_hdl_bulk.xfer_type);

3
tinyusb/host/ehci/ehci.c
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@ -360,7 +360,7 @@ tusb_error_t hcd_pipe_control_close(uint8_t dev_addr)
//--------------------------------------------------------------------+
// BULK/INT/ISO PIPE API
//--------------------------------------------------------------------+
pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * p_endpoint_desc)
pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * p_endpoint_desc, uint8_t class_code)
{
pipe_handle_t const null_handle = { .dev_addr = 0, .xfer_type = 0, .index = 0 };
@ -377,6 +377,7 @@ pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const *
ehci_qhd_t * const p_qhd = &ehci_data.device[dev_addr].qhd[index];
init_qhd(p_qhd, dev_addr, p_endpoint_desc->wMaxPacketSize, p_endpoint_desc->bEndpointAddress, p_endpoint_desc->bmAttributes.xfer);
p_qhd->class_code = class_code;
ehci_qhd_t * list_head;

3
tinyusb/host/ehci/ehci.h
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@ -195,14 +195,13 @@ typedef struct {
//--------------------------------------------------------------------+
uint8_t used;
uint8_t pid_non_control;
uint8_t class_code;
uint8_t list_index;
uint8_t reserved;
ehci_qtd_t *p_qtd_list_head; // head of the scheduled TD list
ehci_qtd_t *p_qtd_list_tail; // tail of the scheduled TD list
uint32_t reserved_2;
}ATTR_ALIGNED(32) ehci_qhd_t;
/// Highspeed Isochronous Transfer Descriptor (section 3.3)

2
tinyusb/host/hcd.h
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@ -79,7 +79,7 @@ tusb_error_t hcd_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size) A
tusb_error_t hcd_pipe_control_xfer(uint8_t dev_addr, tusb_std_request_t const * p_request, uint8_t data[]) ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_pipe_control_close(uint8_t dev_addr) ATTR_WARN_UNUSED_RESULT;
pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * endpoint_desc) ATTR_WARN_UNUSED_RESULT;
pipe_handle_t hcd_pipe_open(uint8_t dev_addr, tusb_descriptor_endpoint_t const * endpoint_desc, uint8_t class_code) ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) ATTR_WARN_UNUSED_RESULT;
tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl) ATTR_WARN_UNUSED_RESULT;

10
tinyusb/host/usbh.c
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@ -53,7 +53,7 @@
#define ENUM_QUEUE_DEPTH 5
// TODO fix number of class driver
class_driver_t const class_host_drivers[TUSB_CLASS_MAX_CONSEC_NUMBER] =
class_driver_t const usbh_class_drivers[TUSB_CLASS_MAX_CONSEC_NUMBER] =
{
[TUSB_CLASS_HID] = {
.init = hidh_init,
@ -109,8 +109,8 @@ tusb_error_t usbh_init(void)
//------------- class init -------------//
for (uint8_t class_code = 1; class_code < TUSB_CLASS_MAX_CONSEC_NUMBER; class_code++)
{
if (class_host_drivers[class_code].init)
class_host_drivers[class_code].init();
if (usbh_class_drivers[class_code].init)
usbh_class_drivers[class_code].init();
}
return TUSB_ERROR_NONE;
@ -273,11 +273,11 @@ OSAL_TASK_DECLARE(usbh_enumeration_task)
TASK_ASSERT( false ); // corrupted data, abort enumeration
} else if ( class_code < TUSB_CLASS_MAX_CONSEC_NUMBER)
{
if ( class_host_drivers[class_code].install_subtask )
if ( usbh_class_drivers[class_code].install_subtask )
{
uint16_t length;
OSAL_SUBTASK_INVOKED_AND_WAIT ( // parameters in task/sub_task must be static storage (static or global)
class_host_drivers[ ((tusb_descriptor_interface_t*) p_desc)->bInterfaceClass ].install_subtask(new_addr, p_desc, &length) );
usbh_class_drivers[ ((tusb_descriptor_interface_t*) p_desc)->bInterfaceClass ].install_subtask(new_addr, p_desc, &length) );
p_desc += length;
}
} else // unsupported class (not enable or yet implemented)

5
tinyusb/host/usbh_hcd.h
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@ -102,11 +102,6 @@ typedef struct { // TODO internal structure, re-order members
} usbh_device_info_t;
extern usbh_device_info_t usbh_device_info_pool[TUSB_CFG_HOST_DEVICE_MAX+1]; // including zero-address
//--------------------------------------------------------------------+
// ADDRESS 0 API
//--------------------------------------------------------------------+
//tusb_error_t hcd_addr0_open(usbh_device_addr0_t *dev_addr0) ATTR_WARN_UNUSED_RESULT;
//NOTE addr0 close is not needed tusb_error_t hcd_addr0_close(usbh_device_addr0_t *dev_addr0) ATTR_WARN_UNUSED_RESULT;
#ifdef __cplusplus
}