Microchip PIC24/dsPIC33 device mode support
This commit is contained in:
ReimuNotMoe
parent
c5992edc7d
commit
8096afc6de
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@ -111,6 +111,11 @@
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#define TUP_DCD_ENDPOINT_MAX 8
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#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
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#elif TU_CHECK_MCU(OPT_MCU_PIC32MX, OPT_MCU_PIC32MM, OPT_MCU_PIC32MK) || \
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TU_CHECK_MCU(OPT_MCU_PIC24, OPT_MCU_DSPIC33)
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#define TUP_DCD_ENDPOINT_MAX 16
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#define TUP_DCD_ENDPOINT_EXCLUSIVE_NUMBER
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//------------- ST -------------//
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#elif TU_CHECK_MCU(OPT_MCU_STM32F0)
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#define TUP_DCD_ENDPOINT_MAX 8
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@ -39,14 +39,10 @@
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#if (CFG_TUSB_MCU == OPT_MCU_PIC32MX || CFG_TUSB_MCU == OPT_MCU_PIC32MM || CFG_TUSB_MCU == OPT_MCU_PIC32MK)
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#define TU_PIC_HAS_MMU 1
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#define TU_PIC_HAS_HW_RMW 1
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#define TU_PIC_INT_SIZE 4
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#elif (CFG_TUSB_MCU == OPT_MCU_PIC24 || CFG_TUSB_MCU == OPT_MCU_DSPIC33)
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#define TU_PIC_HAS_MMU 0
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#define TU_PIC_HAS_HW_RMW 0
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#define TU_PIC_INT_SIZE 2
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#else
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@ -56,7 +52,7 @@
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#endif
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#if TU_PIC_HAS_MMU
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#if TU_PIC_INT_SIZE == 4
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#ifndef KVA_TO_PA
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#define KVA_TO_PA(kva) ((uint32_t)(kva) & 0x1fffffff)
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@ -89,6 +85,8 @@ enum {
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TOK_PID_SETUP = 0xDu,
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};
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// The BDT is 8 bytes on 32bit PICs and 4 bytes on 8/16bit PICs
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#if TU_PIC_INT_SIZE == 4
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typedef struct TU_ATTR_PACKED
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{
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union {
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@ -119,6 +117,37 @@ typedef struct TU_ATTR_PACKED
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} buffer_descriptor_t;
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TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 8, "size is not correct" );
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#else
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typedef struct TU_ATTR_PACKED
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{
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union {
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uint16_t head;
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struct {
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uint16_t : 10;
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uint16_t tok_pid : 4;
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uint16_t data : 1;
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uint16_t own : 1;
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};
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struct {
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uint16_t : 10;
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uint16_t bdt_stall : 1;
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uint16_t dts : 1;
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uint16_t ninc : 1;
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uint16_t keep : 1;
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};
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struct {
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uint16_t bc : 10;
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uint16_t : 6;
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};
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};
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uint8_t *addr;
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} buffer_descriptor_t;
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TU_VERIFY_STATIC( sizeof(buffer_descriptor_t) == 4, "size is not correct" );
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#endif
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typedef struct TU_ATTR_PACKED
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{
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@ -142,7 +171,11 @@ typedef struct
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union {
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/* [#EP][OUT,IN][EVEN,ODD] */
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buffer_descriptor_t bdt[16][2][2];
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uint16_t bda[512];
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#if TU_PIC_INT_SIZE == 4
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uint16_t bda[256];
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#else
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uint8_t bda[256];
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#endif
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};
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TU_ATTR_ALIGNED(4) union {
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endpoint_state_t endpoint[16][2];
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@ -158,7 +191,11 @@ typedef struct
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// BDT(Buffer Descriptor Table) must be 256-byte aligned
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CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(512) volatile static dcd_data_t _dcd;
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#if TU_PIC_INT_SIZE == 4
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TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 512, "size is not correct" );
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#else
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TU_VERIFY_STATIC( sizeof(_dcd.bdt) == 256, "size is not correct" );
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#endif
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#if TU_PIC_INT_SIZE == 4
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typedef uint32_t ep_reg_t;
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@ -172,7 +209,12 @@ static inline volatile void *ep_addr(uint8_t rhport, uint8_t ep_num) {
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#else
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volatile void *ep_reg_base = &U1EP0;
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#endif
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return ep_reg_base + 0x10 * ep_num;
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#if TU_PIC_INT_SIZE == 4
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const size_t offset = 0x10;
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#else
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const size_t offset = 0x2;
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#endif
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return ep_reg_base + offset * ep_num;
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}
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static inline ep_reg_t ep_read(uint8_t rhport, uint8_t ep_num) {
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@ -186,7 +228,7 @@ static inline void ep_write(uint8_t rhport, uint8_t ep_num, ep_reg_t val) {
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}
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static inline void ep_clear(uint8_t rhport, uint8_t ep_num, ep_reg_t val) {
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#if TU_PIC_HAS_HW_RMW
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#if TU_PIC_INT_SIZE == 4
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volatile ep_reg_t *ep_clr = (ep_addr(rhport, ep_num) + 0x4);
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*ep_clr = val;
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#else
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@ -197,7 +239,7 @@ static inline void ep_clear(uint8_t rhport, uint8_t ep_num, ep_reg_t val) {
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}
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static inline void ep_set(uint8_t rhport, uint8_t ep_num, ep_reg_t val) {
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#if TU_PIC_HAS_HW_RMW
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#if TU_PIC_INT_SIZE == 4
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volatile ep_reg_t *ep_s = (ep_addr(rhport, ep_num) + 0x8);
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*ep_s = val;
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#else
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@ -278,7 +320,7 @@ static void prepare_next_setup_packet(uint8_t rhport)
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_dcd.bdt[0][1][in_odd].data = 1;
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_dcd.bdt[0][1][in_odd ^ 1].data = 0;
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dcd_edpt_xfer(rhport, tu_edpt_addr(0, TUSB_DIR_OUT),
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_dcd.setup_packet, sizeof(_dcd.setup_packet));
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_dcd.setup_packet, sizeof(_dcd.setup_packet));
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}
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static void process_stall(uint8_t rhport)
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@ -298,7 +340,7 @@ static void process_stall(uint8_t rhport)
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static void process_tokdne(uint8_t rhport)
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{
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uint32_t s = U1STAT;
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ep_reg_t s = U1STAT;
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U1IR = _U1IR_TRNIF_MASK;
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@ -321,7 +363,11 @@ static void process_tokdne(uint8_t rhport)
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ep->odd = odd ^ 1;
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if (pid == TOK_PID_SETUP) {
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dcd_event_setup_received(rhport, (uint8_t *)PA_TO_KVA1(bd->addr), true);
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#if TU_PIC_INT_SIZE == 4
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U1CONCLR = _U1CON_PKTDIS_TOKBUSY_MASK;
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#else
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U1CONbits.PKTDIS = 0;
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#endif
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return;
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}
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@ -341,8 +387,8 @@ static void process_tokdne(uint8_t rhport)
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}
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const unsigned length = ep->length;
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dcd_event_xfer_complete(rhport,
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tu_edpt_addr(epnum, dir),
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length - remaining, XFER_RESULT_SUCCESS, true);
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tu_edpt_addr(epnum, dir),
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length - remaining, XFER_RESULT_SUCCESS, true);
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if (0 == epnum && 0 == length) {
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/* After completion a ZLP of control transfer,
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* it prepares for the next steup transfer. */
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@ -358,11 +404,16 @@ static void process_tokdne(uint8_t rhport)
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static void process_bus_reset(uint8_t rhport)
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{
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#if TU_PIC_INT_SIZE == 4
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U1PWRCCLR = _U1PWRC_USUSPEND_MASK;
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U1CONSET = _U1CON_PPBRST_MASK;
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#else
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U1PWRCbits.USUSPND = 0;
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U1CONbits.PPBRST = 1;
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#endif
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U1ADDR = 0;
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U1IE = _U1IE_URSTIE_DETACHIE_MASK | _U1IE_TRNIE_MASK | _U1IE_IDLEIE_MASK |
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U1IE = _U1IE_URSTIE_MASK | _U1IE_TRNIE_MASK | _U1IE_IDLEIE_MASK |
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_U1IE_UERRIE_MASK | _U1IE_STALLIE_MASK;
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U1EP0 = _U1EP0_EPHSHK_MASK | _U1EP0_EPRXEN_MASK | _U1EP0_EPTXEN_MASK;
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@ -386,7 +437,11 @@ static void process_bus_reset(uint8_t rhport)
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tu_memclr(_dcd.endpoint[1], sizeof(_dcd.endpoint) - sizeof(_dcd.endpoint[0]));
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_dcd.addr = 0;
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prepare_next_setup_packet(rhport);
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#if TU_PIC_INT_SIZE == 4
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U1CONCLR = _U1CON_PPBRST_MASK;
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#else
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U1CONbits.PPBRST = 0;
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#endif
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dcd_event_bus_reset(rhport, TUSB_SPEED_FULL, true);
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}
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@ -399,9 +454,15 @@ static void process_bus_sleep(uint8_t rhport)
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static void process_bus_resume(uint8_t rhport)
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{
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// Enable suspend & disable resume interrupt
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#if TU_PIC_INT_SIZE == 4
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U1PWRCCLR = _U1PWRC_USUSPEND_MASK;
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U1IECLR = _U1IE_RESUMEIE_MASK;
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U1IESET = _U1IE_IDLEIE_MASK;
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#else
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U1PWRCbits.USUSPND = 0;
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U1IEbits.RESUMEIE = 0;
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U1IEbits.IDLEIE = 1;
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#endif
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dcd_event_bus_signal(rhport, DCD_EVENT_RESUME, true);
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}
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@ -418,26 +479,29 @@ void dcd_init(uint8_t rhport)
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TRISBbits.TRISB6 = 1;
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#endif
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#if (CFG_TUSB_MCU == OPT_MCU_PIC32MX) || (CFG_TUSB_MCU == OPT_MCU_PIC32MM)
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U1PWRCSET = _U1PWRC_USBPWR_MASK;
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#elif CFG_TUSB_MCU == OPT_MCU_PIC32MK
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// TODO
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#elif (CFG_TUSB_MCU == OPT_MCU_PIC24) || (CFG_TUSB_MCU == OPT_MCU_DSPIC33)
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U1PWRCbits.USBPWR = 1;
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#endif
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tu_memclr(&_dcd, sizeof(_dcd));
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#if TU_PIC_INT_SIZE == 4
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U1PWRCSET = _U1PWRC_USBPWR_MASK;
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#else
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U1PWRCbits.USBPWR = 1;
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#endif
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#if TU_PIC_INT_SIZE == 4
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uint32_t bdt_phys = KVA_TO_PA((uintptr_t)_dcd.bdt);
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U1BDTP1 = (uint8_t)(bdt_phys >> 8);
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U1BDTP2 = (uint8_t)(bdt_phys >> 16);
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U1BDTP3 = (uint8_t)(bdt_phys >> 24);
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#else
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U1BDTP1 = (uint8_t)((uint16_t)(void *)_dcd.bdt >> 8);
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U1IE = _U1IE_URSTIE_DETACHIE_MASK;
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U1CNFG1bits.PPB = 2;
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#endif
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U1IE = _U1IE_URSTIE_MASK;
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dcd_connect(rhport);
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}
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void dcd_int_enable(uint8_t rhport)
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@ -459,18 +523,30 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr)
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void dcd_remote_wakeup(uint8_t rhport)
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{
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#if TU_PIC_INT_SIZE == 4
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U1CONSET = _U1CON_RESUME_MASK;
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#else
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U1CONbits.RESUME = 1;
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#endif
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unsigned cnt = 25000000 / 1000;
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while (cnt--) asm volatile("nop");
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#if TU_PIC_INT_SIZE == 4
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U1CONCLR = _U1CON_RESUME_MASK;
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#else
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U1CONbits.RESUME = 0;
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#endif
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}
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void dcd_connect(uint8_t rhport)
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{
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while (!U1CONbits.USBEN)
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while (!U1CONbits.USBEN) {
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#if TU_PIC_INT_SIZE == 4
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U1CONSET = _U1CON_USBEN_SOFEN_MASK;
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#else
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U1CONbits.USBEN = 1;
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#endif
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}
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}
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void dcd_disconnect(uint8_t rhport)
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@ -502,14 +578,14 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
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ep->max_packet_size = tu_edpt_packet_size(ep_desc);
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unsigned val = _U1EP0_EPCONDIS_MASK;
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val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? _U1EP0_EPHSHK_MASK : 0;
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val |= dir ? _U1EP0_EPTXEN_MASK : _U1EP0_EPRXEN_MASK;
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volatile void *ep_reg_base = &U1EP0;
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volatile uint32_t *reg_ep = (ep_reg_base + 0x10 * epn);
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*reg_ep |= val;
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ep_reg_t tmp = ep_read(rhport, epn);
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tmp |= val;
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ep_write(rhport, epn, tmp);
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if (xfer != TUSB_XFER_ISOCHRONOUS) {
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bd[odd].dts = 1;
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@ -569,6 +645,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
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bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
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{
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const unsigned epn = tu_edpt_number(ep_addr);
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const unsigned dir = tu_edpt_dir(ep_addr);
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endpoint_state_t *ep = &_dcd.endpoint[epn][dir];
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@ -593,7 +670,6 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to
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}
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bd->bc = total_bytes >= mps ? mps: total_bytes;
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bd->addr = (uint8_t *)KVA_TO_PA(buffer);
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// __DSB();
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bd->own = 1; /* This bit must be set last */
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if (ie) intr_enable(rhport);
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@ -673,7 +749,7 @@ void dcd_int_handler(uint8_t rhport)
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U1IR = is; /* discard any pending events */
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}
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if (is & _U1IR_URSTIF_DETACHIF_MASK) {
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if (is & _U1IR_URSTIF_MASK) {
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U1IR = is; /* discard any pending events */
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process_bus_reset(rhport);
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}
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@ -705,7 +781,6 @@ void dcd_int_handler(uint8_t rhport)
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}
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intr_clear(rhport);
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}
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#endif
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