rename ASSERT_ERR to TU_ASSERT_ERR to prevent conflict with user code
This commit is contained in:
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6d8f4bca47
commit
752a9f45d7
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@ -73,7 +73,7 @@ static tusb_error_t cush_validate_paras(uint8_t dev_addr, uint16_t vendor_id, ui
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//--------------------------------------------------------------------+
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//--------------------------------------------------------------------+
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tusb_error_t tusbh_custom_read(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void * p_buffer, uint16_t length)
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tusb_error_t tusbh_custom_read(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void * p_buffer, uint16_t length)
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{
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{
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ASSERT_ERR( cush_validate_paras(dev_addr, vendor_id, product_id, p_buffer, length) );
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TU_ASSERT_ERR( cush_validate_paras(dev_addr, vendor_id, product_id, p_buffer, length) );
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if ( !hcd_pipe_is_idle(custom_interface[dev_addr-1].pipe_in) )
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if ( !hcd_pipe_is_idle(custom_interface[dev_addr-1].pipe_in) )
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{
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{
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@ -87,7 +87,7 @@ tusb_error_t tusbh_custom_read(uint8_t dev_addr, uint16_t vendor_id, uint16_t pr
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tusb_error_t tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void const * p_data, uint16_t length)
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tusb_error_t tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void const * p_data, uint16_t length)
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{
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{
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ASSERT_ERR( cush_validate_paras(dev_addr, vendor_id, product_id, p_data, length) );
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TU_ASSERT_ERR( cush_validate_paras(dev_addr, vendor_id, product_id, p_data, length) );
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if ( !hcd_pipe_is_idle(custom_interface[dev_addr-1].pipe_out) )
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if ( !hcd_pipe_is_idle(custom_interface[dev_addr-1].pipe_out) )
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{
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{
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@ -80,7 +80,7 @@ tusb_error_t hidh_interface_get_report(uint8_t dev_addr, void * report, hidh_int
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VERIFY (report, TUSB_ERROR_INVALID_PARA);
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VERIFY (report, TUSB_ERROR_INVALID_PARA);
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TU_ASSSERT (!hcd_pipe_is_busy(p_hid->pipe_hdl), TUSB_ERROR_INTERFACE_IS_BUSY);
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TU_ASSSERT (!hcd_pipe_is_busy(p_hid->pipe_hdl), TUSB_ERROR_INTERFACE_IS_BUSY);
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ASSERT_ERR( hcd_pipe_xfer(p_hid->pipe_hdl, report, p_hid->report_size, true) ) ;
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TU_ASSERT_ERR( hcd_pipe_xfer(p_hid->pipe_hdl, report, p_hid->report_size, true) ) ;
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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}
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}
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@ -116,16 +116,16 @@ static tusb_error_t msch_command_xfer(msch_interface_t * p_msch, void* p_buffer)
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{ // there is data phase
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{ // there is data phase
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if (p_msch->cbw.dir & TUSB_DIR_IN_MASK)
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if (p_msch->cbw.dir & TUSB_DIR_IN_MASK)
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{
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{
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ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) );
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) );
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ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_in , p_buffer, p_msch->cbw.xfer_bytes) );
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TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_in , p_buffer, p_msch->cbw.xfer_bytes) );
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}else
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}else
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{
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{
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ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)) );
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TU_ASSERT_ERR( hcd_pipe_queue_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t)) );
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ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out , p_buffer, p_msch->cbw.xfer_bytes, false) );
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out , p_buffer, p_msch->cbw.xfer_bytes, false) );
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}
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}
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}
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}
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ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true) );
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_in , (uint8_t*) &p_msch->csw, sizeof(msc_csw_t), true) );
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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}
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}
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@ -149,7 +149,7 @@ tusb_error_t tusbh_msc_inquiry(uint8_t dev_addr, uint8_t lun, uint8_t *p_data)
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memcpy(p_msch->cbw.command, &cmd_inquiry, p_msch->cbw.cmd_len);
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memcpy(p_msch->cbw.command, &cmd_inquiry, p_msch->cbw.cmd_len);
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ASSERT_ERR ( msch_command_xfer(p_msch, p_data) );
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TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_data) );
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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}
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}
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@ -174,7 +174,7 @@ tusb_error_t tusbh_msc_read_capacity10(uint8_t dev_addr, uint8_t lun, uint8_t *p
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memcpy(p_msch->cbw.command, &cmd_read_capacity10, p_msch->cbw.cmd_len);
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memcpy(p_msch->cbw.command, &cmd_read_capacity10, p_msch->cbw.cmd_len);
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ASSERT_ERR ( msch_command_xfer(p_msch, p_data) );
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TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_data) );
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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}
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}
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@ -199,7 +199,7 @@ tusb_error_t tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, uint8_t *p_dat
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memcpy(p_msch->cbw.command, &cmd_request_sense, p_msch->cbw.cmd_len);
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memcpy(p_msch->cbw.command, &cmd_request_sense, p_msch->cbw.cmd_len);
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ASSERT_ERR ( msch_command_xfer(p_msch, p_data) );
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TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_data) );
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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}
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}
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@ -225,8 +225,8 @@ tusb_error_t tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, msc_csw_t *
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memcpy(p_msch->cbw.command, &cmd_test_unit_ready, p_msch->cbw.cmd_len);
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memcpy(p_msch->cbw.command, &cmd_test_unit_ready, p_msch->cbw.cmd_len);
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// TODO MSCH refractor test uinit ready
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// TODO MSCH refractor test uinit ready
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ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) );
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_out, (uint8_t*) &p_msch->cbw, sizeof(msc_cbw_t), false) );
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ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true) );
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TU_ASSERT_ERR( hcd_pipe_xfer(p_msch->bulk_in , (uint8_t*) p_csw, sizeof(msc_csw_t), true) );
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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}
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}
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@ -252,7 +252,7 @@ tusb_error_t tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uin
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memcpy(p_msch->cbw.command, &cmd_read10, p_msch->cbw.cmd_len);
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memcpy(p_msch->cbw.command, &cmd_read10, p_msch->cbw.cmd_len);
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ASSERT_ERR ( msch_command_xfer(p_msch, p_buffer));
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TU_ASSERT_ERR ( msch_command_xfer(p_msch, p_buffer));
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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}
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}
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@ -278,7 +278,7 @@ tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffe
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memcpy(p_msch->cbw.command, &cmd_write10, p_msch->cbw.cmd_len);
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memcpy(p_msch->cbw.command, &cmd_write10, p_msch->cbw.cmd_len);
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ASSERT_ERR ( msch_command_xfer(p_msch, (void*) p_buffer));
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TU_ASSERT_ERR ( msch_command_xfer(p_msch, (void*) p_buffer));
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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}
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}
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@ -164,7 +164,7 @@ static inline void verify_breakpoint(void)
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#define ASSERT_1ARGS(_cond) VERIFY_DEFINE(_cond, _MESS_FAILED(); verify_breakpoint(), false)
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#define ASSERT_1ARGS(_cond) VERIFY_DEFINE(_cond, _MESS_FAILED(); verify_breakpoint(), false)
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#define ASSERT_2ARGS(_cond, _ret) VERIFY_DEFINE(_cond, _MESS_FAILED(); verify_breakpoint(), _ret)
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#define ASSERT_2ARGS(_cond, _ret) VERIFY_DEFINE(_cond, _MESS_FAILED(); verify_breakpoint(), _ret)
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#define TU_ASSERT(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS)(__VA_ARGS__)
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#define TU_ASSERT(...) GET_3RD_ARG(__VA_ARGS__, ASSERT_2ARGS, ASSERT_1ARGS)(__VA_ARGS__)
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/*------------------------------------------------------------------*/
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/*------------------------------------------------------------------*/
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/* ASSERT Error
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/* ASSERT Error
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@ -173,7 +173,11 @@ static inline void verify_breakpoint(void)
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#define ASERT_ERR_1ARGS(_error) VERIFY_ERR_DEF2(_error, verify_breakpoint())
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#define ASERT_ERR_1ARGS(_error) VERIFY_ERR_DEF2(_error, verify_breakpoint())
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#define ASERT_ERR_2ARGS(_error, _ret) VERIFY_ERR_DEF3(_error, verify_breakpoint(), _ret)
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#define ASERT_ERR_2ARGS(_error, _ret) VERIFY_ERR_DEF3(_error, verify_breakpoint(), _ret)
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#define ASSERT_ERR(...) GET_3RD_ARG(__VA_ARGS__, ASERT_ERR_2ARGS, ASERT_ERR_1ARGS)(__VA_ARGS__)
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#define TU_ASSERT_ERR(...) GET_3RD_ARG(__VA_ARGS__, ASERT_ERR_2ARGS, ASERT_ERR_1ARGS)(__VA_ARGS__)
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/*------------------------------------------------------------------*/
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/* ASSERT HDLR
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*------------------------------------------------------------------*/
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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@ -435,7 +435,7 @@ static tusb_error_t proc_set_config_req(uint8_t rhport, uint8_t config_number)
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usbd_devices[rhport].interface2class[p_desc_interface->bInterfaceNumber] = class_index;
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usbd_devices[rhport].interface2class[p_desc_interface->bInterfaceNumber] = class_index;
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uint16_t length=0;
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uint16_t length=0;
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ASSERT_ERR( usbd_class_drivers[class_index].open( rhport, p_desc_interface, &length ) );
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TU_ASSERT_ERR( usbd_class_drivers[class_index].open( rhport, p_desc_interface, &length ) );
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TU_ASSERT( length >= sizeof(tusb_desc_interface_t), TUSB_ERROR_FAILED );
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TU_ASSERT( length >= sizeof(tusb_desc_interface_t), TUSB_ERROR_FAILED );
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p_desc += length;
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p_desc += length;
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@ -134,11 +134,11 @@ tusb_error_t hcd_init(void)
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memclr_(&ehci_data, sizeof(ehci_data_t));
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memclr_(&ehci_data, sizeof(ehci_data_t));
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#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST)
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#if (CFG_TUSB_CONTROLLER_0_MODE & OPT_MODE_HOST)
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ASSERT_ERR (hcd_controller_init(0));
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TU_ASSERT_ERR (hcd_controller_init(0));
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#endif
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#endif
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#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)
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#if (CFG_TUSB_CONTROLLER_1_MODE & OPT_MODE_HOST)
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ASSERT_ERR (hcd_controller_init(1));
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TU_ASSERT_ERR (hcd_controller_init(1));
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#endif
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#endif
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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@ -347,7 +347,7 @@ tusb_error_t hcd_pipe_control_close(uint8_t dev_addr)
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if (dev_addr != 0)
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if (dev_addr != 0)
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{
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{
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ASSERT_ERR( list_remove_qhd( (ehci_link_t*) get_async_head( usbh_devices[dev_addr].core_id ),
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TU_ASSERT_ERR( list_remove_qhd( (ehci_link_t*) get_async_head( usbh_devices[dev_addr].core_id ),
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(ehci_link_t*) p_qhd) );
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(ehci_link_t*) p_qhd) );
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}
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}
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@ -416,7 +416,7 @@ tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
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{
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{
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ASSERT_ERR ( hcd_pipe_queue_xfer(pipe_hdl, buffer, total_bytes) );
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TU_ASSERT_ERR ( hcd_pipe_queue_xfer(pipe_hdl, buffer, total_bytes) );
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ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(pipe_hdl);
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ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(pipe_hdl);
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@ -445,14 +445,14 @@ tusb_error_t hcd_pipe_close(pipe_handle_t pipe_hdl)
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if ( pipe_hdl.xfer_type == TUSB_XFER_BULK )
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if ( pipe_hdl.xfer_type == TUSB_XFER_BULK )
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{
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{
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ASSERT_ERR( list_remove_qhd(
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TU_ASSERT_ERR( list_remove_qhd(
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(ehci_link_t*) get_async_head( usbh_devices[pipe_hdl.dev_addr].core_id ),
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(ehci_link_t*) get_async_head( usbh_devices[pipe_hdl.dev_addr].core_id ),
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(ehci_link_t*) p_qhd) );
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(ehci_link_t*) p_qhd) );
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}
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}
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#if EHCI_PERIODIC_LIST // TODO refractor/group this together
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#if EHCI_PERIODIC_LIST // TODO refractor/group this together
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else
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else
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{
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{
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ASSERT_ERR( list_remove_qhd(
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TU_ASSERT_ERR( list_remove_qhd(
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get_period_head( usbh_devices[pipe_hdl.dev_addr].core_id, p_qhd->interval_ms ),
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get_period_head( usbh_devices[pipe_hdl.dev_addr].core_id, p_qhd->interval_ms ),
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(ehci_link_t*) p_qhd) );
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(ehci_link_t*) p_qhd) );
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}
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}
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@ -484,7 +484,7 @@ static tusb_error_t pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], u
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td_insert_to_ed(p_ed, p_gtd);
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td_insert_to_ed(p_ed, p_gtd);
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}else
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}else
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{
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{
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ASSERT_ERR(TUSB_ERROR_NOT_SUPPORTED_YET);
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TU_ASSERT_ERR(TUSB_ERROR_NOT_SUPPORTED_YET);
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}
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}
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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@ -497,7 +497,7 @@ tusb_error_t hcd_pipe_queue_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
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tusb_error_t hcd_pipe_xfer(pipe_handle_t pipe_hdl, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete)
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{
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{
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ASSERT_ERR( pipe_queue_xfer(pipe_hdl, buffer, total_bytes, true) );
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TU_ASSERT_ERR( pipe_queue_xfer(pipe_hdl, buffer, total_bytes, true) );
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tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_pipe_handle(pipe_hdl) );
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tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_pipe_handle(pipe_hdl) );
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@ -144,7 +144,7 @@ tusb_error_t usbh_init(void)
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{
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{
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memclr_(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1));
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memclr_(usbh_devices, sizeof(usbh_device_info_t)*(CFG_TUSB_HOST_DEVICE_MAX+1));
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ASSERT_ERR( hcd_init() );
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TU_ASSERT_ERR( hcd_init() );
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//------------- Enumeration & Reporter Task init -------------//
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//------------- Enumeration & Reporter Task init -------------//
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enum_queue_hdl = osal_queue_create( ENUM_QUEUE_DEPTH, sizeof(uint32_t) );
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enum_queue_hdl = osal_queue_create( ENUM_QUEUE_DEPTH, sizeof(uint32_t) );
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@ -223,7 +223,7 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
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osal_semaphore_reset( usbh_devices[dev_addr].control.sem_hdl );
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osal_semaphore_reset( usbh_devices[dev_addr].control.sem_hdl );
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osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl );
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osal_mutex_reset( usbh_devices[dev_addr].control.mutex_hdl );
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ASSERT_ERR( hcd_pipe_control_open(dev_addr, max_packet_size) );
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TU_ASSERT_ERR( hcd_pipe_control_open(dev_addr, max_packet_size) );
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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}
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}
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@ -231,7 +231,7 @@ tusb_error_t usbh_pipe_control_open(uint8_t dev_addr, uint8_t max_packet_size)
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static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) ATTR_ALWAYS_INLINE;
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static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr) ATTR_ALWAYS_INLINE;
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static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr)
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static inline tusb_error_t usbh_pipe_control_close(uint8_t dev_addr)
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{
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{
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ASSERT_ERR( hcd_pipe_control_close(dev_addr) );
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TU_ASSERT_ERR( hcd_pipe_control_close(dev_addr) );
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return TUSB_ERROR_NONE;
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return TUSB_ERROR_NONE;
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}
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}
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||||||
|
|
|
@ -51,8 +51,8 @@
|
||||||
|
|
||||||
enum
|
enum
|
||||||
{
|
{
|
||||||
OSAL_TIMEOUT_NOTIMEOUT = 0, // return immediately
|
OSAL_TIMEOUT_NOTIMEOUT = 0, // return immediately
|
||||||
OSAL_TIMEOUT_NORMAL = 10*5, // default is 10 msec, FIXME [CMSIS-RTX] easily timeout with 10 msec
|
OSAL_TIMEOUT_NORMAL = 100, // default timeout
|
||||||
OSAL_TIMEOUT_WAIT_FOREVER = 0xFFFFFFFFUL
|
OSAL_TIMEOUT_WAIT_FOREVER = 0xFFFFFFFFUL
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -119,11 +119,11 @@ static inline osal_task_t osal_task_create(osal_func_t code, const char* name, u
|
||||||
//------------- Sub Task Assert -------------//
|
//------------- Sub Task Assert -------------//
|
||||||
#define STASK_RETURN(error) do { TASK_RESTART; return error; } while(0)
|
#define STASK_RETURN(error) do { TASK_RESTART; return error; } while(0)
|
||||||
|
|
||||||
#define STASK_ASSERT_ERR(_err) VERIFY_ERR_HDLR(_err, TASK_RESTART)
|
#define STASK_ASSERT_ERR(_err) VERIFY_ERR_HDLR(_err, verify_breakpoint(); TASK_RESTART)
|
||||||
#define STASK_ASSERT_ERR_HDLR(_err, _func) VERIFY_ERR_HDLR(_err, _func; TASK_RESTART )
|
#define STASK_ASSERT_ERR_HDLR(_err, _func) VERIFY_ERR_HDLR(_err, verify_breakpoint(); _func; TASK_RESTART )
|
||||||
|
|
||||||
#define STASK_ASSERT(_cond) VERIFY_HDLR(_cond, TASK_RESTART)
|
#define STASK_ASSERT(_cond) VERIFY_HDLR(_cond, verify_breakpoint(); TASK_RESTART)
|
||||||
#define STASK_ASSERT_HDLR(_cond, _func) VERIFY_HDLR(_cond, _func; TASK_RESTART)
|
#define STASK_ASSERT_HDLR(_cond, _func) VERIFY_HDLR(_cond, verify_breakpoint(); _func; TASK_RESTART)
|
||||||
|
|
||||||
//--------------------------------------------------------------------+
|
//--------------------------------------------------------------------+
|
||||||
// QUEUE API
|
// QUEUE API
|
||||||
|
|
|
@ -316,10 +316,10 @@ static tusb_error_t pipe_control_xfer(uint8_t ep_id, uint8_t* p_buffer, uint16_t
|
||||||
|
|
||||||
if (ep_id)
|
if (ep_id)
|
||||||
{
|
{
|
||||||
ASSERT_ERR ( pipe_control_write(p_buffer, packet_len) );
|
TU_ASSERT_ERR ( pipe_control_write(p_buffer, packet_len) );
|
||||||
}else
|
}else
|
||||||
{
|
{
|
||||||
ASSERT_ERR ( pipe_control_read(p_buffer, packet_len) );
|
TU_ASSERT_ERR ( pipe_control_read(p_buffer, packet_len) );
|
||||||
}
|
}
|
||||||
|
|
||||||
dcd_data.control_dma.remaining_bytes -= packet_len;
|
dcd_data.control_dma.remaining_bytes -= packet_len;
|
||||||
|
|
|
@ -46,11 +46,11 @@ tusb_error_t tusb_init(void)
|
||||||
VERIFY( tusb_hal_init(), TUSB_ERROR_FAILED ) ; // hardware init
|
VERIFY( tusb_hal_init(), TUSB_ERROR_FAILED ) ; // hardware init
|
||||||
|
|
||||||
#if MODE_HOST_SUPPORTED
|
#if MODE_HOST_SUPPORTED
|
||||||
ASSERT_ERR( usbh_init() ); // host stack init
|
TU_ASSERT_ERR( usbh_init() ); // host stack init
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if MODE_DEVICE_SUPPORTED
|
#if MODE_DEVICE_SUPPORTED
|
||||||
ASSERT_ERR ( usbd_init() ); // device stack init
|
TU_ASSERT_ERR ( usbd_init() ); // device stack init
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
return TUSB_ERROR_NONE;
|
return TUSB_ERROR_NONE;
|
||||||
|
|
Loading…
Reference in New Issue